TWI493724B - 半導體元件 - Google Patents
半導體元件 Download PDFInfo
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- TWI493724B TWI493724B TW101106741A TW101106741A TWI493724B TW I493724 B TWI493724 B TW I493724B TW 101106741 A TW101106741 A TW 101106741A TW 101106741 A TW101106741 A TW 101106741A TW I493724 B TWI493724 B TW I493724B
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- 239000004065 semiconductor Substances 0.000 title claims description 98
- 239000010410 layer Substances 0.000 claims description 110
- 239000000463 material Substances 0.000 claims description 41
- 239000000758 substrate Substances 0.000 claims description 39
- 229910052751 metal Inorganic materials 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 20
- 239000011241 protective layer Substances 0.000 claims description 13
- 239000011368 organic material Substances 0.000 claims description 7
- 239000002923 metal particle Substances 0.000 claims description 6
- 239000002861 polymer material Substances 0.000 claims description 6
- 239000000945 filler Substances 0.000 claims description 5
- 229910010272 inorganic material Inorganic materials 0.000 claims description 4
- 239000011147 inorganic material Substances 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- 229910052799 carbon Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 239000010409 thin film Substances 0.000 description 12
- 230000000694 effects Effects 0.000 description 6
- 239000004642 Polyimide Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910015202 MoCr Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229920001940 conductive polymer Polymers 0.000 description 1
- ZGHDMISTQPRNRG-UHFFFAOYSA-N dimolybdenum Chemical compound [Mo]#[Mo] ZGHDMISTQPRNRG-UHFFFAOYSA-N 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- -1 polysiloxane Polymers 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
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- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Description
本發明是有關於一種半導體元件,且特別是有關於一種具有立體型態之半導體元件。
近年來,由於半導體製程技術的進步,薄膜電晶體的製造越趨容易與快速。薄膜電晶體的應用相當廣泛,例如電腦晶片、手機晶片或是薄膜電晶體液晶顯示器(thin film transistor liquid crystal displayer,TFT LCD)等。以薄膜電晶體液晶顯示器為例,薄膜電晶體可作為充電或放電的開關來控制各畫素的顯示。
隨著各式電子產品對元件特性的要求越來越高,薄膜電晶體也必須不斷地朝向高輸出電流的方向發展。一般來說,若要再增加薄膜電晶體的電流輸出,則必須增加薄膜電晶體的尺寸。但是,在面板有限面積的情況下,增加薄膜電晶體的尺寸勢必會排擠到其他線路或元件的配置,且亦會影響畫素電極的開口率。如此一來,則限制了薄膜電晶體的發展。
本發明提供一種半導體元件,其佔有較小佈線面積,可增加基材上其他元件的佈線面積。
本發明提出一種半導體元件,配置於一基板上。半導體元件包括一基材、一金屬層、一絕緣層、一半導體層、一汲極以及一源極。基材具有一表面以及一位在表面的第一凹槽。金屬層配置於基材上,且覆蓋表面及第一凹槽的內壁,而定義出一對應第一凹槽的第二凹槽。絕緣層配置於金屬層上,且覆蓋金屬層與第二凹槽的內壁,而定義出一對應第二凹槽的第三凹槽。半導體層配置於絕緣層上,且暴露出部分絕緣層。半導體層覆蓋第三凹槽的內壁,而定義出一對應第三凹槽的第四凹槽。汲極配置於半導體層上,且覆蓋部分半導體層與部分絕緣層,其中汲極暴露出第四凹槽。源極配置於半導體層上,且覆蓋部分半導體層與部分絕緣層,其中源極暴露出第四凹槽。
在本發明之一實施例中,上述之基材的材質包括有機材料或無機材料。
在本發明之一實施例中,上述之第一凹槽的深度是基材厚度的1/4至9/10。
在本發明之一實施例中,上述之第二凹槽的孔徑小於第一凹槽的孔徑。
在本發明之一實施例中,上述之第三凹槽的孔徑小於第二凹槽的孔徑。
在本發明之一實施例中,上述之第四凹槽的孔徑小於第三凹槽的孔徑。
在本發明之一實施例中,上述之半導體元件更包括一立體連接線路,配置於絕緣層上且連接源極。立體連接線路包括一第一導電層、一填充材料以及一第二導電層,其中第一導電層結合第二導電層包覆填充材料,且填充材料的材質不同於第一導電層材質與第二導電層的材質。
在本發明之一實施例中,上述之填充材料包括有機材料、高分子材料或含有多個金屬顆粒之高分子材料。
在本發明之一實施例中,上述之金屬顆粒的材質包括銀或碳。
在本發明之一實施例中,上述之汲極呈指叉狀而具有多個第一分支,源極呈指叉狀而具有多個第二分支,且這些第一分支與這些第二分支延伸至第四凹槽內且相互平行並交替排列。
在本發明之一實施例中,上述之半導體元件更包括一保護層,配置於基材上,並覆蓋半導體層、汲極、源極以及第四凹槽,其中保護層暴露出部分汲極。
在本發明之一實施例中,上述之半導體元件,更包括一畫素電極,配置於基材上,並連接保護層所暴露出的部分汲極。
基於上述,本發明之半導體元件的設計是透過凹槽來節省元件層(包括金屬層、絕緣層、半導體層、汲極以及源極)於基材之表面上的佈線面積,因此本發明之半導體元件除了可具有佔有較小佈線面積,以增加基材上其他元件的佈線面積外,亦可達到增加開口率的效果。
為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。
圖1A為本發明之一實施例之一種半導體元件的立體示意圖。圖1B為圖1A之半導體元件的剖面示意圖。請同時參考圖1A與圖1B,本實施例之半導體元件100a配置於一基板10上,且半導體元件100a包括一基材110、一金屬層120、一絕緣層130、一半導體層140、一汲極150a以及一源極160a。於此,半導體元件100a為一主動元件,例如是薄膜電晶體。
詳細來說,基材110具有一表面112以及一位在表面112的第一凹槽114。在本實施例中,基材110的材質例如是有機材料或無機材料,其中有機材料例如是如聚醯亞胺(polyimide,PI)或聚矽氧烷(polysiloxane,PSI),而無機材料例如是氧化矽(silicon-oxide,SiOx)或氮化矽(silicon-nitride,SiNx)。此外,第一凹槽114的深度D例如是基材110厚度T的1/4至9/10。
金屬層120配置於基材110上,且覆蓋基材110的表面112及第一凹槽114的內壁,而定義出一對應第一凹槽114的第二凹槽124。於此,第二凹槽124與第一凹槽114共形(conformally)設置,且第二凹槽124的孔徑H2小於第一凹槽114的孔徑H1。絕緣層130配置於金屬層120上,且覆蓋金屬層120與第二凹槽124的內壁,而定義出一對應第二凹槽124的第三凹槽134。於此,第三凹槽134與第二凹槽124共形設置,且第三凹槽134的孔徑H3小於第二凹槽124的孔徑H2。半導體層140配置於絕緣層130上,且暴露出部分絕緣層130,其中半導體層140覆蓋第三凹槽134的內壁,而定義出一對應第三凹槽134的第四凹槽144。於此,第四凹槽144與第三凹槽134共形設置,且第四凹槽144的孔徑H4小於第三凹槽134的孔徑H3。汲極150a配置於半導體層140上,且覆蓋部分半導體層140與部分絕緣層130,其中汲極150a暴露出半導體層140的第四凹槽144。源極160a配置於半導體層140上,且覆蓋部分半導體層140與部分絕緣層130,其中源極160a暴露出半導體層140的第四凹槽144。
由於本實施例之基材110具有第一凹槽114的設計,且金屬層120、絕緣層130、半導體層140、汲極150a及源極160a依序堆疊於基材110的表面112及第一凹槽114內,而構成一立體型態之半導體元件100a。因此,本實施例之半導體元件100a具有佔有較小佈線面積之優勢,且可將所省下的面積用來增加配置其他元件(例如是電極,未繪示),可擴大半導體元件100a的應用範圍,同時亦可達到增加開口率的效果。再者,由於本實施例之半導體層140覆蓋絕緣層130之第三凹槽134的內壁,因此相較於習知平面型態之薄膜電晶體而言,本實施例之半導體層140的設置可具有較長之通道長度,且汲極150a與源極160a之間可具有較短的水平間隔距離,進而可提高輸出電流。另外,本實施例之半導體層140完全重疊於金屬層120,藉此可較佳地控制半導體元件100a,使其具有良好的電性表現。
在此必須說明的是,下述實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,下述實施例不再重複贅述。
圖2為本發明之另一實施例之一種半導體元件的立體示意圖。請參考圖2,本實施例之半導體元件100b與圖1A之半導體元件100a相似,惟二者主要差異之處在於:本實施例之汲極150b呈指叉狀而具有多個第一分支152,而源極160b呈指叉狀而具有多個第二分支162,且這些第一分支152與這些第二分支162相互平行且交替排列。如此一來,汲極150b與源極160b所暴露出的半導體層140可具有較長之通道長度,可有效提高半導體元件100b的輸出電流。
圖3為本發明之另一實施例之一種半導體元件的立體示意圖。請參考圖3,本實施例之半導體元件100c與圖1A之半導體元件100a相似,惟二者主要差異之處在於:本實施例之半導體元件100c更包括一立體連接線路170,配置於絕緣層130上,且結構性及電性連接源極160a。
詳細來說,立體連接線路170包括一第一導電層172、一填充材料174以及一第二導電層176,其中第一導電層172結合第二導電層176包覆填充材料174,且填充材料174的材質不同於第一導電層172材質與第二導電層176的材質。在本實施例中,第二導電層176完全包覆填充材料174。本實施例之填充材料174可例如是與基材110相同材質,例如是不導電的有機材料,亦或是,填充材料174例如是不導電的高分子材料。當然,填充材料174亦可是含有多個金屬顆粒之高分子材料,意即填充材料174具有導電性,其中金屬顆粒的材質例如是包括銀或碳。需說明的是,填充材料174具有導電性與否的差異在於影響整體立體連接線路170的電阻值,其中當填充材料174具有導電性時,相對於不具導電性之填充材料174更能降低立體連接線路170的電阻值。換言之,本實施例並不限定填充材料174的材料類型,本領域的技術人員當可依據實際需求,而選用填充材料174的類型,以達到所需的技術效果。此外,第一導電層172的材質與第二導電層176的材質例如是金屬(包括鉬、鉻、鋁或其他適當的材質)或合金(鉻化鉬(MoCr)或其他適當的材質),在此並不加以限制。再者,第一導電層172的材質與第二導電層176的材質可相同或不同,在此並不加以限制。
由於本實施例具有與源極160a相連接之立體連接線路170,其中立體連接線路170具有較小的線寬且佔有較小佈線面積,因此除了可有效擴大半導體元件100c的應用範圍,以達到增加開口率的效果外,亦可有效節省導電層(即立體連接線路170)於基材110之表面112上的佈線面積。
圖4為本發明之另一實施例之一種半導體元件的剖面示意圖。請參考圖4,本實施例之半導體元件100d與圖1B之半導體元件100a相似,惟二者主要差異之處在於:本實施例之半導體元件100d為一畫素結構。
詳細來說,本實施例之半導體元件100b更包括一保護層180以及一畫素電極190。保護層180配置於基材110上並覆蓋半導體層140、汲極150a、源極160a以及第四凹槽144,且保護層180具有一暴露出部分汲極150a的接觸窗182。畫素電極190配置於基材110上,並透過其接觸窗182而連接保護層180所暴露出的部分汲極150a。
由於本實施例之基材110具有第一凹槽114的設計,且金屬層120、絕緣層130、半導體層140、汲極150a、源極160a以及保護層180依序堆疊於基材110的表面112及第一凹槽114內,而畫素電極190配置於保護層180上且透過接觸窗182電性連接汲極150a,以構成一立體型態之半導體元件100d。因此,本實施例之半導體元件100d具有佔有較小佈線面積之優勢,且可將所省下的面積用來增加配置其他元件(例如是電極,未繪示),可擴大半導體元件100d的應用範圍,同時亦可達到增加開口率的效果。
綜上所述,本發明之實施例之半導體元件的設計是透過凹槽來節省元件層(至少包括金屬層、絕緣層、半導體層、汲極以及源極)於基材之表面上的佈線面積,因此本發明之半導體元件除了可具有佔有較小佈線面積,以增加基材上其他元件的佈線面積外,亦可達到增加開口率的效果。
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。
10...基板
100a、100b、100c、100d...半導體元件
110...基材
112...表面
114...第一凹槽
120...金屬層
124...第二凹槽
130...絕緣層
134...第三凹槽
140...半導體層
144...第四凹槽
150a、150b...汲極
152...第一分支
160a、160b...源極
162...第二分支
170...立體連接線路
172...第一導電層
174...填充材料
176...第二導電層
180...保護層
182...接觸窗
190...畫素電極
D...深度
H1、H2、H3、H4...孔徑
T...厚度
圖1A為本發明之一實施例之一種半導體元件的立體示意圖。
圖1B為圖1A之半導體元件的剖面示意圖。
圖2為本發明之另一實施例之一種半導體元件的立體示意圖。
圖3為本發明之另一實施例之一種半導體元件的立體示意圖。
圖4為本發明之另一實施例之一種半導體元件的剖面示意圖。
10...基板
100a...半導體元件
110...基材
112...表面
114...第一凹槽
120...金屬層
124...第二凹槽
130...絕緣層
134...第三凹槽
140...半導體層
144...第四凹槽
150a...汲極
160a...源極
D...深度
T...厚度
H1、H2、H3、H4...孔徑
Claims (13)
- 一種半導體元件,配置於一基板上,該半導體元件包括:一基材,具有一表面以及一位在該表面的第一凹槽;一金屬層,配置於該基材上,且覆蓋該表面及該第一凹槽的內壁,而定義出一對應該第一凹槽的第二凹槽;一絕緣層,配置於該金屬層上,且覆蓋該金屬層與該第二凹槽的內壁,而定義出一對應該第二凹槽的第三凹槽;一半導體層,配置於該絕緣層上,且暴露出部分該絕緣層,該半導體層覆蓋該第三凹槽的內壁,而定義出一對應該第三凹槽的第四凹槽;一汲極,配置於該半導體層上,且覆蓋部分該半導體層與部分該絕緣層,其中該汲極暴露出該第四凹槽;以及一源極,配置於該半導體層上,且覆蓋部分該半導體層與部分該絕緣層,其中該源極暴露出該第四凹槽。
- 如申請專利範圍第1項所述之半導體元件,其中該基材的材質包括有機材料或無機材料。
- 如申請專利範圍第1項所述之半導體元件,其中該第一凹槽的深度是該基材厚度的1/4至9/10。
- 如申請專利範圍第1項所述之半導體元件,其中該第二凹槽的孔徑小於該第一凹槽的孔徑。
- 如申請專利範圍第1項所述之半導體元件,其中該第三凹槽的孔徑小於該第二凹槽的孔徑。
- 如申請專利範圍第1項所述之半導體元件,其中該第四凹槽的孔徑小於該第三凹槽的孔徑。
- 如申請專利範圍第1項所述之半導體元件,更包括一立體連接線路,配置於該絕緣層上且連接該源極,該立體連接線路包括一第一導電層、一填充材料以及一第二導電層,其中該第一導電層結合該第二導電層包覆該填充材料,且該填充材料的材質不同於該第一導電層材質與該第二導電層的材質。
- 如申請專利範圍第7項所述之半導體元件,其中該填充材料包括有機材料、高分子材料或含有多個金屬顆粒之高分子材料。
- 如申請專利範圍第8項所述之半導體元件,其中該些金屬顆粒的材質包括銀或碳。
- 如申請專利範圍第1項所述之半導體元件,其中該汲極呈指叉狀而具有多個第一分支,該源極呈指叉狀而具有多個第二分支,且該些第一分支與該些第二分支延伸至該第四凹槽內且相互平行並交替排列。
- 如申請專利範圍第1項所述之半導體元件,更包括一保護層,配置於該基材上,並覆蓋該半導體層、該汲極、該源極以及該第四凹槽,其中該保護層暴露出部分該汲極。
- 如申請專利範圍第11項所述之半導體元件,更包括一畫素電極,配置於該基材上,並連接該保護層所暴露出的該部分汲極。
- 如申請專利範圍第1項所述之半導體元件,其中該半導體層完全重疊於該金屬層。
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