TWI471447B - Vacuum processing device - Google Patents
Vacuum processing device Download PDFInfo
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- TWI471447B TWI471447B TW98134116A TW98134116A TWI471447B TW I471447 B TWI471447 B TW I471447B TW 98134116 A TW98134116 A TW 98134116A TW 98134116 A TW98134116 A TW 98134116A TW I471447 B TWI471447 B TW I471447B
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- chamber
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- 238000012545 processing Methods 0.000 title claims description 137
- 239000000758 substrate Substances 0.000 claims description 86
- 238000004544 sputter deposition Methods 0.000 claims description 75
- 238000005229 chemical vapour deposition Methods 0.000 claims description 48
- 230000004888 barrier function Effects 0.000 claims description 27
- 230000005669 field effect Effects 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 23
- 238000012546 transfer Methods 0.000 claims description 21
- 238000005530 etching Methods 0.000 claims description 19
- 238000006243 chemical reaction Methods 0.000 claims description 11
- 230000000903 blocking effect Effects 0.000 claims description 10
- 230000008569 process Effects 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 6
- 229910052760 oxygen Inorganic materials 0.000 claims description 6
- 239000000203 mixture Substances 0.000 claims description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims 1
- 229910052733 gallium Inorganic materials 0.000 claims 1
- 230000001131 transforming effect Effects 0.000 claims 1
- 239000010408 film Substances 0.000 description 198
- 239000010410 layer Substances 0.000 description 86
- 230000007246 mechanism Effects 0.000 description 25
- 229920002120 photoresistant polymer Polymers 0.000 description 22
- 229910052751 metal Inorganic materials 0.000 description 19
- 239000002184 metal Substances 0.000 description 19
- 239000007789 gas Substances 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 10
- 230000001681 protective effect Effects 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 9
- 239000012535 impurity Substances 0.000 description 9
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 9
- 238000005477 sputtering target Methods 0.000 description 9
- 229910001936 tantalum oxide Inorganic materials 0.000 description 9
- 238000004140 cleaning Methods 0.000 description 8
- 229910052732 germanium Inorganic materials 0.000 description 8
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 8
- 230000008859 change Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000013077 target material Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000012423 maintenance Methods 0.000 description 5
- 238000000059 patterning Methods 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000010292 electrical insulation Methods 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 4
- 230000007723 transport mechanism Effects 0.000 description 4
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 3
- 230000002411 adverse Effects 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 238000009751 slip forming Methods 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 229910052769 Ytterbium Inorganic materials 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000005546 reactive sputtering Methods 0.000 description 2
- 229910052707 ruthenium Inorganic materials 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- NAWDYIZEMPQZHO-UHFFFAOYSA-N ytterbium Chemical compound [Yb] NAWDYIZEMPQZHO-UHFFFAOYSA-N 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- BIXHRBFZLLFBFL-UHFFFAOYSA-N germanium nitride Chemical compound N#[Ge]N([Ge]#N)[Ge]#N BIXHRBFZLLFBFL-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 235000006408 oxalic acid Nutrition 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000009489 vacuum treatment Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
- C23C14/568—Transferring the substrates through a series of coating stations
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/54—Apparatus specially adapted for continuous coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
- H01L21/6723—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one plating chamber
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/67748—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber horizontal transfer of a single workpiece
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/67751—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber vertical transfer of a single workpiece
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/6776—Continuous loading and unloading into and out of a processing chamber, e.g. transporting belts within processing chambers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Physical Vapour Deposition (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
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Description
本發明係關於一種真空處理裝置,其係例如可在真空下來處理顯示器等所使用之玻璃基板等。
隨著顯示器之大畫面化,顯示器用基板之大型化正蔚為流行,而有提案以習知縱型之真空處理裝置作為處理基板之裝置,且已被製品化。縱型真空處理裝置係以支撐基板呈大致垂直的狀態下來處理基板者。在縱型真空處理裝置中,即使基板業已大型化,亦可控制裝置設置面積之增加,也可控制基板之撓曲(deflection)(參照例如專利文獻1)。
【專利文獻1】日本特開2007-39157號公報
一方面,在進行CVD等處理的真空處理裝置中,多有使用清洗氣體等的特殊氣體之案例。例如,在上述之縱型真空處理裝置,可搭載用以垂直地支撐基板的特殊支撐機構或搬運機構等,在此種裝置使用特殊氣體時,恐有支撐機構或搬運機構因該特殊氣體而致腐蝕之虞。因此根據處理內容,在支撐基板呈水平之狀態下處理這種方法亦有對裝置少有
不良影響之情形。
鑑於以上情事,本發明之目的,係提供一種真空處理裝置,其可於各處理步驟中以適於處理內容之方法支撐基板並搬運,可控制對設置於處理室內各種機構的不良影響。
為了達成上述目的,本發明一形態的真空處理裝置,具備橫型處理單元、縱型處理單元、及變換室。
該橫型處理單元,可維持真空狀態,使基材呈水平狀態下處理該基材。
該縱型處理單元,可維持真空狀態,使該基材呈立起狀態下處理該基材。
變換室可維持真空狀態,其係為了連接於該橫型處理單元及該縱型處理單元,使該基材之姿勢變換而設置。
根據基材之處理內容,在橫型之處理室於基材實質上呈水平地支撐之狀態下進行處理時,這樣可控制對設置於處理室內之機構等的不良影響。
所謂「使基材呈水平狀態」係使基材實質上維持於水平的狀態至可使橫型處理單元進行既定處理的程度。
所謂「使基材呈立起之狀態」係使基材實質上維持於垂直的狀態至可使縱型處理單元進行既定處理的程度。
該橫型處理單元也可包含:第一成膜室,其用以形成第一膜;及搬運室,其連接該第一成膜室及該變換室,使該基材搬入該第一成膜室及該變換室,且可使該基材自該第一成膜室及該變換室搬出。此時,該縱型處理單元也可包含:第二成膜室,其用以形成與該第一膜相異之第二膜;緩衝室,其連接於該第二成膜室與該變換室。
該橫型處理單元也可以是群集(cluster)型處理單元,其構造含有該第一成膜室的複數個處理室,而該複數個處理室被設置於該搬運室之周圍。
該縱型處理單元也可以是聯機型處理單元,其構造含有該第二成膜室的複數個處理室,該複數個處理室被配置呈線狀。
該第一成膜室也可以是CVD(化學氣相沉積)室。
在CVD處理係使用特殊氣體。因此,藉由CVD室構成作為橫型之裝置,而可解決例如當CVD室構成作為縱型之裝置時,因特殊氣體所致基材之支撐機構等腐蝕等的問題。
該CVD室係形成例如場效型電晶體之閘絕緣膜、及阻止層之至少一者,該阻止層係自對形成於該閘絕緣膜上之活性層的蝕刻液保護該活性層,且形成於該活性層上。
該第二成膜室也可以是濺鍍室。
濺鍍裝置在構成作為橫型之處理裝置時,例如靶被配置於基材上時,業已附著於靶周圍的靶材料掉落於基材上恐有污染基材之虞。相反地,在靶配置於基材下方時,業已附著於配置在基材周圍的防護板之靶材料掉落至電極恐有污染電極之虞。顧慮到由於該等污染而致在濺鍍之處理中產生的異常放電。但是,藉由濺鍍室之構成作為縱型之處理室而可解決該等之問題。
該縱型處理單元也可具有濺鍍室,其係用以藉由濺鍍而形成場效型電晶體之活性層,該活性層具有銦-鎵-鋅-氧系組成,並藉由濺鍍而形成阻止層,該阻止層係在該活性層之上,自對該活性層之蝕刻液保護該活性層。
因阻止層係以濺鍍法形成,故活性層形成後,活性層不必曝露於大氣即可形成阻止層。藉此,可防止起因於大氣中水分或雜質之對活性層表面附著的膜質劣化。又,活性層之成膜後,藉由阻止層之連續形成,而可縮短阻止層之成膜所需步驟時間,可謀求生產性之提高。
尤其是在本發明之一實施形態中,由於可在一濺鍍室內連續地形成活性層及阻止層,故不必自活性層之成膜腔室搬出基材即可進行阻止層之成膜,可謀求生產性之進一步提高。此時,在上述成膜腔室,與用以使活性層成膜之濺鍍靶屬不同,可配置
用以使阻止層成膜之濺鍍靶。接著,可在每一成膜步驟靈活運用各濺鍍靶。
或者,並非一濺鍍室,該縱型處理單元也可包含:第一濺鍍室,其用以藉由濺鍍形成場效型電晶體之活性層,該活性層具有銦-鎵-鋅-氧系組成;第二濺鍍室,其用以藉由濺鍍形成阻止層,該阻止層係在該活性層之上,自對該活性層之蝕刻液保護該活性層。
該縱型處理單元也可包含複數個該聯機型處理單元。
藉此,例如一聯機型處理單元因需要維護故無法使用時,則可使用其他聯機型處理單元。
尤其是,在本發明一實施形態中,如聯機型處理單元包含濺鍍室,橫型處理單元包含CVD室之形態為有利。在CVD裝置中,可進行清洗氣體所致自我清洗,相對於此,在濺鍍裝置中,則未能自我清洗之情況較多。亦即,這是因為濺鍍裝置之維護頻率較CVD裝置之維護頻率更多。
茲一面參照圖示,一面說明本發明之實施形態。
第一圖係顯示本發明一實施形態的真空處理裝置之模式平面圖。
真空處理裝置100,作為基材係使例如顯示器
所使用之玻璃基板(以下簡稱基板)10進行處理之裝置,典型而言,係擔任所謂具有底閘極(bottomgate)型之電晶體構造的場效型電晶體之製造的一部分之裝置。
真空處理裝置100包含群集型處理單元50、聯機型處理單元60、及姿勢變換室70。
群集型處理單元50具備複數個橫型處理室,其係使基板10在實質上呈水平之狀態下進行基板10之處理。典型上,群集型處理單元50包含:負載鎖定(loadlock)室51、搬運室53、複數個CVD(化學氣相沉積)室52。
負載鎖定室51係轉換大氣壓及真空狀態,自真空處理裝置100外部裝載基板10,又,使基板10卸載於該外部。搬運室53具備圖未顯示出之輸送機器人(conveying robot)。各CVD室52各自連接於搬運室53,對基板10進行CVD處理。搬運室53之輸送機器人係使基板10搬入負載鎖定室51、各CVD室52及後述之姿勢變換室70,又,自該等各室搬出基板10。
在CVD室52中,典型上可形成場效型電晶體之閘絕緣膜。
該等搬運室53及CVD室52內可維持於既定之真空度。
姿勢變換室70係使基板10之姿勢從水平變換
成垂直狀態,又,自垂直變換成水平狀態。例如,如第二圖所示在姿勢變換室70內,設置有保持基板10之保持機構71,保持機構71係構成為可使旋轉軸72對中心旋轉。保持機構71係藉由機械性夾盤(mechanical chuck)或真空夾盤等而保持基板10。姿勢變換室70成為可維持與搬運室53實質上相同的真空度。
保持機構71可藉由連接於保持機構71兩端部之圖未顯示出的驅動機構之驅動而旋轉。
群集型處理單元50亦可設置一室,其用以連接於搬運室53,除了CVD室52、姿勢變換室70之外,加熱室或進行其他處理。
聯機型處理單元60包含緩衝室61及濺鍍室62,使基板10在實質上呈垂直地立起狀態下進行基板10處理。
在濺鍍室62中,典型而言,可如後述在基板10上形成具有銦-鎵-鋅-氧系組成之薄膜(以下簡稱IGZO膜),及,在該IGZO膜上形成阻止層膜。IGZO膜構成場效型電晶體之活性層。阻止層膜係在構成源電極及汲電極之金屬膜的圖型化步驟,以及,蝕刻除去IGZO膜之無用區域(unwanted area)之步驟中,當作蝕刻保護層作用,其係自蝕刻液保護IGZO膜之通道區域(channel region)。濺鍍室62包含:濺鍍靶Tc,其含有用以形成該IGZO膜之靶材料;濺
鍍靶Ts,其含有用以形成阻止層膜之靶材料。
聯機型處理單元60也可以一個或複數個通過成膜型之濺鍍室所構成,也可以一個或複數個固定成膜型之濺鍍室所構成。若設置有複數個濺鍍室,則該等複數個濺鍍室之間各自設有圖未顯示出之閘閥(gate valve)。若設置有複數個濺鍍室,該等當然可配置成線狀。
在濺鍍室62及緩衝室61內,可準備基板10搬運路徑,該路徑係例如以順向路徑63及逆向路徑64所構成之二路徑,設有圖未顯示出之支撐機構,其係使基板10呈垂直狀態下,或者自垂直以多少傾斜之狀態下支撐。典型而言,當基板10通過逆向路徑64時,則進行濺鍍處理,不過當基板通過順向路徑63時,也可進行濺鍍處理。被上述支撐機構所支撐之基板10,會藉由圖未顯示出之搬運輥、齒條與小齒輪(rack and pinion)等之機構來搬運。該等支撐機構、搬運機構、或者在姿勢變換室70及緩衝室61間之基板10的交接之機構等,使用周知之物(例如日本特開2007-39157、2008-202146、2006-143462、2006-114675號公報等)即可。
在各室之間,設有閘閥54,該等閘閥54可各自獨立地進行開閉控制。
緩衝室61連接姿勢變換室70與濺鍍室62間,其功用係作為姿勢變換室70及濺鍍室62之各自壓
力氛圍的緩衝區域。例如,當設置於姿勢變換室70與緩衝室61間的閘閥54開放時,可控制緩衝室61之真空度,成為與姿勢變換室70內之壓力實質上相同。又,當設置於緩衝室61與濺鍍室62間的閘閥54開放時,可控制緩衝室61之真空度,成為壓力與濺鍍室62內之壓力實質上相同。
在CVD室52中,有使用以清洗氣體等之特殊氣體來清潔室內之情形。例如CVD室52係以縱型之裝置所構成時,則顧慮到如設置於上述濺鍍室62般,縱型之處理裝置中特有的支撐機構或搬運機構因特殊氣體而致腐蝕等之問題。但是在本實施形態中,由於CVD室52係以橫型之裝置所構成,故可解決此種問題。又,由於藉由緩衝室61,可確實地分離CVD室52與濺鍍室62之氛圍,故藉由CVD室52所使用之特殊氣體,可解決設置於濺鍍室62之縱型之處理裝置中特有的支撐機構或搬運機構因特殊氣體而致腐蝕等之問題。
例如,在濺鍍裝置構成作為橫型之裝置時,例如靶配置於基板上時,業已附著於靶周圍的靶材料掉落於基板上恐有污染基板10之虞。相反地,在靶配置於基板下方時,業已附著於配置在基板周圍之防護板(preventive plate)的靶材料掉落至電極恐有污染電極之虞。顧慮到因該等污染而致濺鍍處理中產生異常放電。但是,藉由濺鍍室62構成作為縱型
之處理室而可解決該等問題。
茲根據如上述所構成之真空處理裝置100中基板10之處理順序加以說明。第三圖顯示其順序之流程圖。
被裝載於負載鎖定室51之基板10(步驟101),經由搬運室53被搬入CVD室52,藉由CVD處理既定之膜,例如可使閘絕緣膜形成於基板10上(步驟102)。在CVD處理之後,經由搬運室53搬入姿勢變換室70,基板10之姿勢係自水平姿勢變換為垂直姿勢(步驟103)。
呈垂直姿勢之基板10,經由緩衝室61搬入濺鍍室62,可通過順向路徑63被搬運至濺鍍室62之端部。其後,基板10通過逆向路徑64,可藉由濺鍍處理形成既定之膜,例如形成IGZO膜及阻止層膜(步驟104)。
濺鍍處理後,基板10可經由緩衝室61搬入姿勢變換室70,使基板10之姿勢自垂直姿勢變換為水平姿勢(步驟105)。其後,基板10經由搬運室53及負載鎖定室51卸載於真空處理裝置100之外部(步驟106)。
接著,說明可利用以上方式所構成之真空處理裝置100而形成之場效型電晶體之製造方法。第四圖至第八圖係該等各步驟之主要部分(relevant part)剖面圖。在本實施形態中,係根據如上述所謂具有
底閘極型之電晶體構造的場效型電晶體之製造方法加以說明。
首先,如第四圖(A)所示,在基板10一表面可形成閘電極膜11F。閘電極膜11F,典型上可由與真空處理裝置100屬不同的成膜裝置所形成,不過亦可在真空處理裝置100中形成。
閘電極膜11F,典型上係以鉬或鉻、鋁等之金屬單層膜或金屬多層膜所構成,例如,可由濺鍍法形成。閘電極膜11F之厚度並無特別限定,例如為300nm。
接著,如第四圖(B)至(D)所示,可形成光罩12,其用以使閘電極膜11F圖型化成既定之形狀。該步驟包含光阻膜12F之形成步驟(第四圖(B))、曝光步驟(第四圖(C))、及顯影步驟(第四圖(D))。
光阻膜12F係可使液狀感光性材料塗佈於閘電極膜11F之上後,藉由乾燥來形成。亦可使用乾薄膜光阻作為光阻膜12F。所形成之光阻膜12F可經由光罩13曝光後,進行顯影。藉此,可在閘電極膜11F之上形成光阻遮罩12。
接著,如第四圖(E)所示,使光阻遮罩12作為光罩進行閘電極膜11F之蝕刻。藉此,可在基板10表面形成閘電極11。
閘電極膜11F之蝕刻方法並無特別限定,可為濕蝕刻法,亦可為乾蝕刻法。蝕刻後,可除去光罩
12。光阻遮罩12之除去方法可適用使用到氧氣之電漿的灰化處理,不過非限於此,也可是使用到藥液的溶解除去。
接著,如第五圖(A)所示,在基板10表面形成閘絕緣膜14,以包覆閘電極11。可在CVD室52形成。
閘絕緣膜14,典型而言,係以矽氧化膜(SiO2)、矽氮化膜(SiNx)等之氧化膜或氮化膜所構成,例如可在CVD室52形成。閘絕緣膜14亦可以濺鍍法形成。閘電極膜11F之厚度並無特別限定,例如有200nm至500nm。
接著,如第五圖(B)所示,在閘絕緣膜14之上,依順序形成IGZO膜15F及阻止層膜16F。
IGZO膜15F與阻止層膜16F可在濺鍍室62連續地形成。此時,當使IGZO膜15F用之濺鍍靶Tc與阻止層膜16F用之濺鍍靶Ts配置於相同室內時,藉由轉換使用之靶,即可使各IGZO膜15F與阻止層膜16F獨立地形成。又,IGZO膜15F係以濺鍍室62形成,阻止層16F亦可以CVD室52形成。
IGZO膜15F可在使基板10加熱至既定溫度之狀態下成膜。在本實施形態中,藉由反應性濺鍍法,即可形成活性層15(IGZO膜15F),該反應性濺鍍法係藉由在氧氛圍中使靶濺鍍,即可將與氧之反應物堆積於基板10之上。放電形式亦可為DC放電、AC
放電、RF放電之任一種。又,亦可採用於靶之背面側配置永久磁石之磁控管(magnetron)放電方法。
各IGZO膜15F及阻止層膜16F之膜厚並無特別限定,例如,IGZO膜15F之膜厚為50nm至200nm,阻止層膜16F之膜厚為30nm至300nm。
IGZO膜15F構成電晶體之活性層(載體層)15。在構成後述之源電極及汲電極之金屬膜之圖型化步驟,及蝕刻除去IGZO膜15F之無用區域的步驟中,阻止層膜16F功用係當作蝕刻保護層,其係自蝕刻液保護IGZO膜之通道區域。阻止層膜16F例如可以SiO2構成。
接著,如第五圖(C)及(D)所示,在用以使阻止層膜16F圖型化成既定形狀的光阻遮罩17形成之後,經由該光阻遮罩17可蝕刻阻止層膜16F。藉此,可形成阻止層16,其係夾持閘絕緣膜14與IGZO膜15F並與閘電極11相向。
在除去光阻遮罩17後,如第五圖(E)所示,可形成金屬膜17F以包覆IGZO膜15F及阻止層16。
金屬膜17F,典型而言,係以鉬或鉻、鋁等之金屬單層膜或金屬多層膜所構成,例如,可與真空處理裝置100屬不同之成膜裝置藉由濺鍍法來形成。但是,金屬膜17F亦可在真空處理裝置100之CVD室52形成。金屬膜17F之厚度並無特別限定,例如為100nm至500nm。
接著,如第六圖(A)及(B)所示,金屬膜17F可被圖型化。
金屬膜17F之圖型化步驟,包含光阻遮罩18之形成步驟(第六圖(A)),及金屬膜17F之蝕刻步驟(第六圖(B))。光阻遮罩18具有光罩圖型,該光罩圖型係使阻止層16之正上方區域,與各個電晶體之周邊區域予以開口。在光阻遮罩18形成後,藉由濕蝕刻法即可蝕刻金屬膜17F。藉此,金屬膜17F可被分離成源電極17S與汲電極17D。此外,在以下說明,該等源電極17S與汲電極17D可總括稱為源/汲電極17。
在源/汲電極17之形成步驟中,阻止層16之功用係當作金屬膜17F之蝕刻阻止層。亦即,阻止層16具有自對金屬膜17F之蝕刻液(例如磷硝乙酸)保護IGZO膜15F之功用。阻止層16係形成為包覆位於IGZO膜15F之源電極17S與汲電極17D間之位置的區域(以下稱為「通道區域」)。因此,IGZO膜15F之通道區域並未受到金屬膜17F之蝕刻步驟所影響。
接著,如第六圖(C)及(D)所示,使光阻遮罩18作為光罩進行IGZO薄膜15F之蝕刻。
蝕刻方法並無特別限定,可為濕蝕刻法,亦可為乾蝕刻法。藉由該IGZO膜15F之蝕刻步驟,IGZO膜15F可以元件單位被隔離化(isolation),同時可形
成由IGZO膜15F所構成之活性層15。
此時,阻止層16之功用係當作位於通道區域之IGZO膜15F的蝕刻保護膜。亦即,阻止層16具有自對IGZO膜15F之蝕刻液(例如草酸系)保護阻止層16正下方之通道區域之功用。藉此,活性層15之通道區域並不受IGZO膜15F之蝕刻步驟所影響。
在IGZO膜15F之圖型化後,光阻遮罩18藉由灰化處理等可自源/汲電極17來除去(第六圖(D))。
接著,如第七圖(A)所示,在基板10表面可形成保護膜(鈍化膜)19,以被覆源/汲電極17、阻止層16、活性層15、閘絕緣膜14。
保護膜19係藉由自外界氣體阻斷(shut off)含有活性層15之電晶體元件,即係用以確保既定電性、材料特性之物。在保護膜19方面,典型上,係以矽氧化膜(SiO2)、矽氮化膜(SiNx)等之氧化膜或氮化膜所構成,例如可以CVD法、濺鍍法來形成。保護膜19之厚度並無特別限定,例如為200nm至500nm。
接著,如第七圖(B)至(D)所示,在保護膜19形成與源/汲電極17連通之接觸孔19a。該步驟包含:在保護膜19之上形成光阻遮罩20之步驟(第七圖(B));蝕刻自光阻遮罩20之開口部20a外露的保護膜19之步驟(第七圖(C));除去光阻遮罩20之步驟(第七圖(D))。
接觸孔19a之形成可採用乾蝕刻法,不過亦可
採用濕蝕刻法。又,圖示雖省略,不過在任意位置亦可同樣地形成與源電極17S聯繫之接觸孔。
接著,如第八圖(A)至(D)所示,可經由接觸孔19a形成連接於源/汲電極17之透明導電膜21。該步驟包含:透明導電膜21F之形成步驟(第八圖(A));在透明導電膜21F之上形成光阻遮罩22之步驟(第八圖(B));蝕刻不被光罩22所覆蓋之透明導電膜21F之步驟(第八圖(C));除去光阻遮罩20之步驟(第八圖(D))。
透明導電膜21F,典型上,係以ITO膜或IZO膜所構成,例如可藉由濺鍍法、CVD法形成。透明導電膜21F之蝕刻可採用濕蝕刻法,不過並不限於此,亦可採用乾蝕刻法。
在保護膜19及透明導電膜21F中之至少一者,亦可藉由與真空處理裝置100屬不同之成膜裝置所形成,亦可由真空處理裝置100所形成。
第八圖(D)所示透明導電膜21所形成之場效型電晶體150,其後,可實施以活性層15之構造緩和為目的之退火(anneal)步驟。藉此,可賦予活性層15預期之電晶體特性。
以上方式可製造場效型電晶體150。
如上述,由於阻止層16可以濺鍍法形成,故在活性層15之形成後,不致使活性層15曝露於大氣即可形成阻止層16。藉此,可防止起因於大氣中水
分或雜質之對活性層15表面附著的膜質劣化。又,在活性層15之形成後,藉由阻止層16之連續形成而可縮短阻止層16之形成所需步驟時間,謀求生產性之提高。
尤其是在一濺鍍室62內可連續形成活性層15及阻止層16時,不必自活性層15之成膜室搬出基材即可形成阻止層16,可謀求生產性之進一步提高。
第九圖(A)至(C)係顯示本發明其他實施形態之真空處理裝置的模式平面圖。在往後之說明,係根據顯示於第一圖等的實施形態之真空處理裝置100所含有的構件或功用等,而同様之物的說明則予簡略化或省略,並以不同之處為中心加以說明。
第九圖(A)至(C)所示各實施形態的真空處理裝置200、300、400,具備複數個聯機型處理單元。例如由於一個聯機型處理單元60A有需要維護而無法使用時,則可使用其他聯機型處理單元60B。
尤其是如聯機型處理單元含有濺鍍室62,群集型處理單元50含有CVD室52之形態則為有利。在CVD裝置中,可進行清洗氣體所致自我清潔,相對於此,在濺鍍裝置中,多為無法進行自我清潔者。亦即,由於濺鍍裝置之維護頻率較CVD裝置之維護頻率更多,故本實施之形態極有利。
在第九圖(A)所示真空處理裝置200中,以各緩衝室61及濺鍍室62所成,例如二個聯機型處理單
元60A及60B係各自連接於一姿勢變換室70之二側面。此時,設於姿勢變換室70之基板10的保持機構71(參照第二圖)係藉由圖未顯示出之機構,則構成為在平面內既定之角度,例如轉動90°即可。
在第九圖(A)所示之真空處理裝置200中,在姿勢變換室70之進而其他側面亦可連接第三聯機型處理單元。
在第九圖(B)所示之真空處理裝置300中,姿勢變換室170在一方向形成為長,例如二個聯機型處理單元60A及60B係連接成與該姿勢變換室70並排。此時構成為,設置於姿勢變換室170之基板10的保持機構71藉由圖未顯示出之移動機構,使該等聯機型處理單元60在並排方向移動即可。藉此,被保持機構71所保持之基板10可搬運至兩緩衝室61。
第九圖(C)所示之真空處理裝置400,包含例如:第一姿勢變換室70A,其連接於第一搬運室53A,該第一搬運室53A連接於負載鎖定室51;第二搬運室53B,其連接於該第一姿勢變換室70A;第二姿勢變換室70B,其連接於該第二搬運室53B。接著,例如二個聯機型處理單元60A及60B之連接方式係並列於該等第1及第二姿勢變換室70A及70B。第一搬運室53A及第二搬運室53B可各自具備同様的輸送機器人。
在第九圖(B)及(C)所示之真空處理裝置100
中,三個以上聯機型處理單元亦可連接於姿勢變換室170、或者70A及70B。
本發明之實施形態並不限定於以上說明之實施形態,可考量其他各種實施形態。
在群集型處理單元50中雖設置有CVD室52,不過亦可設置濺鍍室以替代CVD室52,或增加CVD室52。
在聯機型處理單元60中,為設置有濺鍍室62之構成。但是,在聯機型處理單元60中,除了濺鍍室62之外,亦可將濺鍍法以外之PVD(物理性蒸鍍(Physical Vapor Deposition))法進行成膜之室,或加熱處理室等設置成線狀。
上述各實施形態的真空處理裝置100亦可製造第四圖至第八圖所示場效型電晶體之其他場效型電晶體。例如阻止層16除了功用係當作IGZO膜15F之蝕刻光罩之外,亦具有當作絕緣膜之功用,該絕緣膜係在活性層15之上層側維持源電極17S與汲電極17D之間的電性絕緣。但是,構成阻止層16之矽氧化膜,有無法充分防止來自大氣之雜質混入之情況。當來自大氣之雜質混入活性層15時,對電晶體特性產生不勻。因此,阻止層16亦可具有第一絕緣膜與第二絕緣膜之多層構造。此時,典型上阻止層16可為二層構造,其係:第一絕緣膜,其由矽氧化膜或矽氮化膜所構成;及第二絕緣膜,由可形成於
其上之金屬氧化膜所構成的。以第一絕緣膜可確保預期之電絕緣性,以第二絕緣膜可確保對來自大氣之雜質混入的屏障性。
上述各真空處理裝置,係為了製造此種二層構造的阻止層16,故例如在濺鍍室62具備第一及第二絕緣膜用的二個濺鍍靶即可。
上述各真空處理裝置,進而亦可製造其他場效型電晶體,該場效型電晶體係例如使閘絕緣膜14成為第一閘絕緣膜及第二閘絕緣膜的二層構造。閘絕緣膜係目的為確保閘電極與活性層間之電性絕緣而形成。但是,由矽氧化膜所構成之閘絕緣膜由於對來自基板10之雜質擴散的屏障性低,故根據來自基板10之雜質擴散至閘絕緣膜中則有無法確保既定絕緣功能之情況。此時,由於對閘絕緣膜無法獲得預期之絕緣功能,故恐有產生閘臨界值電壓之不勻,或發生與活性層間之電性洩漏(electric leak)之虞。因此,閘絕緣膜14可為二層構造,其係:第一閘絕緣膜,其由金屬氧化膜所構成;及第二閘絕緣膜,其係由形成於其上之矽氧化膜或矽氮化膜所構成。以第一閘絕緣膜可確保預期之屏障性,以第二閘絕緣膜可確保預期之電性絕緣性。
第一及第二閘絕緣膜,即可各自形成於上述各真空處理裝置之二個CVD室52,亦可各自形成於濺鍍室62。
對來自基板10之雜質擴散,第一閘絕緣膜係使用屏障性高的絕緣性金屬氧化物。在第一閘絕緣膜方面,可以鉭氧化物(TaOx)、氧化鋁(Al2O3)、釔(Y2O3)等構成。藉由使該第一閘絕緣膜形成於第二閘絕緣膜之下層側,可形成對來自基板10之雜質擴散的屏障性優異之閘絕緣膜。藉此可穩定地製造具有預期之電晶體特性的電晶體元件。
此外,亦可是第一閘絕緣膜以矽氧化膜或矽氮化膜所構成,第二閘絕緣膜以金屬氧化膜所構成。藉由此種構成可獲得與上述同様的效果。
10‧‧‧基板
11‧‧‧閘電極
11F‧‧‧閘電極膜
12,17,18,20,22‧‧‧光阻遮罩
12F‧‧‧光阻膜
13‧‧‧光罩
14‧‧‧閘絕緣膜
15‧‧‧活性層
15F‧‧‧IGZO膜
16‧‧‧阻止層
16F‧‧‧阻止層膜
17D‧‧‧汲電極
17F‧‧‧金屬膜
17S‧‧‧源電極
19‧‧‧保護膜
19a‧‧‧接觸孔
20a‧‧‧開口部
21,21F‧‧‧透明導電膜
50‧‧‧群集型處理單元
51‧‧‧負載鎖定室
52‧‧‧CVD室
53‧‧‧搬運室
53A‧‧‧第一搬運室
53B‧‧‧第二搬運室
54‧‧‧閘閥
60,60A,60B‧‧‧聯機型處理單元
61‧‧‧緩衝室
62‧‧‧濺鍍室
63‧‧‧順向路徑
64‧‧‧逆向路徑
70,170‧‧‧姿勢變換室
70A‧‧‧第一姿勢變換室
70B‧‧‧第二姿勢變換室
71‧‧‧保持機構
72‧‧‧旋轉軸
100,200,300,400‧‧‧真空處理裝置
150‧‧‧場效型電晶體
Tc,Ts‧‧‧濺鍍靶
第一圖係顯示本發明一實施形態之真空處理裝置的模式平面圖。
第二圖係顯示用以在姿勢變換室中變換基板姿勢的機構之模式圖。
第三圖係顯示真空處理裝置中基板處理順序的流程圖。
第四圖係說明本發明一實施形態之場效型電晶體之製造方法的各步驟主要部分剖面圖。
第五圖係說明本發明一實施形態之場效型電晶體之製造方法的各步驟主要部分剖面圖。
第六圖係說明本發明一實施形態之場效型電晶體之製造方法的各步驟主要部分剖面圖。
第七圖係說明本發明一實施形態之場效型電晶體之製造方法的各步驟主要部分剖面圖。
第八圖係說明本發明一實施形態之場效型電晶體之製造方法的各步驟主要部分剖面圖。
第九圖(A)至(C)係各自顯示本發明其他實施形態真空處理裝置的模式平面圖。
10‧‧‧基板
50‧‧‧群集型處理單元
51‧‧‧負載鎖定室
52‧‧‧CVD室
53‧‧‧搬運室
54‧‧‧閘閥
60‧‧‧聯機型處理單元
61‧‧‧緩衝室
62‧‧‧濺鍍室
63‧‧‧順向路徑
64‧‧‧逆向路徑
70‧‧‧姿勢變換室
100‧‧‧真空處理裝置
150‧‧‧場效型電晶體
Tc,Ts‧‧‧濺鍍靶
Claims (7)
- 一種真空處理裝置,其包含:一橫型處理單元,其可維持真空狀態,使基材呈水平狀態下處理該基材;一縱型處理單元,其可維持真空狀態,使該基材呈立起狀態下處理該基材;以及一變換室,其可維持真空狀態,用以連接於該橫型處理單元及該縱型處理單元,且變換該基材之姿勢;該橫型處理單元包含:CVD(化學氣相沉積)室,用以形成第一膜;以及搬運室,其連接於該CVD室及該變換室,可使該基材搬入該CVD室及該變換室,且自該CVD室及該變換室搬出該基材;該縱型處理單元包含:濺鍍室,其用以形成與該第一膜屬相異之第二膜;以及緩衝室,其連接該濺鍍室與該變換室,並作為該濺鍍室與該變換室之各自壓力氛圍的緩衝區域。
- 如申請專利範圍第1項所述之真空處理裝置,其中該橫型處理單元係屬群集型處理單元,該群集型處理單元係含有該CVD之複數個處理室,且該複數個處理室設置於該搬運室之周圍。
- 如申請專利範圍第1項所述之真空處理裝置,其中該縱型處理單元係屬聯機型處理單元,該聯機型處理單元係含有該濺鍍室之複數個處理室,該複數個處理室呈線狀配置。
- 如申請專利範圍第1項所述之真空處理裝置,其中該CVD室係形成場效型電晶體之閘絕緣膜及阻止層之至少一者之物,該阻止層係自對形成於該閘絕緣膜上之活性層的蝕刻液來保護該活性層,且形成於該活性層上。
- 如申請專利範圍第1項所述之真空處理裝置,其中該濺鍍室係用以藉由濺鍍而形成場效型電晶體之活性層,該活性層係具有銦-鎵-鋅-氧系組成,且藉由濺鍍而形成阻止層,該阻止層係在該活性層之上,且可從該活性層之蝕刻液來保護該活性層。
- 如申請專利範圍第1項所述之真空處理裝置,其中該濺鍍室包含:第一濺鍍室,用以藉由濺鍍形成場效型電晶體之活性層,該活性層具有銦-鎵-鋅-氧系組成;以及第二濺鍍室,用以藉由濺鍍形成阻止層,該阻止層係在該活性層之上,且可從該活性層之蝕刻液保護該活性層。
- 如申請專利範圍第3項所述之真空處理裝置,其中該縱型處理單元含有複數個該聯機型處理 單元。
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JPS63153537U (zh) * | 1987-03-27 | 1988-10-07 | ||
US4851101A (en) * | 1987-09-18 | 1989-07-25 | Varian Associates, Inc. | Sputter module for modular wafer processing machine |
JPH0727900B2 (ja) * | 1988-06-28 | 1995-03-29 | 松下電器産業株式会社 | 半導体装置の製造方法 |
JP3255942B2 (ja) * | 1991-06-19 | 2002-02-12 | 株式会社半導体エネルギー研究所 | 逆スタガ薄膜トランジスタの作製方法 |
JP4650315B2 (ja) * | 2005-03-25 | 2011-03-16 | 株式会社ブリヂストン | In−Ga−Zn−O膜の成膜方法 |
CN101952950B (zh) * | 2008-02-28 | 2012-08-01 | 株式会社爱发科 | 搬送装置、真空处理装置、以及搬送方法 |
-
2009
- 2009-10-07 KR KR1020117005762A patent/KR20110051247A/ko active Search and Examination
- 2009-10-07 CN CN200980139868.7A patent/CN102177577B/zh active Active
- 2009-10-07 WO PCT/JP2009/005227 patent/WO2010041446A1/ja active Application Filing
- 2009-10-07 JP JP2010532819A patent/JP5142414B2/ja active Active
- 2009-10-07 US US13/122,584 patent/US20110180402A1/en not_active Abandoned
- 2009-10-08 TW TW98134116A patent/TWI471447B/zh active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH03274746A (ja) * | 1990-03-24 | 1991-12-05 | Sony Corp | マルチチャンバ装置 |
JP2007039157A (ja) * | 2005-08-01 | 2007-02-15 | Ulvac Japan Ltd | 搬送装置、真空処理装置および搬送方法 |
Also Published As
Publication number | Publication date |
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WO2010041446A1 (ja) | 2010-04-15 |
CN102177577A (zh) | 2011-09-07 |
JPWO2010041446A1 (ja) | 2012-03-08 |
KR20110051247A (ko) | 2011-05-17 |
CN102177577B (zh) | 2015-08-26 |
US20110180402A1 (en) | 2011-07-28 |
TW201026874A (en) | 2010-07-16 |
JP5142414B2 (ja) | 2013-02-13 |
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