TWI469948B - Oxide sintered body and oxide semiconductor thin film - Google Patents

Oxide sintered body and oxide semiconductor thin film Download PDF

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TWI469948B
TWI469948B TW100124010A TW100124010A TWI469948B TW I469948 B TWI469948 B TW I469948B TW 100124010 A TW100124010 A TW 100124010A TW 100124010 A TW100124010 A TW 100124010A TW I469948 B TWI469948 B TW I469948B
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sintered body
oxide
film
oxide semiconductor
thin film
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TW201209006A (en
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Hideo Takami
Kozo Osada
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Jx Nippon Mining & Metals Corp
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Description

氧化物燒結體及氧化物半導體薄膜
本發明係關於一種對製作顯示裝置中之薄膜電晶體有用之氧化物燒結體及氧化物半導體薄膜。
氧化物半導體除了用作液晶顯示裝置、電漿顯示裝置及有機EL顯示裝置等顯示裝置中之薄膜電晶體的活性層以外,亦用作太陽電池及觸控面板等之電極。先前,氧化物半導體已知有透明之In-Ga-Zn-O系(以下,記載為「IGZO系」)(參考非專利文獻1),進而亦有關於意圖改善特性而添加錫(Sn)系之報告(參考專利文獻1及2)。然而,由於該等系之必需構成要素之鎵(Ga)為稀有元素,且價格亦高等,故而於產業上大量地使用存在較大制約。
作為不使用Ga之透明氧化物半導體,有In-Zn-O系(參考專利文獻3)、In-Zn-Sn-O系(參考專利文獻4)、及Zn-Sn-O系(參考專利文獻5)之報告。
專利文獻1:日本特開2008-280216號公報
專利文獻2:日本特開2010-118407號公報
專利文獻3:日本特開2007-142195號公報
專利文獻4:日本特開2008-243928號公報
專利文獻5:日本特開2007-142196號公報
非專利文獻1:Nature 432、p488-492、October 2004
於上述專利文獻3~5所記載之氧化物半導體中,不使用作為IGZO系之必需構成要素的Ga,雖在製造成本方面有利,但殘留有電阻率之經時變化等之環境穩定性較差等問題。又,IGZO系之其他必需構成要素的鋅(Zn)係容易揮發之元素,且成為妨礙以下膜之穩定性之主要原因:由製造燒結體時之揮發所導致之燒結體密度下降、由濺鍍成膜時之揮發所導致之與靶組成之偏差、膜之電阻率之經時變化等。
因此,本發明之課題在於提供一種用於製造不含為稀有資源且高價之鎵(Ga)及容易揮發且膜之穩定性存在問題之鋅(Zn)的氧化物半導體膜之氧化物燒結體。又,本發明之另一課題在於提供一種與該氧化物燒結體具有相同組成之氧化物半導體薄膜。
本發明人為了解決上述課題而進行潛心研究,結果發現:藉由使用氧化物穩定之鎂(Mg)代替容易揮發之鋅(Zn),使用與鎵同樣為3價金屬元素之鋁(Al)與鐵(Fe)及4價金屬元素錫(Sn)與鈦(Ti)代替稀有且高價之元素鎵(Ga),進而調整該等之原子數比、燒結體或膜之製造條件等,可獲得用於製造不含鎵(Ga)及鋅(Zn)之氧化物半導體膜的氧化物燒結體及氧化物半導體薄膜。
將以上之見解作為基礎而完成之本發明於一型態中,係一種氧化物燒結體,其由銦(In)、鎂(Mg)、金屬元素X(其中,X表示選自Al、Fe、Sn、Ti之1種以上的元素)、氧(O)所構成,銦(In)、鎂(Mg)、及金屬元素X之原子數比分別滿足0.2≦[In]/[In+Mg+X]≦0.8、0.1≦[Mg]/[In+Mg+X]≦0.5、及0.1≦[X]/[In+Mg+X]≦0.5。
本發明之氧化物燒結體於另一實施形態中相對密度為98%以上。
本發明之氧化物燒結體進而於另一實施形態中體電阻(bulk resistance)為3mΩ以下。
本發明於另一型態中,係一種氧化物半導體薄膜,其由銦(In)、鎂(Mg)、金屬元素X(其中,X表示選自Al、Fe、Sn、Ti之1種以上的元素)、氧(O)所構成,銦(In)、鎂(Mg)、金屬元素X之原子數比滿足0.2≦[In]/[In+Mg+X]≦0.8、0.1≦[Mg]/[In+Mg+X]≦0.5、0.1≦[X]/[In+Mg+X]≦0.5。
本發明之氧化物半導體薄膜於另一實施形態中為非晶質。
本發明之氧化物半導體薄膜進而於另一實施形態中載體濃度為1016 ~1018 cm-3
本發明之氧化物半導體薄膜進而於另一實施形態中遷移率為1cm2 /Vs以上。
本發明進而於另一型態中,係一種薄膜電晶體,其具備上述氧化物半導體薄膜作為活性層。
本發明進而於另一型態中,係一種主動矩陣驅動顯示面板,其具備上述薄膜電晶體。
根據本發明,可提供一種用於製造不含為稀有資源且高價之鎵(Ga)及容易揮發且膜之穩定性存在問題之鋅(Zn)的氧化物半導體膜之氧化物燒結體。又,根據本發明,可提供一種與該氧化物燒結體具有相同組成之氧化物半導體薄膜。
(氧化物燒結體之組成)
本發明之氧化物燒結體以銦(In)、鎂(Mg)、金屬元素X(其中,X表示選自Al、Fe、Sn、Ti之1種以上之元素)、氧(O)作為構成元素。其中,本發明之燒結體包含有:含有不可避免地含有之濃度程度,例如各元素10ppm左右之通常於可獲得之原料之純化步驟中不可避免地含有之元素、或於氧化物燒結體之製造過程中不可避免地混入之雜質元素者。
銦之原子數相對於銦、鎂及金屬元素X之合計原子數之比[In]/[In+Mg+X]為0.2~0.8。若[In]/[In+Mg+X]未達0.2,則製作靶時之相對密度變小,體電阻上升,容易產生濺鍍時之異常放電。若[In]/[In+Mg+X]超過0.8,則濺鍍該組成之靶所獲得之膜的載體濃度變得過高,作為電晶體之通道層之開關比變小。較期望[In]/[In+Mg+X]為0.25~0.6之範圍,更期望為0.3~0.5之範圍。此處,[In]表示銦之原子數,[Mg]表示鎂之原子數,[X]表示金屬元素X之原子數。
鎂之原子數相對於銦、鎂及金屬元素X之合計原子數之比[Mg]/([In]+[Mg]+[X])為0.1~0.5。若[Mg]/([In]+[Mg]+[X])未達0.1,則膜之載體濃度變得過大,容易產生濺鍍時之異常放電。若[Mg]/([In]+[Mg]+[X])超過0.5,則製作靶時之相對密度減小。較期望[Mg]/([In]+[Mg]+[X])為0.15~0.4之範圍,更期望為0.2~0.35之範圍。
金屬元素X之合計原子數相對於銦、鎂及金屬元素X之合計原子數之比[X]/([In]+[Mg]+[X])為0.1~0.5。若[X]/([In]+[Mg]+[X])未達0.1,則濺鍍該組成之靶所獲得之膜的載體濃度變得過高,作為電晶體之通道層之開關比變小。反之,若[X]/([In]+[Mg]+[X])超過0.5,則製作靶時之相對密度減小,體電阻上升,容易產生濺鍍時之異常放電。較期望[X]/([In]+[Mg]+[X])為0.15~0.4之範圍,更期望為0.2~0.35之範圍。
(氧化物燒結體之相對密度)
氧化物燒結體之相對密度與濺鍍時之表面之結球(nodule)產生相關。若氧化物燒結體為低密度,則將該氧化物燒結體加工為靶而進行濺鍍成膜時,隨著濺鍍之成膜之經過,而於表面產生突起狀之稱作結球的銦之低級氧化物的高電阻部分,容易於其後之濺鍍時成為異常放電之起點。本發明中,可藉由組成之適當範圍或製造條件之適當化而使氧化物燒結體之相對密度為98%以上,若為該程度之高密度,則幾乎沒有由濺鍍時之結球所導致之惡性影響。相對密度較佳為99%以上,更佳為99.5%以上。
再者,氧化物燒結體之相對密度可藉由如下方法求得:根據將氧化物燒結體加工為特定形狀後之重量與外形尺寸算出之密度除以該氧化物燒結體之理論密度。
(氧化物燒結體之體電阻)
氧化物燒結體之體電阻與濺鍍時產生異常放電之容易度相關,若體電阻較高,則於濺鍍時容易產生異常放電。本發明中,可藉由組成之適當範圍或製造條件之適當化而使體電阻為3mΩcm以下。若為該程度之低體電阻,則幾乎不會對濺鍍時之異常放電產生造成惡性影響。體電阻較佳為2.7mΩcm以下,更佳為2.5mΩcm以下。
再者,體電阻可藉由四探針法使用電阻率計而進行測定。
(氧化物燒結體之製造方法)
本發明之各種組成之氧化物燒結體可藉由調整例如作為原料之氧化銦、氧化鎂等各原料粉體之摻合比或原料粉體之粒徑、粉碎時間、燒結溫度、燒結時間、燒結環境氣體種類等條件而獲得。
期望原料粉為平均粒徑1~2μm。若平均粒徑超過2μm,則燒結體之密度難以提高,因此對該原料粉之單獨或混合粉進行濕式微粉碎等,較佳為使平均粒徑縮小至約1μm左右。於濕式混合粉碎前為了提高燒結性,進行預燒亦有效。另一方面,難以獲得未達1μm之原料,又,若過小則變得容易引起粒子間之凝聚而難以處理。此處,原料粉之平均粒徑係指藉由雷射繞射式之測定方法而測定之值。較佳為於利用噴霧乾燥機等對粉碎後之原料混合粉進行造粒而提高流動性或成形性之後進行成型。成型可採用通常之加壓成形或冷均壓加壓(cold isostaric pressurization)等方法。其後,燒結成形物而獲得燒結體。燒結較佳為於1400~1600℃下進行2~20小時。藉此可使相對密度成為98%以上。燒結溫度未達1400℃時,密度難以提高,若燒結溫度超過1600℃,則由於構成成分元素之揮發等而使燒結體之組成發生變化,或者成為因揮發而產生之空隙所造成之密度下降的原因。燒結時之環境氣體可使用大氣,可藉由燒結體之揮發抑制效果而獲得高密度之燒結體。其中,根據燒結體之組成,即便將環境氣體設為氧,亦可獲得充分高密度之燒結體。
(濺鍍成膜)
以上述方式獲得之氧化物燒結體可藉由施以磨削或研磨等加工而製成濺鍍用靶,可藉由使用其進行成膜而形成與該靶具有相同組成之氧化物膜。於加工時,期望藉由利用平面磨削等方法對表面進行磨削而使表面粗糙度(Ra)為5μm以下。藉由減小表面粗糙度,可使成為異常放電之原因的結球產生之起點減少。
將濺鍍用靶貼附於銅製等之支持板,設置於濺鍍裝置內,在適當之真空度、環境氣體、濺鍍功率等適當條件下進行濺鍍,藉此可獲得組成幾乎與靶相同之膜。
於濺鍍法之情形時,期望使成膜前之腔室內之極限真空為2×10-4 Pa以下。若壓力過高,則由於殘留環境氣體中之雜質之影響,而存在所獲得之膜之遷移率降低之可能性。
可使用氬及氧之混合氣體作為濺鍍氣體。調整混合氣體中之氧濃度之方法,可使用例如氬100%之儲氣罐與氬中之氧為2%之儲氣罐,利用質量流量計適當設定自各儲氣罐向腔室之供給流量而進行。此處,所謂混合氣體中之氧濃度係表示氧分壓/(氧分壓+氬分壓)者,與氧之流量除以氧與氬之合計流量所得者亦相等。氧濃度根據所需之載體濃度進行適當變更即可,典型地可設為1~3%,更為典型地可設為1~2%。
使濺鍍氣體之全壓為0.3~0.8Pa左右。若全壓低於該壓力,則電漿放電變得難以產生,即便產生,電漿亦變得不穩定。又,若全壓高於該壓力,則成膜速度變慢,產生對生產性造成惡性影響等不良情形。
於靶尺寸為6英吋之情形時,係於濺鍍功率為200~1200W左右下進行成膜。若濺鍍功率過小,則成膜速度變慢,生產性惡化,反之若過大,則產生靶之龜裂等問題。200~1200W若換算為濺鍍功率密度,則為1.1W/cm2 ~6.6W/cm2 ,且期望為3.2~4.5W/cm2 。此處,所謂濺鍍功率密度係濺鍍功率除以濺鍍靶之面積所得者,且即便濺鍍功率相同,根據濺鍍靶尺寸,濺鍍靶實際所受到之功率亦有差異,成膜速度亦不同,因此濺鍍功率密度為用以統一地表現對濺鍍靶所施加之功率之指標。
由氧化物燒結體獲得膜之方法,雖亦可使用真空蒸鍍法、離子電鍍法、PLD(脈衝雷射蒸鍍)法等,但於產業上易於利用的是滿足大面積、高速成膜、放電穩定性等必要條件之DC磁控濺鍍法。
於濺鍍成膜時,無需加熱基板。此係因為即便不加熱基板,亦可獲得相對較高之遷移率,又,無須花費用以升溫之時間或能量。若不加熱基板而進行濺鍍成膜,則所獲得之膜成為非晶質。其中,藉由加熱基板,亦可期待獲得與室溫成膜後之退火相同之效果,因此亦可藉由基板加熱進行成膜。
(氧化物膜之載體濃度)
氧化物膜之載體濃度於將該膜用於電晶體之通道層時與電晶體之各種特性相關。若載體濃度過高,則即便於電晶體關閉時,亦產生微量洩漏電流,開關比降低。另一方面,若載體濃度過低,則通過電晶體之電流減少。本發明中,可藉由組成之適當範圍等而使氧化物膜之載體濃度成為1016 ~1018 cm-3 ,若為該範圍,則可製作特性良好之電晶體。
(氧化物膜之遷移率)
遷移率於電晶體之特性之中亦為最重要之特性之一,且期望其在作為將氧化物半導體用作為電晶體之通道層的競爭材料之非晶質矽的遷移率1cm2 /Vs以上。遷移率基本上越高越好。本發明之氧化物膜可藉由組成之適當範圍等而具有1cm2 /Vs以上之遷移率,較佳為可具有3cm2 /Vs以上之遷移率,更佳為可具有5cm2 /Vs以上之遷移率。藉此,成為比非晶質矽優異之特性,產業上之可應用性進一步提高。
本發明之氧化物半導體薄膜可用作例如薄膜電晶體之活性層。又,可將使用上述製造方法所獲得之薄膜電晶體用作為主動元件,利用於主動矩陣驅動顯示面板。
[實施例]
以下一同表示本發明之實施例與比較例,該等實施例係為更好地理解本發明及其優點而提供者,並非意圖限定發明。因此,本發明係於本發明之技術思想之範圍內包含所有實施例以外之態樣或變形者。
下述實施例及比較例中,燒結體及膜之物性藉由以下方法進行測定。
(1)燒結體及膜之組成
使用SII Nanotechnology公司製造之型號SPS3000,藉由ICP(高頻感應耦合電漿)分析法而求出。
(2)燒結體之相對密度
根據重量及外形尺寸之測定結果與構成元素之理論密度而求出。
(3)燒結體之體電阻
藉由四探針法(JIS K7194),使用NPS公司製造之型號Σ-5+裝置而求出。
(4)膜厚
使用段差計(Veeco公司製造,型號Dektak8 STYLUS PROFILER)而求出。
(5)膜之載體濃度及遷移率
將經成膜之玻璃基板切下約10mm見方,於四角設置銦電極,設置於霍爾量測裝置(東陽技術公司製造,型號Resitest8200)進行測定。
(6)膜之結晶或非晶質結構
使用RIGAKU公司製造之RINT-1100X射線繞射裝置判定結晶性。藉由該X射線繞射,因未發現背景水準以上之顯著波峰,故判定為非晶質。
(7)粉體之平均粒徑
粉體之平均粒徑藉由島津製作所製造之SALD-3100進行測定。
<實施例1>
將氧化銦粉(平均粒徑1.0um)、氧化鎂粉(平均粒徑1.0μm)、及氧化鋁粉(平均粒徑1.0μm)以金屬元素之原子數比(In:Mg:Al)成為0.4:0.3:0.3之方式進行秤量,並進行濕式混合粉碎。粉碎後之混合粉之平均粒徑為0.8μm。利用噴霧乾燥機將該混合粉造粒後填充於模具,進行加壓成型後,於空氣環境中於1450℃之高溫下燒結10小時。將所獲得之燒結體加工為直徑6英吋、厚度6mm之圓盤狀而製成濺鍍靶。關於該靶,根據重量與外形尺寸之測定結果與理論密度算出相對密度,結果為99.8%。又,藉由四探針法所測定之燒結體之體電阻為2.1mΩcm。
使用銦作為焊料而將上述製作之濺鍍靶貼附於銅製之支持板,設置於DC磁控濺鍍裝置(ANELVA製造之SPL-500濺鍍裝置)。玻璃基板使用Corning 1737,將濺鍍條件設為基板溫度:25℃、極限壓力:1.2×10-4 Pa、環境氣體:Ar99%、氧1%、濺鍍壓力(全壓):0.5Pa、輸入電力500W,製作膜厚約為100nm之薄膜。於氧化物半導體薄膜之成膜時,未發現異常放電。
進行所得膜之霍爾量測,求出載體濃度及遷移率。又,X射線繞射之測定之結果,該膜為非晶質。
<實施例2~實施例15>
除了以成為表1中所記載之各值之方式設定原料粉之組成比以外,以與實施例1相同之方式獲得氧化物燒結體及氧化物半導體薄膜。各自之相對密度、體電阻、載體濃度、遷移率如表1所示。又,燒結體及膜之組成與各原料粉之組成比相同。氧化物半導體薄膜之成膜時,未發現異常放電。
<比較例1~比較例12>
除了以成為表1中所記載之各值之方式設定原料粉之組成比以外,以與實施例1相同之方式獲得氧化物燒結體及氧化物半導體薄膜。各自之相對密度、體電阻、載體濃度、遷移率如表1所示。又,燒結體及膜之組成與各原料粉之組成比相同。
實施例1~15中,載體濃度於1016 ~1018 cm-3 之範圍內,且遷移率為1cm2 /Vs以上。
另一方面,比較例1、4、6、8、10、12中,載體濃度未達1016 cm-3 ,且遷移率未達1cm2 /Vs。
又,比較例2、3、5、7、9、11中,載體濃度超過1018 cm-3

Claims (7)

  1. 一種氧化物燒結體,其由銦(In)、鎂(Mg)、金屬元素X(其中,X表示選自Al、Fe、Sn、Ti之1種以上的元素)、氧(O)所構成,銦(In)、鎂(Mg)、及金屬元素X之原子數比分別滿足0.2≦[In]/[In+Mg+X]≦0.6、0.1≦[Mg]/[In+Mg+X]≦0.5、及0.1≦[X]/[In+Mg+X]≦0.5;其體電阻為3mΩcm以下。
  2. 如申請專利範圍第1項之氧化物燒結體,其相對密度為98%以上。
  3. 一種氧化物半導體薄膜,係由申請專利範圍第1或2項之氧化物燒結體製作而成,其載體濃度為1016 ~1018 cm-3
  4. 如申請專利範圍第3項之氧化物半導體薄膜,其係非晶質。
  5. 如申請專利範圍第3或4項之氧化物半導體薄膜,其遷移率為1cm2 /Vs以上。
  6. 一種薄膜電晶體,其具備有申請專利範圍第3或4項之氧化物半導體薄膜作為活性層。
  7. 一種主動矩陣驅動顯示面板,其具備有申請專利範圍第6項之薄膜電晶體。
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