TWI451545B - 凸塊墊結構及其製造方法 - Google Patents

凸塊墊結構及其製造方法 Download PDF

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TWI451545B
TWI451545B TW099114442A TW99114442A TWI451545B TW I451545 B TWI451545 B TW I451545B TW 099114442 A TW099114442 A TW 099114442A TW 99114442 A TW99114442 A TW 99114442A TW I451545 B TWI451545 B TW I451545B
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Taiwan
Prior art keywords
pad
layer
bump
metal
aluminum
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TW099114442A
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English (en)
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TW201041108A (en
Inventor
Haoyi Tsai
Hsienwei Chen
Yuwen Liu
Yingju Chen
Hsiuping Wei
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Taiwan Semiconductor Mfg
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Publication of TW201041108A publication Critical patent/TW201041108A/zh
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Description

凸塊墊結構及其製造方法
本申請案主張於2009年5月8日申請之美國臨時專利申請案編號第61/176522號，名稱為「凸塊墊結構(Bump Pad Structure)」的有利條件，在此將此申請案一併列入參考。
本發明一般是有關於一種半導體元件之凸塊墊結構，且特別是有關於一種覆晶裝置(Flip Chip Assembly)之凸塊墊結構。
一覆晶封裝包含面朝下的半導體晶片，此半導體晶片利用銲接凸塊電性與物理性地(mechanically)貼附於基材。因覆晶封裝之可擴縮性(scalability)而可允許覆晶封裝使用在較小之應用中，因此覆晶封裝通常優於其他傳統封裝。但隨著覆晶封裝之尺寸的縮減，以及低介電常數介電質之使用的增加，源自於施加在覆晶封裝上的機械應力，可能導致與凸塊墊金屬和低介電常數介電質有關的問題發生。
第1A圖係繪示銲接凸塊墊及其下方內連線結構之一部分的剖面圖。銲接凸塊2實體地連接至凸塊底層金屬(UBM)墊4，且凸塊底層金屬墊4透過半導體晶片上之外鈍化層6中之開口而與鋁墊8連接。鋁墊8位在內鈍化層10上。內鈍化層10位於未摻雜矽玻璃(USG)層12之上，而未摻雜矽玻璃層12位於低介電常數層14上。未摻雜矽玻璃層12可包含多個包含電路系統之獨立金屬層。鋁線路16電性耦合鋁墊8至內連線結構中之鋁接觸18。介層窗20a、20b與20c經由內鈍化層10，而將鋁接觸18連接至接觸22。接觸22透過數個介層窗24而耦合至另一接觸26。另外的接觸與介層窗可包含如半導體元件所要求之內連線結構。
第1B圖係繪示凸塊底層金屬墊4、鋁墊8、鋁線路16、鋁接觸18、及介層窗20a、20b與20c之布局。外八邊形區域代表鋁墊8。中間之八邊形區域代表凸塊底層金屬墊4。內八邊形區域代表凸塊底層金屬墊4之凹陷部。
第1A圖與第1B圖所示之凸塊墊一般應用在覆晶裝置上。因覆晶裝置之可應用在較小科技之可擴縮性，覆晶裝置較適用於最新之科技中。此外，隨著裝至尺寸的縮減，特別是22nm科技，且隨著低介電常數介電質的使用變得更為普遍，特別是當介電常數值低於2.5，來自於凸塊墊之機械應力的衝擊也隨之增加。凸塊墊上的應力，例如半導體元件與附著之封裝基材之間的熱膨脹係數(CTE)的不匹配所造成之剝離或剪應力，可因源自於弱化之凸塊墊而造成之半導體元件的機械故障，例如未摻雜矽玻璃、低介電常數介電質或銲接凸塊的破裂。
另一常用在覆晶技術中的結構為銅上直凸塊(Direct Bump On Copper；DBOC)結構。在DBOC結構中，凸塊底層金屬與上金屬化層之銅金屬直接接觸。無鋁墊或內鈍化層應用在DBOC結構中。無鋁墊或內鈍化層來作為緩衝，DBOC結構通常具有較低之機械強度，而遭受如同上述之相同問題。因此，習知技術需要一種具有增強之機械強度的凸塊墊，以克服習知技術缺點，
本發明之目的就是在提供一種凸塊接合墊結構極其製造方法。藉由本發明之實施例通常可解決或防止這些與其他問題，且通常可達到技術優點，其中本發明之實施例增加凸塊接合墊結構之機械強度。因此，可保護未摻雜矽玻璃層與低介電常數介電層之間的界面。
根據本發明之一實施例，一種凸塊接合墊結構包含：一基材，包含一上層；一強化墊位於此上層上；一中間層位於上層之上方；一中間連接墊位於中間層上；一外層位於中間層之上方；以及一凸塊底層金屬經由外層中之開口連接至中間連接墊。
根據本發明之另一實施例，一種凸塊接合墊結構包含：一銅墊位於一基材之上層上；一鋁墊位於一內鈍化層上；一介層窗物理性地耦合銅墊至鋁墊；以及一凸塊底層金屬經由外鈍化層中之開口，物理性地且電性耦合至鋁墊。內鈍化層位於基材之上層上。
根據本發明之又一實施例，一種凸塊接合墊結構之製造方法，此方法包含：形成一強化墊於一基材之上層上；形成一中間層於基材之上層上；形成一中間連接墊於中間層上，且一介層窗經由中間層而將中間連接墊耦合至強化墊；形成一外層於基材上；以及形成一凸塊底層金屬於外層之開口中，以將凸塊底層金屬耦合至中間連接墊。
本發明之一實施例的優點為，因結構之楊氏係數(Young’s Modulus)的增加而在未摻雜矽玻璃與低介電常數介電層之間的界面上所造成的應力，大致上可獲得縮減。楊氏係數的增加通常會造成整體結構具有更大之機械強度。
較佳實施例的製造與應用將詳細討論如下。然而，應該了解的一點是，本發明提供許多可應用的創新概念，這些創新概念可在各種特定背景中加以體現。所討論之特定實施例僅係用以舉例說明製造與應用本發明之特定方式，並非用以限制本發明之範圍。
本發明將以特定背景，稱之為覆晶裝置之凸塊墊，的數個實施例來描述。然而，本發明亦可應用在任何使用銲接凸塊墊之封裝裝置，例如DBOC結構。
第2圖係繪示本發明之第一實施例。銲接凸塊30實體上連接至下凸塊底層金屬墊32，而凸塊底層金屬墊32經由半導體晶片上之外鈍化層34中的開口連接至鋁墊36。鋁墊36設置在內鈍化層38上。內鈍化層38位於未摻雜矽玻璃層42之上方，而未摻雜矽玻璃層42位於低介電常數介電層44上。實心銅墊40位於未摻雜矽玻璃層42上，且位於銅墊36之下方。低介電常數介電層44亦可包含電路系統46。這些層亦可包含任何其他已知配置或材料。舉例而言，低介電常數介電層44可以另一未摻雜矽玻璃層替代。此外，未繪示於第2圖與後續之第3圖和第8圖的是鋁線路，此鋁線路電性耦合內連線結構至鋁墊36。
第3圖描繪另一實施例。第3圖之結構相同於第2圖，除了第3圖之結構具有數個介層窗48，這些介層窗48將鋁墊36連接至銅墊40。
這些實施例降低施加在未摻雜矽玻璃層42與低介電常數介電層44之應力。第4圖係一曲線圖，其繪示出未摻雜矽玻璃層42與低介電常數介電層44之間的界面處的應力縮減。傳統鋁墊描繪在第1A圖中。具有銅墊之鋁墊繪示於第2圖中，且具有銅墊與介層窗連接之鋁墊繪示在第3圖中。以傳統墊作為基線，來正規化界面上之應力。鋁墊與銅墊結構(第2圖)在剝離應力上具有正規化基線9%的縮減，在剪應力上具有正規化基線12%的縮減。具有介層窗之鋁墊與銅墊結構(第3圖)在剝離應力上具有正規化基線15%的縮減，在剪應力上具有正規化基線22%的縮減。
在界面上之應力的縮減大致上係由藉增加銅墊40所造成之楊氏係數的增加所造成。低介電常數介電質之楊氏係數約為10GPa，而未摻雜矽玻璃之楊氏係數約為70GPa。然而，銅之楊氏係數約為218GPa。因此，將銅***結構中將大致上可增加結構之楊氏係數，以增加機械強度，藉以提供界面較佳之保護。
不僅此型式之結構的應用可影響施加在未摻雜矽玻璃層42上之應力，而且銅墊40之尺寸也可影響這些應力。第5圖係一曲線圖，其繪示出銅墊40之尺寸可如何的影響應力。曲線圖之x軸為差Δ，其單位為微米。差Δ代表第3圖所示之凸塊底層金屬墊32的外接圓半徑與銅墊40之外接圓半徑的差。在第5圖中，根據一基線來正規化未摻雜矽玻璃層42與低介電常數介電層44之間的界面上的應力，此基線係當銅墊40之外接圓半徑等於凸塊底層金屬墊32之外接圓半徑，如此差Δ為零。如第5圖之曲線圖所示，應力隨著差Δ的增加而減少，且一旦差Δ超過5微米，正規化應力的減少相對小。如此，可說差Δ在5微米時變飽和。因此，差Δ較佳為約5微米，雖然差Δ可為任何可能的尺寸。
此外，用以將鋁墊36連接至銅墊40之介層窗48的佈局，可影響施加在未摻雜矽玻璃層42與低介電常數介電層44上之應力。第6A圖至第6D圖係繪示介層窗48之數種示範性佈局。第6A圖繪示具有實心八邊形介層窗48a。虛線表示凸塊底層金屬墊32之佈局，實線為銅墊40。大體而言，凸塊底層金屬墊32之外接圓半徑介於約75與120微米之間，而鋁墊36(未繪示於圖中)之外接圓半徑約大於凸塊底層金屬墊32之外接圓半徑4微米。第6B圖繪示八邊形環狀介層窗48b，其中介層窗48b之外側的外接圓半徑大於介層窗48b之內側的外接圓半徑10微米。第6C圖繪示八邊形環狀介層窗48c，其中介層窗48c之外側的外接圓半徑大於介層窗48c之內側的外接圓半徑20微米。第6B圖與第6C圖中之介層窗的表面積分別為鋁墊36之表面積的28.4%與52.1%。此外，八邊形環狀介層窗48b與48c之內側與外側外接圓半徑之間的差距可增加或減少，例如至5微米或至25微米。具有5微米之差距時，介層窗之表面積為鋁墊36之14.8%，而具有25微米之差距時，介層窗之表面積為鋁墊36之62.1%。第6D圖繪示5×5陣列之介層窗48b。由第6A圖至第6D圖之示範佈局可知，銅墊40之平面視圖的形狀與凸塊底層金屬墊32之平面視圖的形狀對應。
第7圖係一曲線圖，其繪示出這些不同佈局如何影響未摻雜矽玻璃層42與低介電常數介電層44之界面的應力。第6A圖之實心八邊形介層窗48a作為基線，而其他所有佈局根據此基線進行正規化。從此曲線圖中，可看出在經正規化後之應力從基線縮減至第6C圖中之20微米八邊形環狀介層窗48c，繼續縮減至第6D圖中之5×5陣列介層窗48d，再縮減至第6B圖中之10微米八邊形環狀介層窗48b。
上述實施例之缺點為未摻雜矽玻璃層42中之銅墊40需要更多面積，或者未摻雜矽玻璃層42必須包含一額外金屬層。相較於第1A圖中之凸塊墊，本發明之實施例在未摻雜矽玻璃層42中之上金屬層上需要一區域來放置銅墊40。這樣可能需要在上金屬層上重新設定電路系統的線路，以清出銅墊40之區域。替代性地，可在未摻雜矽玻璃層42中加入額外金屬層，以放置銅墊40。如此將不需要重新設定已存半導體元件設計中之電路系統的線路，但加入此額外金屬層所增加之處理與材料，將會導致花費更多。
第8圖係繪示類似於第3圖所示之實施例的另一實施例，除了第二銅墊52位於未摻雜矽玻璃層24下方與低介電常數介電層44上。數個介層窗50將銅墊40連接至第二銅墊52。根據第6A圖至第6D圖之介層窗佈局，介層窗50可為一或許多單獨的介層窗，或者可為一介層窗。此外， 可將更多銅墊加入第8圖所示之結構中。這些銅墊可位於包含未摻雜矽玻璃層42之多重金屬層中，或者可位於未摻雜矽玻璃層42與低介電常數介電層44中。多個銅墊可利用介層窗來予以連接，或者可不連接。第二銅墊22的加入可進一步增加結構之楊氏係數，因而可增加結構的整體機械強度。
實施例的其他特徵包含較厚之鋁墊36及/或鋁線路、較厚之未摻雜矽玻璃層42、或僅具有數個介層窗48穿過內鈍化層38而不具有下方銅墊。鋁墊36之厚度一般約為1.45微米。將此厚度增加至例如2.5微米，可增加結構之機械強度，而將可提供未摻雜矽玻璃層42與低介電常數介電層44更多的保護。同樣地，增加未摻雜矽玻璃層42之厚度，可增加未摻雜矽玻璃層42之機械強度，藉以愈來愈強地保護未摻雜矽玻璃層42與低介電常數介電層44。可藉由增加未摻雜矽玻璃層42中之已存在之層的厚度、或藉由在未摻雜矽玻璃層42中加入數層新的層的方式，來增加未摻雜矽玻璃層42之厚度。此外，穿過內鈍化層38且不具有下方銅墊之數個介層窗48可增加超越傳統凸塊墊之結構的機械強度。
第9A圖至第9M圖係繪示依照另一實施例之一種製造第3圖之凸塊墊結構的製程。在第9A圖中，形成未摻雜矽玻璃層100於低介電常數介電層(未繪示)上。在第9B圖中，圖案化光阻層102於未摻雜矽玻璃層100上，以暴露出未摻雜矽玻璃層100之將進行數個內連線介層窗開口104之蝕刻處。接著，利用已知的微影技術，蝕刻內連線 介層窗開口104。在第9C圖中，接下來以數個插塞(Plug)106部分填充內連線介層窗開口104，再移除光阻層102。在第9D圖中，形成另一光阻層108於未摻雜矽玻璃層100上，並圖案化此光阻層108，以暴露出未摻雜矽玻璃層100中將形成在內連線介層窗開口104上之內連線接觸之處、與將形成銅墊之處。接著，利用已知的微影技術，將未摻雜矽玻璃層100蝕刻到至少插塞106之頂部的深度。
在第9E圖中，移除光阻層108與插塞106。接下來，沉積銅110於未摻雜矽玻璃層100上。在沉積銅110之前，可利用物理氣相沉積方式形成擴散阻障層。而且，於形成擴散阻障層之後，但在沉積銅110之前，可形成銅晶種層(Copper Seed Layer)，以利電鍍。在第9F圖中，利用例如化學機械研磨移除任何多餘之銅110。這樣形成數個內連線介層窗112、內連線接觸114與銅墊116。替代性地，傳統雙鑲嵌製程步驟可應用來形成內連線介層窗112、內連線接觸114與銅墊116。
在第9G圖中，沉積第一鈍化層118於未摻雜矽玻璃層100之上方。在第9H圖中，形成光阻層120於第一鈍化層118上。圖案化光阻層120，以暴露出第一鈍化層118位於內連線接觸114與銅墊116上之數個部分。接著，利用已知微影技術蝕刻第一鈍化層118，而留下數個介層窗開口122與124。在第9I圖中，移除光阻層120，且沉積鋁126。鋁126填充介層窗開口122，而形成鋁內連線介層窗128，且填充介層窗開口124，而形成鋁介層窗130。在第9J圖中，形成光阻層132於鋁126上方，並圖案化此光阻層132， 以形成鋁內連線接觸134、鋁線路136與鋁墊138。接著，蝕刻鋁126之圖案。接著，蝕刻鋁126，而形成這些構件。
在第9K圖中，移除光阻層132，再沉積第二鈍化層140於此結構上。在第9L圖中，形成光阻層142於第二鈍化層140上，並圖案化此光阻層142，以暴露出鋁墊138上方之第二鈍化層140的一部分。接著，向下蝕刻第二鈍化層140至鋁墊138，而留下凸塊底層金屬開口144。在第9M圖中，移除光阻層142，再形成凸塊底層金屬墊146於凸塊底層金屬開口144中，此凸塊底層金屬墊146與鋁墊138連接。
雖然本發明及其優點已詳細描述如上，然應該了解到的一點是，在不偏離后附申請專利範圍所界定之本發明的精神與範圍下，當可在此進行各種改變、取代以及修正。舉例而言，雖然上述實施例的許多特徵已包含銅或鋁，然而每個特徵可包含同來取代上述之鋁，或反之亦然。如另一個例子，熟習此項技藝者將可輕易地了解到，以上所描述之各層，例如鈍化層、未摻雜矽玻璃層與介電層，可無需為依照上述實施例之結構中所描述之層。
此外，本申請案之範圍並非限制在說明書所描述之製程、機械、製造、物質成分、手段、方法以及步驟的特定實施例中。任何在此技術領域中具有通常知識者，將可輕易從本發明之揭露中了解到，現存或日後所發展出之可與在此所描述之對應實施例執行實質相同之功能、或達到實質相同之結果的製程、機械、製造、物質成分、手段、方法或步驟，可依據本發明來加以應用。因此，所附之申請 專利範圍係用以將這類製程、機械、製造、物質成分、手段、方法或步驟含括在其範圍內。
2‧‧‧銲接凸塊
4‧‧‧凸塊底層金屬墊
6‧‧‧外鈍化層
8‧‧‧鋁墊
10‧‧‧內鈍化層
12‧‧‧未摻雜矽玻璃層
14‧‧‧低介電常數層
16‧‧‧鋁線路
18‧‧‧鋁接觸
20a‧‧‧介層窗
20b‧‧‧介層窗
20c‧‧‧介層窗
22‧‧‧接觸
24‧‧‧介層窗
26‧‧‧接觸
30‧‧‧銲接凸塊
32‧‧‧凸塊底層金屬墊
34‧‧‧外鈍化層
36‧‧‧鋁墊
38‧‧‧內鈍化層
40‧‧‧銅墊
42‧‧‧未摻雜矽玻璃層
44‧‧‧低介電常數介電層
46‧‧‧電路系統
48‧‧‧介層窗
48a‧‧‧介層窗
48b‧‧‧介層窗
48c‧‧‧介層窗
48d‧‧‧介層窗
50‧‧‧介層窗
52‧‧‧銅墊
100‧‧‧未摻雜矽玻璃層
102‧‧‧光阻層
104‧‧‧內連線介層窗開口
106‧‧‧插塞
108‧‧‧光阻層
110‧‧‧銅
112‧‧‧內連線介層窗
114‧‧‧內連線接觸
116‧‧‧銅墊
118‧‧‧第一鈍化層
120‧‧‧光阻層
122‧‧‧介層窗開口
124‧‧‧介層窗開口
126‧‧‧鋁
128‧‧‧鋁內連線介層窗
130‧‧‧鋁介層窗
132‧‧‧光阻層
134‧‧‧鋁內連線接觸
136‧‧‧鋁線路
138‧‧‧鋁墊
140‧‧‧第二鈍化層
142‧‧‧光阻層
144‧‧‧凸塊底層金屬開口
146‧‧‧凸塊底層金屬墊
△‧‧‧差
為了更完全了解本發明及其優點，現結合所附圖式而參照以上之描述，其中：第1A圖係繪示一種傳統凸塊墊結構與內連線之剖面圖。
第1B圖係繪示一種傳統凸塊墊結構與內連線之平面視圖。
第2圖係繪示依照本發明一實施例的一種凸塊墊結構的剖面圖。
第3圖係繪示依照本發明之另一實施例的一種凸塊墊結構的剖面圖。
第4圖係繪示比較傳統結構與本發明之實施例間之未摻雜矽玻璃層與低介電常數介電層之界面處的應力的曲線圖。
第5圖係繪示銅墊尺寸對未摻雜矽玻璃層與低介電常數介電層之界面處之應力的影響的曲線圖。
第6A圖至第6D圖係繪示依照本發明之數個實施例的介層窗與凸塊墊結構的平面視圖。
第7圖係繪示不同介層窗布局如何影響未摻雜矽玻璃層與低介電常數介電層之界面處之應力的曲線圖。
第8圖係繪示依照本發明之又一實施例的一種凸塊墊 結構的剖面圖。
第9A圖至第9M圖係繪示依照本發明之一實施例之一種製造凸塊墊結構的製程。
30．．．銲接凸塊
32．．．凸塊底層金屬墊
34．．．外鈍化層
36．．．鋁墊
38．．．內鈍化層
40．．．銅墊
42．．．未摻雜矽玻璃層
44．．．低介電常數介電層
46．．．電路系統
48．．．介層窗
Δ．．．差

Claims (10)

  1. 一種凸塊墊結構，包含：一基材，包含一上層；一強化墊，位於該上層上；一中間層，位於該上層之上方；一中間連接墊，位於該中間層上；一外層，位於該中間層之上方；以及一凸塊底層金屬，經由該外層中之一開口連接至該中間連接墊，其中該強化墊之平面視圖的形狀與該凸塊底層金屬之平面視圖的形狀對應。
  2. 如請求項1所述之凸塊墊結構，其中該強化墊具有一半徑或一外接圓半徑大於該凸塊底層金屬之一半徑或一外接圓半徑。
  3. 如請求項1所述之凸塊墊結構，更包含一介層窗，物理性地耦合該中間連接墊至該強化墊。
  4. 如請求項3所述之凸塊墊結構，其中該介層窗包含一特徵，該特徵係選自於由一實心介層窗、一環狀介層窗與一5×5陣列介層窗所組成之一族群。
  5. 如請求項1所述之凸塊墊結構，更包含：一第二強化墊，其中該基材更包含一內層，且其中該 第二強化墊位於該內層上；以及一第二介層窗，物理性耦合該強化墊至該第二強化墊。
  6. 一種凸塊墊結構，包含：一銅墊，位於一基材之一上層上；一鋁墊，位於一內鈍化層上，其中該內鈍化層位於該基材之該上層上；一介層窗，物理性地耦合該銅墊至該鋁墊；以及一凸塊底層金屬，經由一外鈍化層中之一開口，物理性地且電性耦合至該鋁墊，其中該銅墊之平面視圖的形狀與該凸塊底層金屬之平面視圖的形狀對應。
  7. 如請求項6所述之凸塊墊結構，其中該介層窗包含一實心介層窗、一環狀介層窗與一陣列介層窗。
  8. 一種凸塊墊結構之製造方法，包含：形成一強化墊於一基材之一上層上；形成一中間層於該基材之該上層上；形成一中間連接墊於該中間層上，且一介層窗經由該中間層而將該中間連接墊耦合至該強化墊；形成一外層於該基材上；以及形成一凸塊底層金屬於該外層之一開口中，以將該凸塊底層金屬耦合至該中間連接墊，其中該強化墊之平面視圖的形狀與該凸塊底層金屬之平面視圖的形狀對應。
  9. 如請求項8所述之凸塊墊結構之製造方法，其中形成該強化墊之步驟包含：圖案化位於該基材之該上層上之一光阻層，以暴露出該上層中將設置該強化墊的一區域；蝕刻該上層暴露出之該區域；以及沉積一金屬於該上層上。
  10. 如請求項8所述之凸塊墊結構之製造方法，其中形成該中間連接墊之步驟包含：圖案化位於該中間層上之一第一光阻層，以暴露出該中間層中將形成該介層窗之一區域；蝕刻該中間層暴露出之該區域；沉積一金屬層於該中間層上，以形成一金屬化層與該介層窗；圖案化位於該金屬化層上之一光阻層，藉以使該金屬化層將被形成該中間連接墊的部分不被暴露出；以及蝕刻該金屬化層之一暴露部分。
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