TWI430865B - 釬焊膏組合物及其用途 - Google Patents
釬焊膏組合物及其用途 Download PDFInfo
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- TWI430865B TWI430865B TW097106703A TW97106703A TWI430865B TW I430865 B TWI430865 B TW I430865B TW 097106703 A TW097106703 A TW 097106703A TW 97106703 A TW97106703 A TW 97106703A TW I430865 B TWI430865 B TW I430865B
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- powder
- metal
- dip
- solder paste
- pad
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Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
- B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
- B23K35/0244—Powders, particles or spheres; Preforms made therefrom
- B23K35/025—Pastes, creams, slurries
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B22—CASTING; POWDER METALLURGY
- B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
- B22F1/00—Metallic powder; Treatment of metallic powder, e.g. to facilitate working or to improve properties
- B22F1/10—Metallic powder containing lubricating or binding agents; Metallic powder containing organic material
- B22F1/105—Metallic powder containing lubricating or binding agents; Metallic powder containing organic material containing inorganic lubricating or binding agents, e.g. metal salts
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/36—Selection of non-metallic compositions, e.g. coatings, fluxes; Selection of soldering or welding materials, conjoint with selection of non-metallic compositions, both selections being of interest
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/0557—Disposition the external layer being disposed on a via connection of the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Description
本發明涉及一種在將半導體晶片等電子部件安裝在電路基板上的前階段,適用於在該基板上全面塗敷而預塗釺料的釺焊膏組合物及其用途。
近年,隨著電子設備等小型化的發展,在一個電路基板上層疊多個電子部件而形成的多層基板已經成為了主流,例如,多個品種互不相同的半導體晶片層疊在電路基板上形成的SIP(System In Package)型的半導體裝置(半導體元件)正在被關注。在所述SIP型的半導體裝置中,第一層搭載的半導體晶片(層疊的半導體晶片中最接近電路基板側的半導體晶片)的主面被搭載成與電路基板的主面相對,並且在半導體晶片上形成的凸起(突起狀的電極)和電極焊盤(接合線bonding lead)上配置的電極通過釺料連接的、所謂的倒裝晶片連接有效用於實現小型化的手段。
在進行倒裝晶片連接時,通常採用將釺焊膏全面塗敷在電路基板上後,加熱,從而在各電極表面預塗釺料的方法。這是因為隨著電子設備、電子部件的小型化,使電路基板的電極也在狹窄的範圍內以極窄的間隔形成許多電極,實現電路基板的焊盤的排列節距微細化(例如60~80μm的程度),對於在被實現細節距化的焊盤上,使用以往的絲網印刷法等很難精確印製釺焊膏。
在電路基板上預塗釺焊膏時,具體而言,將釺焊膏提供到焊料抗蝕劑膜(絕緣膜)開口部內配置的多個焊盤上,通過回流焊的方式,在相當於與半導體晶片的凸起連接的部分(凸起連接部)的焊盤處形成釺焊膏。此時,使焊盤呈長度方向的一部分具有寬度比其他部分寬的寬幅部的形狀,即如第一圖所示的焊盤1那樣其寬幅部1a的寬度尺寸(W1)比其他部分的寬度尺寸(W2)大,並且,若要在焊料抗蝕劑膜2之間的焊盤1的寬幅部1a處配置電極,則因焊膏的表面張力的作用,在配置有電極的寬幅部1a(即凸起連接部)能夠預塗釺料為瘤狀。
作為應用於所述預塗方法中的釺料組合物,例如,在特開平5-391號公報中,提出了以預定比例含有纖維素的膏狀釺料。另外,特開平5-96396號公報中,提出了在錫粒子的表面被覆鉛或錫-鉛合金的複合粒子作為釺料粉末的膏狀釺料。
但是,使用以往的釺焊膏組合物,實施所述預塗,出現了各種各樣的問題。具體的說,如第二圖(a)所示,應當形成瘤狀的部分(寬幅部1a)以外的部分卻局部形成了鼓出部3b,其結果出現了下述等問題:因鼓出部3b部分的存在而相應地使瘤狀部3a的釺料的量不足;如第二圖(b)所示,釺料3的局部形成了缺料部4;多個電極間釺料的高度不均勻。出現所述任一問題,成品率就會變低,得不到滿意的安裝基板。另外,第二圖表示,在具有如第一圖所示形狀的焊盤的電路基板上預塗釺料時,在焊盤上形成的釺料圖形的模式截面圖。
另外,例如在將半導體晶片倒裝晶片連接在電路基板上時,通常為了防止接合部位的脫離,在半導體晶片的主面和電路基板的主面之間填充底部充滿樹脂。通常是在將半導體晶片搭載在基板上之後,一邊使供應噴嘴沿著半導體晶片的側面(邊)移動一邊供給所述底部充滿樹脂。但那時,如第三圖所示,如果要在半導體晶片10的端部10’和絕緣膜11的開口部的端部11’大致平面重合的位置,配置半導體晶片10和電路基板12,底部充滿樹脂的注入口(即半導體晶片端部附近的間隙)相對比較狹窄。因此,出現了半導體晶片的主面到中心部,填充底部充滿樹脂困難的問題。
因此,為了改善底部充滿樹脂的填充性,在供給底部充滿樹脂的噴嘴的移動區域內,如第四圖所示,擴大了絕緣膜11的開口,從而使半導體晶片10的端部10’和絕緣膜11的開口部的端部11’不會平面重合,並且,採用了通過使焊盤1的一端1’變長,使焊盤1部分露出(換句話說,就是變長一側的焊盤1的端部1’比半導體晶片10的端部10’靠向基板外側),使底部充滿樹脂的注入口變大的方法。通過該方法,如第五圖所示,由供應噴嘴14供給的底部充滿樹脂17,可以從具有足夠寬度的注入口順利填充到中心部。
採用所述將底部充滿樹脂的注入口擴大的方法時,具有所述寬幅部的焊盤如第六圖焊盤1那樣,從長度方向的一端到寬幅部1a的長度(第六圖中的L1)和另一端到寬幅部1a的長度(第六圖中的L3)形狀不同。
然而,若使用從所述長度方向的一端到寬幅部1a的長度和另一端到寬幅部1a的長度形狀不同的焊盤,預塗釺料時產生鼓起部、缺料部、高度偏差的所述問題更加顯著。具體來說,如第七圖焊盤1所示,L1的長度和L3的長度大致相同時(換句話說,在絕緣膜11的開口部內,寬幅部1a在焊盤1的延伸方向大致形成一個中心時),因為應力集中在焊盤的中心,因此釺焊膏被彙集在中心的寬幅部1a處,能堆積成瘤狀。但是,如第六圖焊盤1所示,若L1的長度和L3的長度不同,焊盤的產生的應力被分散,寬幅部1a以外的位置也彙集了釺焊膏。若釺焊膏不彙集到寬幅部1a部,倒裝晶片連接時,因為很難為凸起狀電極提供釺焊膏,所以可能導致半導體晶片安裝不良。
本發明提供在電路的基板上全面塗敷而預塗釺焊膏時,不管焊盤的形狀如何都能夠形成不產生鼓起和缺料、不引起高度偏差的釺料的釺焊膏組合物、使用該組合物的釺料預塗方法以及安裝基板。
本發明人等為了解決所述問題,進行了深入研究,結果發現,通過含有特定含量的金屬粉,可以解決所述問題,從而完成了本發明,所述金屬粉為與構成釺料粉末或析出型釺料粉末的金屬種類、以及構成電極表面的任一種金屬種類都不相同的金屬粉。
本發明第1的釺焊膏組合物,是應用於在電極表面預塗釺料的膏狀釺料組合物,含有釺料粉末以及助焊劑,同時含有與構成所述釺料粉末的金屬種類和構成所述電極表面的任一種金屬種類都不相同的金屬粉,該金屬粉的含量相對於所述釺料粉末總量,比例為0.1重量%以上且20重量%以下。
本發明的第2的釺料膏狀組合物,是應用於在電極表面預塗釺料的膏狀釺料組合物,其含有通過加熱而析出釺料的析出型釺料材料以及助焊劑,同時含有與構成所述析出型釺料材料中的金屬成分的金屬種類和構成所述電極表面的任一種金屬種類都不相同的金屬粉,該金屬粉的含量相對於所述析出型釺料材料中的金屬成分的總量,比例為0.1重量%以上且20重量%以下。
本發明的釺料預塗方法,在具有焊盤的電路基板上塗敷釺焊膏組合物後,通過加熱,配置在所述焊盤的寬幅部上的電極表面上預塗釺料,所述焊盤為在長度方向的一部分具有寬度比其他部分寬的所述寬幅部的形狀,其中,所述釺料組合物使用所述本發明的第1或第2所述的釺焊膏組合物。
本發明的安裝基板,通過使用所述本發明的第1或第2的釺焊膏組合物而預塗的釺料,將搭載的電子部件熱壓接在電路基板上。
本發明可得到效果:根據本發明,在電路基板上全面塗敷而預塗釺料的時候,不管焊盤的形狀如何都能夠形成不產生鼓起和缺料、不引起高度偏差的預塗釺料,提高了成品率。進一步,在電路基板上使用釺料倒裝晶片連接電子部件時,也能夠形成不引起鼓起和脫落,不引起高度偏差的釺料,同時也能確保底部充滿樹脂的填充性。
本發明的其他的課題及其優點,以下進一步說明。
以下對本發明的實施方式,參照附圖進行詳細說明。
本發明的釺焊膏組合物,是用於在電極表面預塗釺料的組合物。具體來說,本發明的釺焊膏組合物,是通過在電路基板上全面塗敷後將全面塗敷釺料組合物的基板加熱,使得熔融的釺料附著在基板的電極部分而被預塗。
例如,通過絲網印刷等,在釺焊膏組合物的印刷上所使用的絲網掩模,並不是在電路基板上按各個電極開口、而是在含有多個電極的寬範圍內開口。具體來說,對於四側引腳扁平封裝(QFP),在多個電極以小節距排列的QFP各邊的形狀上或含所述邊的QFP整體的形狀上,使用開口的絲網掩模。在含有以小節距排列的許多電極的寬範圍內,不管每個電極的位置或形狀,只要傾斜地全面塗敷釺焊膏組合物即可。
本發明的第1釺焊膏組合物,含有釺料粉末和助焊劑。本發明的第2釺焊膏組合物含有析出型釺料和助焊劑。
首先對本發明的第1釺焊膏組合物進行說明。
在本發明的第1釺焊膏組合物中,釺料粉末可以是由釺料合金構成的粉末(釺料合金粉末),也可以是由金屬錫構成的粉末(金屬錫粉末)。另外,作為釺料粉末,也可以並用釺料合金粉末和金屬錫粉末。
作為所述釺料合金粉末的組成,可以採用公開的各種釺料合金粉末。例如,除了Sn(錫)-Pb(鉛)類,Sn-Ag(銀)類,Sn-Cu(銅)類等釺料合金粉末之外,也可舉出Sn-Ag-In(銦)類,Sn-Ag-Bi(鉍)類,Sn-Ag-Cu類等無鉛釺料合金粉末。其中,優選不含鉛的(無鉛的)無鉛釺料合金粉末。另外,所述釺料合金粉末可各自單獨使用,也可並用混合兩種以上的合金,例如,混合Sn-Ag-In(銦)類與Sn-Ag-Bi(鉍)類,作為Sn-Ag-In-Bi類等也可。
例如,對於Sn-Ag類釺料合金粉末,其組成中,優選Ag的含量為0.5~5.0重量%,剩餘部分為Sn。另外,該Sn-Ag類釺料合金粉末中根據需要添加除Sn以及Ag之外的成分(In、Bi、Cu等)的情況下,其含量適合為0.1~15重量%。
所述金屬錫粉末為錫金屬的含量為100重量%的粉末。通過使用該金屬錫粉末,例如與使用釺料合金粉末相比,在與電子部件的端子(金凸點等)接合時,在接合部形成的金屬間化合物的種類變少。因此,能夠使接合部的機械特性等優良而可以帶來可靠性更高的接合。
本發明的第1釺焊膏組合物中的釺料粉末,可以是釺料合金粉末或金屬錫粉末的任何一種,其平均粒徑為0.5~30μm,優選1~10μm。另外,本說明書中的平均粒徑是通過粒度分佈測定裝置測定而得到的值。
助焊劑通常為含有基礎樹脂、溶劑以及觸變劑等。
作為所述基礎樹脂,例如可以舉出松香、丙烯酸樹脂等。基礎樹脂可為使用單獨一種,也可並用兩種以上。例如,可將松香和丙烯酸樹脂混合使用。基礎樹脂的含量,相對於助焊劑總量為0.5~80重量%,優選20-80重量%。
作為所述松香,可以使用以往作為助焊劑使用的松香及其衍生物。具體來說,可舉出橡膠松香,浮油松香、木松香等。作為它的衍生物,可以舉出熱處理後的樹脂、聚合松香,氫化松香、甲醯化松香、松香酯、松香改性馬來酸樹脂、松香改性酚醛樹脂、松香改性醇酸樹脂等。另外,對松香的等級沒有特別限定,例如,優先選用ww級。
作為所述丙烯酸樹脂,分子量為10,000以下,優先選用3000-8000。若所述丙烯酸樹脂為分子量超過10,000的丙烯酸樹脂,可能引起耐龜裂性和耐剝離性降低。另外,為了提高活性,優先選擇酸價在30以上的丙烯酸樹脂。另外,付與釺料的時候,需要進行軟化,優選軟化點在230℃以下。因此,例如,可以使用(甲基)丙烯酸、其各種酯、巴豆酸、衣康酸、(無水)馬來酸及其各種酯,(甲基)丙烯腈、(甲基)丙烯酸胺、氯化乙烯、醋酸乙烯等的含有聚合性不飽和基團的單體,可以使用以過氧化物等作為溶劑,通過整體聚合法、液體聚合法、懸浮聚合法、乳化聚合法等的自由基聚合法等聚合得到的丙烯酸樹脂。
對所述溶劑沒有特別限定,作為通常的助焊劑的如:己基卡必醇、丁基卡必醇、辛基卡必醇、礦油精等均可使用。在電極表面均勻塗敷釺料,優選比重大於1的溶劑。作為比重比大於1的溶劑具體可以舉出例如乙二醇、二甘醇、三甘醇、丙二醇、苯乙二醇、苄基乙二醇、苯基丙二醇、1,3-丁二醇等的乙二醇類;甲基卡必醇、苯基卡必醇、苄基卡必醇等的卡必醇類;五甘醇單丁基醚,乙二醇單苯基醚(苯基乙二醇***)、三甘醇單甲基醚、丙二醇苯基醚等的其他的乙二醇醚類;苯二甲酸二甲基酯、苯二甲酸二乙酯、苯二甲酸二丁酯等的苯二甲酸酯類;馬來酸二甲酯、馬來酸二乙酯等的馬來酸酯類;N-甲基-2-吡咯烷酮等的2-吡咯烷酮類;等。其中,所述溶劑選擇沸點為180~350℃,更優選沸點為220~320℃的溶劑。溶劑可只使用1種,也可並用兩種以上。溶劑的含有量相對於助焊劑的總量為5~50重量%,優選10~30重量%。
作為所述觸變劑,可以舉出硬化蓖麻子油、加氫蓖麻子油、蜂蠟、卡那巴蠟等。觸變劑的含有量相對於助焊劑的總量為1~50重量%。
另外,所述助焊劑,根據需要可含有活性劑。作為活性劑可舉出例如乙胺、丙胺、二乙基胺、三乙基胺、乙二胺、苯胺等的鹵化氫酸鹽;乳酸、檸檬酸、硬脂酸、己二酸、二苯基醋酸、安息香酸等的有機羧酸;等。活性劑的含有量相對於助焊劑總量為0.1~30重量%為好。
另外,對於所述助焊劑,可與以往作為助焊劑的基礎樹脂,如周知的聚酯樹脂、苯氧基樹脂、萜烯樹脂等的合成樹脂等並用。另外,所述助焊劑中可添加抗氧化劑、防黴劑、消光劑等添加劑。
所述釺料粉末與所述助焊劑粉末的重量比(釺料粉末:助焊劑)沒有特別限定,但適合為70:30~20:80。
在本發明的第1的釺焊膏組合物中,含有與構成所述釺料粉末的金屬種類和構成所述電極表面的金屬種類的任何一種都不相同的金屬種類的金屬粉(以下也稱為“異種金屬粉”)很重要。通過含有該異種金屬粉,在電路基板上全面塗敷而預塗釺料時,可避免生成釺料高度偏差、產生鼓起或脫落。推測起到所述效果的原因是:通過添加所述異種金屬粉,抑制了接合介面處形成金屬間化合物,其結果防止了加熱中釺料的流動性的降低。
異種金屬粉只要是與構成所述釺料粉末的金屬種類和構成所述電極表面的金屬種類的任一種金屬種類都不相同的金屬種類即可,沒有特別限定。根據適用本發明的釺焊膏組合物的電極的種類與所用的釺料粉末的種類,可適宜選擇,例如,可選自Ni、Pd、Pt、Au、Co、Zn等。例如,若電極是Cu電極時,所述異種金屬粉優先選自Ni、Pd、Pt、Au、Co以及Zn中的至少一種。
所述異種金屬的平均粒徑沒有特別限定,通常為0.01~10μm,優選0.1~3μm。所述異種金屬粉的平均粒徑過小的話,容易對釺料的濕潤性帶來不良影響,另一方面,所述粒徑過大的話,容易造成高度偏差。另外,所述異種金屬粉的平均粒徑相對於所述釺料粉末的平均粒徑為0.001~5倍,優選0.01~1倍程度大小。對於釺料粉末,如果異種金屬粉過大,容易阻礙預塗的均勻化。
所述異種金屬的含有量相對於所述釺料粉末總量為0.1重量%以上且20重量%以下,優選0.2重量%以上且8重量%以下,更優選0.8重量%以上且5重量%以下。若異種金屬的含有量少於所述範圍,則不能充分達到本發明的效果。另一方面,若異種金屬的含有量多於所述範圍,則具有易惡化釺料光澤的趨勢,同時即使過量增加添加量,也不能達到相應的效果。
以下對本發明的第2的釺焊膏的組合物進行說明。
本發明的第2的釺焊膏組合物是將所述本發明第1的釺焊膏組合物的“釺料粉末”變換成“析出型釺料材料”的方式的組合物。即本發明第2的釺焊膏組合物含有通過加熱析出釺料的析出型釺料材料和助焊劑。這種方式的釺焊膏組合物通常被稱為析出型釺焊膏組合物。
析出型釺料組合物是一種含有例如錫粉末和有機酸的鉛鹽等的組合物。加熱所述組合物後,有機酸鉛鹽的鉛原子置換為錫原子之後游離,並擴散到過剩的錫金屬粉中形成Sn-Pb合金。總之,析出型釺料材料即為通過加熱而析出釺料的材料,例如,錫粉末和金屬鹽或絡合物的組合物就屬於該析出型釺料材料。只要是該析出型釺焊膏組合物,即使是微細的節距也能夠精確地在電極上形成釺料,並且能夠抑制空穴的產生。
所述析出型釺料材料,具體來說,優選含有(a)錫粉末和選自鉛、銅以及銀的金屬鹽,或者(b)錫粉末,以及選自銀離子、銅離子的至少一種與選自芳基膦類、烷基膦類及吡咯類的至少一種形成的絡合物的析出型釺料材料。另外,可以混合所述(a)的金屬鹽和所述(b)的絡合物,與錫粉末組合使用。所述“錫粉末”除包括金屬錫粉末之外,也包括例如,含銀的錫-銀類的錫合金粉末、或含有銅的錫-銅類的錫合金粉末等。所述錫粉末和所述金屬的鹽或絡合物的比率(錫粉末的重量:金屬鹽和/或絡合物的重量)為99:1~50:50的程度,優選97:3~60:40的程度。
作為所述金屬鹽,可以舉出有機羧酸鹽、有機磺酸鹽等。
作為所述有機羧酸鹽中的有機羧酸,可使用碳原子數為1~40的單或二羧酸。具體來說,包括甲酸、醋酸、丙酸等的低級脂肪酸;己酸、辛酸、月桂酸、十四烷酸、十六烷酸、硬脂酸、油酸、亞油酸等的從動植物油脂中得到的脂肪酸;2,2二甲基戊酸、2-乙基己酸、異壬酸、2,2二甲基辛酸、n-十一烷酸等的從有機合成反應中得到的各種合成酸;海松酸、松香酸、脫氫松香酸、二氫松香酸等的樹脂酸;從石油中得到的環烷酸等的單羧酸和由妥爾油脂肪酸或大豆脂肪酸合成得到的二聚酸、松香二聚化後的聚合松香等的二羧酸等,也可包括所述兩種以上的上述有機羧酸鹽。
作為所述有機磺酸鹽的有機磺酸,可以舉出甲磺酸、2-羥基乙磺酸、2-羥丙基-1-磺酸、三氯代甲基磺酸、三氟代甲基磺酸、苯基磺酸、甲苯基磺酸、苯酚磺酸、甲酚磺酸、甲氧苯甲醯磺酸、萘磺酸等,也可包括所述有機磺酸鹽中的兩種以上。
作為所述銀和銅的絡合物,具體可舉出銀離子和/或銅離子與選自芳基膦類、烷基膦類以及吡咯類中的至少一種的絡合物。
作為所述膦類,例如可選自三苯基膦、三(o-、m-或p-甲苯基)膦、三(p-甲氧苯基)膦等的芳基膦類;三丁基膦、三辛基膦、三(3-羥基丙基)膦、三苯基膦等。
另外,芳基膦類或烷基膦類的絡合物是陽離子性,因此需要共存陰離子()。作為該共存陰離子,有機磺酸離子、有機羧酸離子、鹵離子、硝酸離子或硫酸離子均適合。這些可單獨使用也可兩種以上並用。
作為所述共存陰離子所使用的有機磺酸,例如甲基磺酸、甲苯磺酸、苯酚磺酸等均適合。另外,作為共存陰離子使用的有機羧酸,例如甲酸、醋酸、草酸、三氯醋酸、三氟醋酸或全氟丙酸均適合,特別適合有醋酸、乳酸、三氟醋酸等。
作為所述吡咯類,可使用四唑、***、苯***、咪唑、苯並咪唑、吡唑、吲唑、噻唑、苯並噻唑、噁唑、苯並噁唑、吡咯、吲哚或它們的衍生物中的一種或兩種以上的混合物。其中5-巰基-1-苯基四唑、3-巰基-1,2,4-***、苯並***、甲苯基***、羧基苯並***、咪唑、苯並咪唑、2-辛基苯並咪唑、2-巰基苯並咪唑、苯並噻唑、2-巰基苯並噻唑、苯並噁唑、2-巰基苯並噁唑等最適合。
本發明的第2的釺料組合物,除使用“析出型釺料材料”這一點之外,與本發明的第1的釺料組合物相同。因此,將所述第1的釺焊膏組合物的說明中的“釺料粉末”替換成“析出型釺料材料”即可適用。例如,電極為Cu電極的時候,所述異種金屬粉優選選自Ni、Pd、Pt、Au、Co、以及Zn中的至少一種,與第1中的釺焊膏組合物相同。
關於異種金屬粉及其含有量,在本發明的第2的釺焊膏組合物中,作為所述異種金屬粉,使用與構成所述析出型釺料中的金屬成分的金屬種類以及構成所述電極表面的金屬種類的任一種的金屬種類都不相同的金屬粉,該異種金屬粉相對於所述析出型釺料材料中的金屬成分的總量,其含量為0.1重量%以上且20重量%以下(優選範圍和更優選範圍與第1的釺焊膏組合物相同)。總之,關於異種金屬粉的所述中,將所述第1的釺焊膏組合物的說明中的“釺料粉末”替換成“析出型釺料材料中的金屬成分”即可。
使用本發明的釺焊膏組合物形成的釺料,不會產生鼓起和缺料,高度通常在10-20μm左右,該高度下的偏差比較小。另外,若使用本發明的釺焊膏組合物,可使該釺料在窄節距下排列,約70μm程度以下的節距也適用。
本發明的釺料預塗方法,在具有焊盤的電路基板上,塗敷所述本發明的釺焊膏組合物後,通過加熱,將釺料預塗在所述焊盤的寬幅部上配置的電極表面上的方法,所述焊盤在長度方向上的一部分具有比其他部分的寬度寬的寬幅部。通過該釺料預塗方法,可形成不產生鼓起或缺料且高度偏差小的釺料。具體來說,可以形成,在釺料的寬幅部以外的部分不會產生鼓起或者在釺料的部分不產生缺陷、並且多個寬幅部上的高度偏差小的瘤狀釺料。
在本發明的釺料預塗方法中,所述焊盤1的形狀如第七圖所示,寬幅部1a如上所述形成良好的瘤狀釺料的基礎上,優選寬幅部1a位於長度方向的大致位於中心位置的形狀。但是,例如將半導體晶片倒裝晶片連接在電路基板上後,考慮到在它們之間填充底部充滿樹脂時樹脂的填充性,焊盤1的形狀如第六圖所示,優選從長度方向的一端到寬幅部1a的長度(L1)與從另一端到寬幅部1a的長度(L3)不同的形狀。
對於如第六圖所示形狀的焊盤上,以往在其寬幅部1a很難形成良好的瘤狀釺料。但是,在本發明的釺料預塗方法中通過使用本發明的釺焊膏組合物,即使形成如第六圖所示形狀的焊盤,在寬幅部1a也能形成良好的瘤狀釺料。
設置在電路基板12上的多個焊盤1可全部具有相同的形狀,也可以如第八圖所示那樣在不同位置具有寬幅部1a的形狀的2種焊盤1x、1y呈兩列交替設置。在該情況下,各部分的尺寸具體來說,例如可以為如第八圖所示,L x 1:86μm的程度、L x 2:50μm的程度、L x 3:164μm的程度、L y 1:190μm的程度、L y 2:50μm的程度、L y 3:60μm的程度、L4(焊盤1x和焊盤1y的間隔):40μm的程度、L5(焊盤1x的寬幅部1a中心與焊盤1y的寬幅部1a中心的間隔):104μm的程度。
在第六圖-第八圖中,(a)表示在電路基板上設置的多個焊盤的俯視圖,(b)表示x-x截面的截面圖。
本發明的釺料預塗方法,具體地說,是將本發明的釺焊膏組合物使用絲網印刷等在基板上全面塗敷之後,例如,可在150~200℃下預熱,並且在最高溫度170-280℃的程度下進行回流焊。基板上的塗敷和回流焊可在大氣中進行,也可在N2
、Ar、He等惰性氣氛中進行。
在本發明的釺料預塗方法中,本發明的釺焊膏組合物適用於具備焊盤的電路基板,所述焊盤在長度方向上的一部分具有比其他部分的寬度寬的寬幅部。但是,本發明的釺焊膏組合物並不限定於此,也可適用於具備在長度方向上寬度均勻形狀(不具有寬幅部的帶狀)的焊盤的電路基板。
本發明的安裝基板,通過使用所述本發明的膏狀軟線料組合物而預塗的釺料,在電路基板上熱壓接搭載的電子部件。優選,本發明安裝基板中的釺料是通過所述本發明的釺料預塗方法而形成。
優選,所述電路基板的主面上形成具有開口部的絕緣膜和該開口部內配置的多個焊盤,所述焊盤呈在長度方向上的一部分具有比其他部分的寬度寬的寬幅部的形狀,並且在該寬幅部具有的電極與在所述電子部件的主面上設置的電極通過所述釺料倒裝晶片連接。
還優選,所述焊盤從長度方向的一端到寬幅部的長度與從另一端到寬幅部的長度為不同的形狀,同時到寬幅部的長度較長一側的端部比所述電子部件的端部靠向基板外側。
還優選,所述電路基板和所述電子部件之間用底部充滿樹脂填充。
以下,對本發明的安裝基板的優選的實施方式,使用附圖進行說明。
第九圖表示在電路基板12上層疊多個電子部件(半導體晶片)而形成的半導體裝置(安裝基板)的概略截面圖。在該半導體裝置中,使用本發明的釺焊膏組合物,通過預塗的釺料,將作為第一的電子部件的半導體晶片(微電腦晶片)10A,經由凸起16通過倒裝晶片連接的方式裝到電路基板12上。進一步,作為第二電子部件的半導體晶片(DDR2-SDRAM)10B,通過使用引線13B的引線接合連接的方式搭載到所述半導體晶片10A上,進一步,作為第三電子部件的半導體晶片(SDRAM)10C,通過使用引線(13C)的引線接合連接的方式搭載在所述第二電子部件之上。搭載的第一、第二以及第三的電子部件的周圍被模製樹脂(樹脂)18所覆蓋。
所述實施方式的安裝基板可通過第十圖~第十四圖所示的流程製得。另外,在第十圖~第十四圖中,(a)表示各個過程的狀態的概略俯視圖,(b)表示其截面圖。
對於所述實施方式的電路基板12,首先,如第十圖所示,其主面形成具有多個開口部的絕緣膜(釺料抗蝕劑)11,其開口部內形成多個焊盤1A、1B、1C。在焊盤1A上預塗釺料組合物並連接第一電子部件,焊盤1B通過引線13B連接第二電子部件,焊盤1C通過引線13C連接第三電子部件。
所述焊盤1A,具體來說,如第六圖所示,在長度方向的一部分具有比其他部分更寬的寬幅部1a,並且,從長度方向的一端到寬幅部1a的長度(L1)與從另一端到寬幅部的長度(L3)的形狀不同。因此,該焊盤1A配置成如第四圖所示那樣到寬幅部1a的長度較長一側的端部1’比所述電子部件的端部10’更靠向基板外側。
這樣,通過將特定形狀的焊盤1A以特定配置而設置,然後填充後述的底部充滿樹脂時,如第五圖所示,供應底部充滿樹脂的噴嘴14在移動的區域內,可夠擴大樹脂的注入口,並且可改善底部充滿樹脂的填充性。以往如果是如上所述的第六圖所示形狀(長度方向的一端到寬幅部的長度與從另一端到寬幅部的長度呈不同的形狀),在寬幅部很難形成良好的瘤狀釺料。但是,通過本發明,即使是所述的焊盤形狀,也可在寬幅部形成不產生鼓起或缺料且高度偏差小的瘤狀釺料。另外,第四圖表示將作為第一的電子部件的半導體晶片10A通過倒裝晶片連接被搭載到電路基板12上的如第十一圖(b)所示的過程中,重要部分(用虛線圍著的部分)的放大截面圖。
對於所述焊盤1B以及1C,只要能夠適用已知的引線連接,對其形狀等沒有特別限定。另外,對於電路基板12無特別限定,只要適用已知的半導體裝置均可使用。在電路基板12主面的裡側,為了將該電路基板與外部電路基板的布線導體實現電連接,設置了釺料球()(無圖示)。
對於所述電路基板12的焊盤1A的寬幅部1a上,通過上述本發明的釺料預塗方法形成了瘤狀的釺料。在搭載第一的電子部件的半導體晶片10A時,進行定位使半導體晶片10A的主面與電路基板12的主面相對並且使所述瘤狀釺料與設置在半導體晶片的電極15上的焊盤16重合。這樣,設在所述寬幅部1a的電極(無圖示)與設置在所述電子部件的主面上的電極15,通過所述釺料被倒裝晶片連接。
電路基板上12與作為第一電子部件的半導體晶片10A倒裝晶片連接之後,如第十二圖所示,在電路基板12和半導體晶片10A間填充底部充滿樹脂17。通過填充底部充滿樹脂17,可防止電路基板12和半導體晶片10A的接合部脫離。對於底部充滿樹脂17沒有特別限定,通常用於該用途的樹脂均適用。另外,底部充滿樹脂17,必要時可含有填料。如上所述,通過本實施方式,填充底部充滿樹脂時可得到優良的填充性。
填充底部充滿樹脂後,如第十三圖所示,在第一電子部件10A上,作為第二電子部件的半導體晶片10B以及作為第三部件的半導體晶片10C依次疊層。因此,如第十四圖所示,所述焊盤1B和作為第二電子部件的半導體晶片10B由引線13B連接。所述焊盤1C與作為第三電子部件的半導體晶片10C通過引線13C連接。之后,通過已知的一起模製(一括)方式,用模製樹脂18將周圍被覆,成為如第九圖所示的半導體裝置。對於模製樹脂沒有特別限定,通常應用於該用途的樹脂均適用。
所述實施方式為,搭載第二電子部件和第三電子部件而形成的多層安裝基板,但本發明的安裝基板並不限定於此,也可以是在電路基板上只搭載一個電子部件的方式。
首先,將70重量份的ww級浮油松香、20重量份的苄基卡必醇(溶劑;比重1.08),10重量份的加氫蓖麻子油(觸變劑)混合,在120℃下加熱熔融,室溫下冷卻,製備成具有黏性的助焊劑。
將60重量份的作為釺料粉末的含3.5重量%Ag的Sn-Ag類釺料合金粉末(Sn-3.5Ag)以及金屬錫粉末(Sn)中的如表1所示的物質、如表1所示量的作為異種金屬粉的如表1所示的金屬種類的金屬粉(比較例1以及比較例7中未添加)、40質量份的所述製備得到的助焊劑,通過使用調節混合器()((株) 製“練太郎”)混煉,得到銅電極用的釺焊膏組合物。
使用所述得到的各釺焊膏組合物,對釺料的平均高度,它的偏差、釺料的鼓起以及釺料的缺料進行評價。以下表示各評價方法,同時,在表2中列出其結果。
準備以60μm的節距配置如第六圖所示焊盤1那樣的焊盤的電路基板,該焊盤在長度方向的一部分具有較其他部分寬度更寬的寬幅部,並且,呈從長度方向的一端到寬幅部的長度與從另一端到寬幅部的長度不同的形狀的焊盤(第六圖中,w1:30μm、w2:20μm、L:300μm、L1:200μm、L2:50μm、L3:50μm的焊盤1)。各焊盤的寬幅部上配置的銅電極及其周邊的焊料抗蝕劑上,將上述得到的各釺焊膏組合物以100μm的厚度全面印刷,使用最高溫度為260℃的回流焊爐()加熱。然後,將該基板浸漬到裝有60℃丁基卡必醇溶液的超音波清洗機中,除去助焊劑殘渣。之后,電極上的釺料高度通過焦深計((株)製)測定了20點,計算其平均值,作為“釺料的平均高度”,計算其標準偏差,作為“高度偏差”。
在所述<釺料的平均高度以及高度偏差>中,用顯微鏡觀察得到的預塗狀態的釺料外觀,確認有無“釺料鼓起”以及有無“釺料缺料”。
如表2所示可知,作為釺料粉末,利用使用釺料合金的實施例1~8中的釺焊膏組合物形成的釺料,高度的偏差小且不會產生鼓起或缺料。另外,作為釺料粉末,即使是使用金屬錫的實施例9~10的釺焊膏組合物,可同樣得到良好的結果。
與之相反,作為釺料粉末,使用釺料合金的釺焊膏組合物,在沒有添加異種金屬粉的比較例1、添加與釺料粉末相同金屬種類的錫粉或銀粉的比較例2和比較例5、添加與電極相同的金屬種類的銅粉的比較例3、使用金屬粉的添加量過少的比較例4中的各釺焊膏組合物形成的任一釺料,均確認為高度的偏差大且有鼓起和缺料現象。另外,作為釺料粉末,即使在使用金屬錫的釺焊膏組合物中,在添加與電極金屬種類相同的銅粉的比較例6、未添加金屬粉的比較例7中,也被認定了高度偏差大且出現鼓起和缺料的結果。
將70重量份的ww級浮油松香、25品質份的苄基卡必醇(溶劑;比重1.08),5重量份的加氫蓖麻子油(觸變劑)混合,在120℃下加熱熔融,室溫下冷卻,製備成具有黏性的助焊劑。
然後,將銀化合物([Ag{P(C6
H5
)3
}4
]+
CH3
SO3 -
;該銀化合物中的銀的含有率為8重量%)和上述製備的助焊劑使用3個輥以1:1(重量比)的比例均勻混合,製備成銀化合物混合助焊劑。之后,將60重量份的錫粉、40重量份的银化合物混合助焊劑、作為異種金屬粉的0.6質量份的鈀金屬粉(相當於錫粉1重量%)混合,使用調節混合器(製“練太郎”)进行混煉,得到了用於銅電極的析出型釺焊膏組合物。
在所述實施例11中,除沒有添加鈀金屬粉以外,採用與實施例11相同的方式,得到析出型的釺焊膏組合物。
使用上述得到的各釺焊膏組合物,採用與實施例1~10以及比較例1~7相同的方法,評價了釺料的平均高度、其高度的偏差、釺料的鼓起及缺料,結果如表3所示。
表3
所述表3結果表明,使用實施例11的釺焊膏組合物形成的釺料,高度的偏差小且不會產生鼓起或缺料。與之相反,使用不添加金屬粉的比較例8的釺焊膏組合物形成的釺料,高度的偏差大且出現了鼓起或缺料。
以上,說明了本發明的一個實施方式,但本發明的實施方式並不限定於此。
焊盤...1、1A、1B、1C
端部...1’
寬幅部...1a
焊料抗蝕劑膜...2
釺料...3
瘤狀部...3a
鼓出部...3b
缺料部...4
半導體晶片...10、10A、10B、10C
端部...10’
絕緣膜...11
端部...11’
電路基板...12
引線...13B、13C
應噴嘴...14
電極...15
焊盤...16
樹脂...17
模製樹脂...18
第一圖是說明釺焊膏組合物的預塗方法中一個實施方式的電路基板的平面示意圖。
第二圖是預塗釺料組合物時說明以往問題點的預塗釺料的截面示意圖。
第三圖是說明倒裝晶片連接後填充底部充滿樹脂時以往的問題點的安裝基板的局部放大截面圖。
第四圖表示本發明安裝基板的一個實施方式中安裝基板的局部放大截面圖。
第五圖表示在如第四圖所示的安裝基板上填充底部充滿樹脂的狀態的局部放大截面圖。
第六圖是說明本發明安裝基板的一個實施方式中的焊盤形狀的概略俯視圖。
第七圖是說明本發明安裝基板的其他實施方式中的焊盤形狀的概略俯視圖。
第八圖說明本發明的安裝基板的再一實施方式中的焊盤形狀的概略俯視圖。
第九圖表示本發明的安裝基板的一個實施方式的截面示意圖。
第十圖是說明如第九圖所示安裝基板的製作過程的俯視圖和截面圖。
第十一圖是說明如第九圖所示安裝基板的製作過程的俯視圖和截面圖。
第十二圖是說明如第九圖所示安裝基板的製作過程的俯視圖和截面圖。
第十三圖是說明如第九圖所示安裝基板的製作過程的俯視圖和截面圖。
第十四圖是說明如第九圖所示安裝基板的製作過程的俯視圖和截面圖。
焊盤...1、1A、1B
半導體晶片...10A、10B、10C
絕緣膜...11
電路基板...12
引線...13B
電極...15
焊盤...16
樹脂...17
模製樹脂...18
Claims (5)
- 一種釺料預塗方法,在具有焊盤的電路基板上塗敷釺焊膏組合物後,通過加熱,配置在所述焊盤的寬幅部上的電極表面上預塗釺料,所述焊盤為在長度方向的一部分具有寬度比其他部分寬的所述寬幅部的形狀,其中,所述釺料組合物使用下述(I)或(II)的釺焊膏組合物,(I)釺焊膏組合物:含有釺料粉末以及助焊劑,同時還含有與構成所述釺料粉末的金屬種類和構成所述電極表面的任何一種的金屬種類都不相同的金屬粉,該金屬粉的含量相對於所述釺料粉末的總量,其比例為0.1重量%以上且20重量%以下,(II)釺焊膏組合物:含有通過加熱而析出釺料的析出型釺料材料以及助焊劑,同時還含有與構成所述析出型釺料材料中的金屬成分的金屬種類和構成所述電極表面的任何一種金屬種類都不相同的金屬粉,該金屬粉的含量相對於所述析出型釺料材料中的金屬成分的總量,其比例為0.1重量%以上且20重量%以下。
- 依據申請專利範圍第1項所述的釺料預塗方法,其中,所述焊盤的形狀為從長度方向的一端到寬幅部的長度與從另一端到寬幅部的長度不同。
- 一種安裝基板,其為通過使用下述(I)或(II)的釺焊膏組合物而預塗的釺料,將搭載的電子部件熱壓接在電路基板上的安裝基板,其中,在所述的電路基板的主面上,形成具有開口部的絕緣膜和配置在該開口部內的多個焊盤的同時,各個焊盤呈在長度方向的一部分具有寬度比 其他部分寬的寬幅部的形狀,並且配置在所述寬幅部上的電極和設在所述電子部件的主面上的電極通過所述釺料被倒裝晶片連接,(I)釺焊膏組合物:含有釺料粉末以及助焊劑,同時還含有與構成所述釺料粉末的金屬種類和構成所述電極表面的任何一種的金屬種類都不相同的金屬粉,該金屬粉的含量相對於所述釺料粉末的總量,其比例為0.1重量%以上且20重量%以下,(II)釺焊膏組合物:含有通過加熱而析出釺料的析出型釺料材料以及助焊劑,同時還含有與構成所述析出型釺料材料中的金屬成分的金屬種類和構成所述電極表面的任何一種金屬種類都不相同的金屬粉,該金屬粉的含量相對於所述析出型釺料材料中的金屬成分的總量,其比例為0.1重量%以上且20重量%以下。
- 依據申請專利範圍第3項所述的安裝基板,其中,所述的焊盤為從長度方向的一端到寬幅部的長度與從另一端到寬幅部的長度不同的形狀的同時,到寬幅部的長度較長的端部比所述電子部件的端部更靠基板的外側。
- 依據申請專利範圍第3或4項所述的安裝基板,其中,所述電路基板和所述電子部件之間填充底部充滿樹脂。
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WO2009153835A1 (ja) * | 2008-06-18 | 2009-12-23 | 富士通株式会社 | 回路基板、半導体装置およびそれらの製造方法 |
JP5292977B2 (ja) * | 2008-08-01 | 2013-09-18 | 富士電機株式会社 | 接合材、半導体装置およびその製造方法 |
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JP5423688B2 (ja) * | 2009-01-27 | 2014-02-19 | 荒川化学工業株式会社 | 鉛フリーはんだ用フラックス組成物、鉛フリーはんだ組成物およびやに入りはんだ |
JP5461850B2 (ja) * | 2009-02-24 | 2014-04-02 | 株式会社Uacj | 耐食性内面すず被覆銅管の製造方法 |
CN101508061B (zh) * | 2009-03-30 | 2012-10-03 | 汕头市骏码凯撒有限公司 | 用于SnAgCu合金焊锡粉的助焊剂及其制备方法 |
DE102009054068A1 (de) | 2009-11-20 | 2011-05-26 | Epcos Ag | Lotmaterial zur Befestigung einer Außenelektrode bei einem piezoelektrischen Bauelement und piezoelektrisches Bauelement mit einem Lotmaterial |
DE102011013172A1 (de) * | 2011-02-28 | 2012-08-30 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Paste zum Verbinden von Bauteilen elektronischer Leistungsmodule, System und Verfahren zum Auftragen der Paste |
EP2739431B1 (en) * | 2011-08-02 | 2020-06-24 | Alpha Assembly Solutions Inc. | Solder compositions |
JPWO2013021567A1 (ja) * | 2011-08-11 | 2015-03-05 | 三洋電機株式会社 | 金属の接合方法および金属接合構造 |
US20130099371A1 (en) * | 2011-10-21 | 2013-04-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package having solder jointed region with controlled ag content |
TW201325338A (zh) * | 2011-12-14 | 2013-06-16 | Wistron Corp | 避免金手指結構沾錫之電路板 |
CN102941415B (zh) * | 2012-12-11 | 2014-11-12 | 北京达博长城锡焊料有限公司 | 一种无卤素免清洗型无铅焊锡丝及制备方法 |
JP5960633B2 (ja) | 2013-03-22 | 2016-08-02 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
KR20150128310A (ko) * | 2014-05-09 | 2015-11-18 | 삼성전기주식회사 | 솔더 페이스트용 플럭스, 솔더 페이스트 및 솔더 범프의 제조 방법 |
JP6170232B1 (ja) * | 2016-08-11 | 2017-07-26 | ルーメンス カンパニー リミテッド | Ledチップグループのアレイを含むディスプレイモジュール及びその製造方法 |
US10559554B2 (en) | 2016-08-11 | 2020-02-11 | Lumens Co., Ltd. | Method for fabricating LED module using transfer tape |
JP6628759B2 (ja) * | 2017-03-30 | 2020-01-15 | 株式会社タムラ製作所 | プリコート用はんだ組成物およびプリント配線基板の製造方法 |
JP6812919B2 (ja) * | 2017-07-12 | 2021-01-13 | 昭和電工マテリアルズ株式会社 | 半導体パッケージ |
CN109014656A (zh) * | 2018-08-24 | 2018-12-18 | 云南科威液态金属谷研发有限公司 | 一种无卤助焊剂及其制备方法和应用 |
JP6928294B1 (ja) * | 2020-10-02 | 2021-09-01 | 千住金属工業株式会社 | ソルダペースト |
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JP3420076B2 (ja) * | 1998-08-31 | 2003-06-23 | 新光電気工業株式会社 | フリップチップ実装基板の製造方法及びフリップチップ実装基板及びフリップチップ実装構造 |
JP4094982B2 (ja) * | 2003-04-15 | 2008-06-04 | ハリマ化成株式会社 | はんだ析出方法およびはんだバンプ形成方法 |
US20050217757A1 (en) * | 2004-03-30 | 2005-10-06 | Yoshihiro Miyano | Preflux, flux, solder paste and method of manufacturing lead-free soldered body |
JP2005319470A (ja) * | 2004-05-06 | 2005-11-17 | Katsuaki Suganuma | 鉛フリーはんだ材料、電子回路基板およびそれらの製造方法 |
US20060180245A1 (en) * | 2005-02-15 | 2006-08-17 | Tippy Wicker | Lead-free solder paste |
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2007
- 2007-05-28 JP JP2007140331A patent/JP4385061B2/ja not_active Expired - Fee Related
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2008
- 2008-02-22 CN CNA2008100814451A patent/CN101314199A/zh active Pending
- 2008-02-26 TW TW097106703A patent/TWI430865B/zh not_active IP Right Cessation
- 2008-02-26 KR KR1020080017256A patent/KR20080104945A/ko active Search and Examination
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Cited By (1)
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TWI774536B (zh) * | 2020-09-01 | 2022-08-11 | 日商千住金屬工業股份有限公司 | 助焊劑及焊膏 |
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US20100270365A1 (en) | 2010-10-28 |
JP4385061B2 (ja) | 2009-12-16 |
US20080160331A1 (en) | 2008-07-03 |
TW200846122A (en) | 2008-12-01 |
JP2008080396A (ja) | 2008-04-10 |
KR20080104945A (ko) | 2008-12-03 |
CN101314199A (zh) | 2008-12-03 |
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