TWI406146B - Method for design a modulation circuit - Google Patents
Method for design a modulation circuit Download PDFInfo
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一種電路模組化設計方法，特別是涉及一種可將先前電路圖的電路元件設定或目前電路設計圖的電路元件設定進行複製的電路模組化設計方法。A circuit modular design method, in particular, relates to a circuit modular design method for replicating circuit component settings of a prior circuit diagram or circuit component settings of a current circuit design diagram.
先前技術中，廠商在製造電器設備之電路時，係應用一種或多種電路設計軟體(如Orcad、Allegro、Cadence)先規劃一電路圖，並利用電路設計軟體對此電路圖的規劃結果進行電路模擬運行，以決定是否對電路圖進行修正。In the prior art, when manufacturing a circuit of an electrical device, the manufacturer applies one or more circuit design software (such as Orcad, Allegro, Cadence) to first plan a circuit diagram, and uses the circuit design software to perform circuit simulation operation on the planning result of the circuit diagram. To decide whether to correct the circuit diagram.
電路圖還分為如元件線路圖、功能示意圖等相關類型，根據電路設計軟體提供的種類與檢視介面而形成不同的態樣。但相同之處在於，電路圖之元件特性、接腳等資料皆是利用電路設計軟體提供的元件預設資料進行規劃、定位、佈線與屬性修正後，使得電路在進行電路模擬運行時，各元件係根據設計人員設定好的參數進行模擬。The circuit diagram is also divided into related types such as component circuit diagrams and function diagrams, and forms different types according to the types provided by the circuit design software and the inspection interface. But the similarity is that the component characteristics, pins and other data of the circuit diagram are calculated, positioned, routed and attributed by the component preset data provided by the circuit design software, so that the circuit is in the circuit simulation operation, each component system The simulation is performed according to the parameters set by the designer.
然而，電路設計軟體提供的元件預設資料不見得符合所有設計人員所需，因此當前的電路設計軟體逐漸提供設計人員可自行設定元件的參數，並將參數儲存的能力。However, component design data provided by circuit design software does not necessarily meet the needs of all designers, so current circuit design software gradually provides designers with the ability to set component parameters and store parameters.
然而，同一個電路中，極可能出現需要相似功能的元件(即不同元件設定參數)，廠商不可能為了每一個電路都預先設定所需的元件資料。而且，當廠商設計某些電路時，所需的元件可能在先前設計的電路圖中出現相同，或相類似的元件，但並不是由設計人員自行設定、並儲存的元件參數，設計人員需另費時間再進行相同的工作，重新設定其所需的元件資料，進而花費不少時間成本於電路圖的設計。故得知，如何縮短想要元件資料的建構時間，進而縮減設計電路圖的時間成本，乃各廠商應思考的課題。However, in the same circuit, it is highly probable that components requiring similar functions (ie, different component setting parameters) may occur, and it is impossible for the manufacturer to pre-set the required component data for each circuit. Moreover, when a manufacturer designs certain circuits, the required components may appear the same in the previously designed circuit diagram, or similar components, but the component parameters that are not set and stored by the designer, the designer must pay an additional fee. Time to do the same work, re-set the required component data, and then spend a lot of time on the design of the circuit diagram. Therefore, it is known that how to shorten the construction time of the required component data and reduce the time cost of designing the circuit diagram is a subject that various manufacturers should consider.
本發明的目的係在於提供一種將硬體電路模組化，以迅速取得元件資料的電路設計方法。It is an object of the present invention to provide a circuit design method that modularizes a hardware circuit to quickly acquire component data.
本發明所提供之技術手段係揭露一種電路模組化設計方法，其包含：分析至少一備用電路圖以建立至少一元件模型，元件模型包含一元件線路圖、一設計文件與一子圖。由一電路圖設計系統產生一設計電路圖，並導入至少一元件模型於設計電路圖，以利用元件模型之元件線路圖建立一目標電路於設計電路圖。導入設計電路圖至一電路佈線系統，調整被導入之設計電路圖之元件模型之資料屬性。判斷被調整之設計電路圖是否需要之任一元件模型，當判斷為不需要，儲存設計電路圖，當判斷為需要，將設計電路圖導入電路圖設計系統並導入任一元件模型於設計電路圖，再重新導入設計電路圖至電路佈線系統。The technical means provided by the present invention discloses a circuit modular design method, which comprises: analyzing at least one spare circuit diagram to establish at least one component model, wherein the component model comprises a component circuit diagram, a design file and a subgraph. A design circuit diagram is generated by a circuit diagram design system, and at least one component model is introduced to design the circuit diagram to construct a target circuit to design the circuit diagram by using the component circuit diagram of the component model. Import the design circuit diagram to a circuit wiring system and adjust the data attributes of the component model of the imported design circuit diagram. Determine whether any component model required by the adjusted design circuit diagram, when it is judged as unnecessary, store the design circuit diagram, and when it is judged to be necessary, import the design circuit diagram into the circuit diagram design system and import any component model into the design circuit diagram, and then re-import the design Circuit diagram to circuit wiring system.
本發明所揭露之電路模組化設計方法中，可從先前設計的電路中取出相關的元件資料，進行複製後再導入設計電路圖，與從其它的備用電路圖中取得所需的元件資料，以導入目前設計的電路設計圖中，以形成在同一電路設計圖，或不同電路設計圖中進行相似、相同或相異功能的電路、模組、元件之參數資料之複製行為，藉此縮短設計電路圖的時間成本。In the circuit modular design method disclosed in the present invention, related component data can be taken out from the previously designed circuit, copied and then imported into the design circuit diagram, and the required component data is obtained from other standby circuit diagrams to be imported. In the current circuit design drawing, the copying behavior of the parameters, such as circuits, modules, and components, which perform similar, identical, or different functions in the same circuit design drawing or different circuit design drawing, thereby shortening the design circuit diagram Time costs.
為使對本發明之終點、構造特徵及其功能有進一步之了解，茲配合相關實施例及圖式詳細說明如下：In order to further understand the end point, structural features and functions of the present invention, the related embodiments and drawings are described in detail as follows:
請同時參照圖1與圖2，圖1為本發明實施例之電路圖之元件模型複製示意圖，圖2為本發明實施例之元件模型之建立示意圖。本實施例中，係應用一電路圖設計系統與一電路佈線系統來進行元件模型建立與複製，此例中，電路圖設計系統係指Orcad Capture，電路佈線系統係指Allegro，但不以此為限。請同時參照圖3與圖4以利於了解，圖3係為本發明實施例之電路模組化設計方法流程圖，圖4係本發明實施例之元件模型建立與複製流程圖。Please refer to FIG. 1 and FIG. 2 simultaneously. FIG. 1 is a schematic diagram of component model replication of a circuit diagram according to an embodiment of the present invention, and FIG. 2 is a schematic diagram of establishing a component model according to an embodiment of the present invention. In this embodiment, a circuit diagram design system and a circuit wiring system are used for component model creation and replication. In this example, the circuit diagram design system refers to Orcad Capture, and the circuit cabling system refers to Allegro, but is not limited thereto. Please refer to FIG. 3 and FIG. 4 for better understanding. FIG. 3 is a flowchart of a circuit modular design method according to an embodiment of the present invention, and FIG. 4 is a flow chart of component model establishment and replication according to an embodiment of the present invention.
此電路模組化設計方法中，係分析至少一電路圖以建立至少一元件模型(步驟S110)。設計人員從想要設計的電路圖中，思考可能會用到電路功能(如：濾波、放大/縮小訊號功率、訊號變相…等)、元件類型(如：電阻、電感、電容、電晶體、二極體…等)、電路組件類型(如訊號放大電路、訊號衰減器、濾波器、切換器、截波器…等)、件名稱或電路組件類型、或輸入訊號與輸出訊號的變化關係等一種以上的電路特性。In the circuit modular design method, at least one circuit diagram is analyzed to establish at least one component model (step S110). From the circuit diagram that you want to design, the designer may use circuit functions (such as: filtering, amplifying/reducing signal power, signal phase-changing, etc.), component types (eg, resistors, inductors, capacitors, transistors, diodes). Body, etc.), circuit component type (such as signal amplifier circuit, signal attenuator, filter, switch, chopper, etc.), part name or circuit component type, or the relationship between input signal and output signal, etc. Circuit characteristics.
如圖1與圖2，設計人員係輸入上述的電路功能、元件類型、電路組件類型、元件名稱或電路組件名稱、輸入訊號與輸出訊號的變化關係等一種以上的電路特性條件33於電路圖設計系統100，電路圖設計系統100讀取先前預儲一個以上的電路圖401(步驟S111)。As shown in Fig. 1 and Fig. 2, the designer inputs the above circuit function, component type, circuit component type, component name or circuit component name, change relationship between input signal and output signal, etc., and more than one circuit characteristic condition 33 in the circuit diagram design system. 100. The circuit diagram design system 100 reads the previous pre-stored one or more circuit diagrams 401 (step S111).
在此說明，電路圖設計系統100會從先前預儲的多個電路圖中，根據電路特性條件33逐一解析各電路圖包含的元件，以求尋得完全匹配或具有高度相關性(如功能相關、電路類型相近、元件配置形式相近)的電路圖401。Herein, the circuit diagram design system 100 parses the components included in each circuit diagram one by one from the previously pre-stored plurality of circuit diagrams according to the circuit characteristic condition 33 to find a perfect match or a high correlation (such as function correlation, circuit type). Circuit diagram 401 of similar, similar component configuration.
當任一電路圖401包含有符合上述電路特性條件33的元件時，電路圖設計系統100從電路圖401中選取至少一需求元件以形成一備用元件線路圖402(步驟S112)。於上述過程中，備用元件線路圖402之形成有兩種形式：When any of the circuit diagrams 401 includes components that meet the above-described circuit characteristic conditions 33, the circuit diagram design system 100 selects at least one of the demand components from the circuit diagram 401 to form a spare component wiring pattern 402 (step S112). In the above process, the spare component circuit diagram 402 is formed in two forms:
(1)電路圖設計系統100先選擇元件或電路組件符合上述電路特性條件33的電路圖401，根據電路特性條件33或設計人員預先設定的擷取條件(如元件或電路組件運作特性、元件或電路組件類型)，以從電路圖401中擷取出相關的元件資料與元件圖式，另存為備用元件線路圖402。(1) The circuit diagram design system 100 first selects a circuit diagram 401 in which the component or circuit component meets the above-described circuit characteristic condition 33, according to the circuit characteristic condition 33 or a pre-set capture condition of the designer (such as a component or circuit component operational characteristic, component or circuit component). Type), in order to extract the relevant component data and component pattern from the circuit diagram 401, and save it as the spare component circuit diagram 402.
(2)設計人員對電路圖設計系統100選取的電路圖401進行修改，將需求元件的電路保留，並將其它不需要的元件、功能模組部分的電路刪除，所剩下來的電路圖形態即為上述的備用元件線路圖402。(2) The designer modifies the circuit diagram 401 selected by the circuit diagram design system 100, retains the circuit of the required component, and deletes the circuits of other unnecessary components and functional module parts, and the remaining circuit diagram form is the above. Alternate component wiring diagram 402.
請參照圖2、圖5與圖6，圖5為本發明實施例之備用元件線路圖擷取圖之一例，圖6為本發明實施例之備用元件線路圖完成圖之一例。在此假設，設計人員之設定的擷取條件為半加法器，所找到的電路圖401為全加法器。電路圖設計系統100會從電路圖401中，擷取出一個半加法器(虛線框內)作為備用元件線路圖402；或者，電路圖設計系統100顯示電路圖401的畫面，以設計人員逐一刪除不必要的電路組件或元件，僅保留半加法器的線路，並另存為備用元件線路圖402。Referring to FIG. 2, FIG. 5 and FIG. 6, FIG. 5 is an example of a circuit diagram of a spare component circuit diagram according to an embodiment of the present invention. FIG. 6 is an example of a circuit diagram of a spare component circuit diagram according to an embodiment of the present invention. It is assumed here that the designer's setting of the capture condition is a half adder, and the found circuit diagram 401 is a full adder. The circuit diagram design system 100 extracts a half adder (inside the dashed box) from the circuit diagram 401 as a spare component circuit diagram 402; or, the circuit diagram design system 100 displays a screen of the circuit diagram 401 to remove unnecessary circuit components one by one by the designer. Or component, only the line of the half adder is retained and saved as the spare component wiring diagram 402.
將備用元件線路圖402導入一電路佈線系統200(步驟S113)。此步驟中，因為電路圖設計系統100與電路佈線系統200可讀取得檔案類型極可能為不同或不相容的格式，因此需要利用一個共用的檔案格式來進行資料的輸出與導入。故在此步驟中，電路圖設計系統100係將上述的備用元件線路圖402經確認後自動轉換成電路佈線系統200可讀取的檔案格式。一般而言，多數的電路設計軟體多使用一網表文件(netlist file)的資料格式。因此，本實施例中，由電路圖設計系統100建立一網表文件2b，此網表文件2b係含有上述的備用元件線路圖402，再由電路佈線系統200接收此網表文件2b以取得其中包含的備用元件線路圖402，即可完成將備用元件線路圖402導入電路佈線系統200(步驟S113)的動作。The spare component wiring pattern 402 is introduced into a circuit wiring system 200 (step S113). In this step, since the circuit diagram design system 100 and the circuit wiring system 200 can read the format that the file type is likely to be different or incompatible, it is necessary to use a common file format for data output and import. Therefore, in this step, the circuit diagram design system 100 automatically converts the above-mentioned spare component circuit diagram 402 into a file format readable by the circuit wiring system 200. In general, most circuit design software uses a data format of a netlist file. Therefore, in the present embodiment, a net list file 2b is created by the circuit diagram design system 100. The net list file 2b includes the spare component circuit diagram 402 described above, and the circuit routing system 200 receives the net list file 2b to obtain the inclusion therein. The spare component wiring diagram 402 completes the operation of introducing the spare component wiring pattern 402 into the circuit wiring system 200 (step S113).
由電路佈線系統200分析備用元件線路圖402以建立至少一元件線路圖11、至少一設計文件12與至少一子圖13(步驟S114)。電路佈線系統200在取得上述備用元件線路圖402，係讀取其內包含的元件類別(如電阻、電感、電容、二極體、電晶體…等，但不以此為限)、元件設定(如電阻：6K歐姆、電感：4.3亨利、電容：3.7微法拉，但不以此等數值為限)、功能代表圖示、佈線設定(如線寬：0.35um～0.5um，但不以此等數值為限)與各元件接線圖等資料，以建立對應各元件(功能、電路模組)之一個以上的元件線路圖(circuit layout)11、設計文件(placement file)12與子圖(subdrawing)13。電路佈線系統200會將分析出來的各元件類型，將元件線路圖11、設計文件12與子圖13整合成對應各元件之至少一元件模型1(步驟S115)。The spare component wiring pattern 402 is analyzed by the circuit wiring system 200 to establish at least one component wiring pattern 11, at least one design file 12, and at least one sub-picture 13 (step S114). The circuit wiring system 200 obtains the above-mentioned spare component circuit diagram 402, and reads the component types (such as resistors, inductors, capacitors, diodes, transistors, etc., but not limited thereto) included in the component wiring system 200, and the component settings ( Such as resistance: 6K ohms, inductance: 4.3 Henry, capacitance: 3.7 microfarad, but not limited to such values), function represents the diagram, wiring settings (such as line width: 0.35um ~ 0.5um, but not such The value is limited to the wiring diagram of each component, etc., to establish more than one component circuit layout 11, design file 12 and subdrawing corresponding to each component (function, circuit module). 13. The circuit wiring system 200 integrates the component line pattern 11, the design file 12, and the sub-picture 13 into at least one element model 1 corresponding to each element (step S115).
請參照圖7，其為本發明實施例中之元件模型資料之畫面示意圖，其中元件線路圖11係指其所屬元件或電路組件在被應用於電路設計時，應呈現元件或電路組件的圖式型態，如半加器具有兩輸入端x與y，具有兩輸出端各代表和(sum)與溢位(carry)，設計文件12係指此元件模型1所包含之元件或電路組件的配置設定數值。以半加器而言，其包含一個互斥或閘(xor gate)、一個及閘(and gate)，兩元件之輸入端同為x與y，其中互斥或閘之輸出端為和(sum)，及閘之輸出端為溢位(carry)，及半加法器輸入與輸出的數值變化(真值表)。子圖13係顯示半加器的元件結構圖，其元件連接關係符合設計文件12。Please refer to FIG. 7 , which is a schematic diagram of a component model data according to an embodiment of the present invention. The component circuit diagram 11 refers to a schematic diagram of a component or circuit component when the component or circuit component to which it belongs is applied to the circuit design. A type, such as a half adder having two inputs x and y, having two outputs representing sum and carry, and design file 12 is a configuration of components or circuit components included in the component model 1. Set the value. In the case of a half adder, it includes a xor gate, a gate, and a gate. The inputs of the two components are x and y, and the outputs of the mutex or gate are sum. ), and the output of the gate is a carry, and the value of the input and output of the half adder (true table). Sub-figure 13 shows a component structure diagram of a half adder whose component connection relationship conforms to design file 12.
此元件模型1可儲存於電路佈線系統200，或是轉換成其它檔案格式以儲存在其它可儲存資料的儲存設備，以形成資料庫400。在此說明，步驟S110中所指的電路圖設計系統100可為異於Orcad Capture的電路設計軟體、程式，以及電路佈線系統200可為異於Allegro的電路佈線軟體、程式。任一電路圖設計系統100與任一電路佈線系統200在相互搭配下，只要能達成步驟S111至步驟S115的動作即可。The component model 1 can be stored in the circuit cabling system 200 or converted to other file formats for storage in other storage devices that can store data to form a database 400. Here, the circuit diagram design system 100 referred to in step S110 may be a circuit design software, a program different from Orcad Capture, and the circuit wiring system 200 may be a circuit wiring software and program different from Allegro. Any of the circuit diagram design system 100 and any of the circuit wiring systems 200 may be combined with each other as long as the operations of steps S111 to S115 can be achieved.
由一電路圖設計系統100產生一設計電路圖3a，並導入一個以上的元件模型1於設計電路圖3a，以利用元件模型1之元件線路圖11建立一目標電路於設計電路圖3a(步驟S120)。A design circuit diagram 3a is generated by a circuit diagram design system 100, and more than one component model 1 is introduced into the design circuit diagram 3a to establish a target circuit in the design circuit diagram 3a using the component wiring pattern 11 of the component model 1 (step S120).
電路圖設計系統100根據設計人員之需求或輸入指令如開啟新檔案指令自動產生一個全新、空白或已有電路設計內容的設計電路圖3a。在此說明，所謂已有電路設計內容之設計電路圖包含兩種情形。其一，由電路圖設計系統100的研發人員在設計電路圖設計系統100時，預先儲存的元件資料或電路組件資料，供設計人員直接使用的範本資料。其二，設計人員早先完成的設計電路，或未完成設計的電路，經由儲存而成的舊檔。The circuit diagram design system 100 automatically generates a new, blank or existing circuit design content design circuit diagram 3a based on the designer's needs or input commands such as opening a new file command. It is explained here that the design circuit diagram of the existing circuit design content includes two situations. First, the component data or circuit component data pre-stored by the R&D personnel of the circuit diagram design system 100 when designing the circuit diagram design system 100, for the model materials directly used by the designer. Second, the design circuit that the designer completed earlier, or the circuit that has not been designed, is stored in the old file.
設計人員再從先前建立好的多個元件模型1中，取出此次所設計之電路其需要的元件模型1，透過電路圖設計系統100將被選取的元件模型1導入設計電路圖3a中。電路圖設計系統100會從被選取的各元件模型1中取出相關的元件線路圖11以配置元件來形成上述的目標電路於此設計電路圖3a中。The designer then takes out the component model 1 required for the circuit designed this time from the previously created plurality of component models 1, and introduces the selected component model 1 into the design circuit diagram 3a through the circuit diagram design system 100. The circuit diagram design system 100 will take the associated component circuit diagram 11 from the selected component models 1 to configure the components to form the target circuitry described above in this design circuit diagram 3a.
導入設計電路圖3a至一電路佈線系統200，由電路佈線系統200調整被導入之設計電路圖3a之元件模型1之資料屬性(步驟S130)。由電路圖設計系統100再匯入上述之設計電路圖3a以建立一網表文件2a，此網表文件2a係將上述的設計電路圖3a包含其中，再由電路佈線系統200接收此網表文件2a以取得其中包含的設計電路圖3a，即可完成將設計電路圖3a導入電路佈線系統200的動作。本實施例中，設計電路圖3a被導入電路佈線系統200後，將其視為設計電路圖3b。The design circuit 3a to the circuit wiring system 200 are introduced, and the data attribute of the component model 1 of the introduced design circuit diagram 3a is adjusted by the circuit wiring system 200 (step S130). The circuit diagram design system 100 re-imports the above-mentioned design circuit diagram 3a to create a net list file 2a, which includes the above-mentioned design circuit diagram 3a, and then receives the net list file 2a by the circuit wiring system 200 to obtain The design circuit diagram 3a included therein can complete the operation of introducing the design circuit diagram 3a into the circuit wiring system 200. In the present embodiment, after the design circuit diagram 3a is introduced into the circuit wiring system 200, it is regarded as a design circuit diagram 3b.
設計人員透過電路佈線系統200讀取設計電路圖3a以取得未被調整之任一元件模型1。在此步驟中，設計人員係將調整中的設計電路圖3b，其包含的任一元件模型1之設計文件12的複數個接點資料(Location List)經電路佈線系統200加入標記201，並根據所有接點資料建立一更名文件(Rename file)202。在此說明，所謂標記201可為將接點資料的名稱上，加入一個文字、或符號，以供設計人員辨認應作重編碼(Rename)動作的接點。The designer reads the design circuit diagram 3a through the circuit wiring system 200 to obtain any component model 1 that has not been adjusted. In this step, the designer adds the adjusted design circuit diagram 3b, which includes the plurality of contact lists of the design file 12 of any component model 1 to the mark 201 via the circuit wiring system 200, and according to all The contact data creates a rename file 202. Herein, the mark 201 may be a name or a symbol added to the name of the contact material for the designer to recognize the contact that should be re-encoded.
由電路佈線系統200將設計電路圖3b中，被選取之任一元件模型1之子圖13導入設計電路圖3b之目標電路並作接腳連接定位。在此係指，電路佈線系統200會將被標記完成的設計文件12其內容導入目標電路的接腳屬性中，並將相關的元件模型1之子圖13取出，供設計人員透過電路佈線系統200配置於目標電路中。In the design circuit diagram 3b, the sub-picture 13 of any selected component model 1 is introduced into the target circuit of the design circuit diagram 3b by the circuit wiring system 200 and is connected by pin connection. Herein, the circuit wiring system 200 will import the contents of the marked design file 12 into the pin attributes of the target circuit, and take out the sub-picture 13 of the associated component model 1 for the designer to configure through the circuit wiring system 200. In the target circuit.
請同時參照圖8A與圖8B，圖8A為本發明實施例之目標電路示意圖之一例，圖8B為本發明實施例之目標電路配置元件示意圖之一例，在此藉由半加法器設計為全減法器為例。圖8A所示的目標電路31目前為一半加法器的電路圖，元件配置欄32顯示之元件包含有半加法器、反閘(not gate)或閘(or gate)。設計人員係點選半加法器，半加法器的子圖與半加法器的設定文件會顯示於目標電路31的畫面上，子圖可被點選並拖曳而位移。設計人員藉由電路佈線系統200的控制介面將被點選的半加法器移動，並將半加法器的接腳定位，對設計文件包含的元件屬性進行設定。同理，設計人員係點選反閘，反閘的子圖與半加法器的設定文件會顯示於目標電路上。設計人員藉由電路佈線系統200的控制介面將被點選的反閘移動，並將反閘的接腳定位，對設計文件包含的元件屬性進行設定。或閘與反閘的配置方式雷同，在此不贅述。最後，設計人員將各或閘、各反閘與各半加法器的輸入端與輸出端根據全減法器的電路接線規則進行接線，目標電路即形成如圖8b所示的全減法器。Please refer to FIG. 8A and FIG. 8B simultaneously. FIG. 8A is an example of a schematic diagram of a target circuit according to an embodiment of the present invention, and FIG. 8B is an example of a schematic diagram of a component circuit configuration component according to an embodiment of the present invention, where the half-adder is designed as a full subtraction method. For example. The target circuit 31 shown in Fig. 8A is currently a circuit diagram of a half adder, and the component shown in the component configuration column 32 includes a half adder, a not gate or an or gate. The designer selects the half adder, and the sub-picture and half adder setting files of the half adder are displayed on the screen of the target circuit 31, and the sub-picture can be clicked and dragged and displaced. The designer moves the selected half adder by the control interface of the circuit wiring system 200, and positions the pins of the half adder to set the component attributes included in the design file. In the same way, the designer selects the reverse gate, and the sub-picture of the reverse gate and the setting file of the half adder are displayed on the target circuit. The designer moves the selected reverse gate by the control interface of the circuit wiring system 200, and positions the reverse gate, and sets the component attributes included in the design file. The configuration of the gate and the reverse gate is the same, and will not be described here. Finally, the designer connects the input and output terminals of each or each gate, each of the reverse gates and the respective half adders according to the circuit wiring rules of the full subtractor, and the target circuit forms a full subtractor as shown in FIG. 8b.
最後判斷被導入之設計電路圖3b包含所有元件模型1是否調整完成。當判斷為未完成，再持續執行讀取被導入之該設計電路圖以得知未被調整之任一元件模型的動作。Finally, the design circuit that is imported is shown in Fig. 3b, including whether all component models 1 are adjusted. When it is judged that it is not completed, the design circuit diagram that is imported is continuously read to know the action of any component model that has not been adjusted.
當判斷為完成，電路佈線系統200會去除設計電路圖3b中，其包含元件模型1之設計文件12之標記201，並根據所有的更名文件202對接點資料進行接點更名行為。更名文件202的內容可為設計人員自行設定，或是根據先前標記的內容，直接將標記201的文字儲存於接點資料中。When it is judged complete, the circuit wiring system 200 removes the design circuit FIG. 3b, which includes the mark 201 of the design file 12 of the component model 1, and performs contact renaming behavior for the contact data according to all the renamed files 202. The content of the rename file 202 can be set by the designer, or the text of the mark 201 can be directly stored in the contact data according to the previously marked content.
設計人員可透過電路佈線系統200判斷被調整之設計電路圖3b是否需要之任一元件模型1(步驟S140)。當判斷為需要，由電路佈線系統200將設計電路圖3b重新導入電路圖設計系統100，即形成經電路佈線系統200可調整與修正的設計電路圖3a。設計人員再透過電路圖設計系統100導入想要複製的任一元件模型1於設計電路圖3a(步驟S141)。此步驟中，電路圖設計系統100可使用其內建的佈線複製模組(Layout Copy)進行元件模型1或電路模組複製的行為，之後，重新執行導入設計電路圖3a至電路佈線系統200的步驟。The designer can judge whether or not any of the component models 1 required by the adjusted design circuit diagram 3b is passed through the circuit wiring system 200 (step S140). When it is judged that it is necessary, the design circuit diagram 3b is reintroduced into the circuit diagram design system 100 by the circuit wiring system 200, that is, the design circuit diagram 3a which is adjustable and corrected by the circuit wiring system 200 is formed. The designer then imports any component model 1 to be copied through the circuit diagram design system 100 to design circuit diagram 3a (step S141). In this step, the circuit diagram design system 100 can perform the component model 1 or circuit module copying behavior using its built-in layout copy module (Layout Copy), and then re-execute the steps of importing the design circuit diagram 3a to the circuit wiring system 200.
當判斷為不需要，設計人員可透過電路佈線系統200將設計電路圖3b儲存於裝載電路佈線系統200之設備的儲存空間中(圖未示)，或匯出成不同檔案格式的設計電路圖3c圖檔，以備存在其它儲存設備的資料庫400中(步驟S142)。When it is judged that it is unnecessary, the designer can store the design circuit diagram 3b in the storage space of the device of the load circuit wiring system 200 through the circuit wiring system 200 (not shown), or export the design circuit diagram 3c file into different file formats. For storage in the database 400 of other storage devices (step S142).
請參照圖9，圖9為本發明實施例之設計電路圖分類儲存示意圖。於圖9中，各設計電路圖係依據一分類條件而被儲存於資料庫400(或電路佈線系統200)中，此分類條件為元件或電路組件的名稱或特性、或是由匹配的電路特性條件33作為檔名，並根據名稱、特性或電路特性條件33作為分類的依據(但不以此為限)。如圖9A所示，加法器包含全加法器、半加法器、多位元加法器、前視進位加法器...等，減法器包含全減法器、半減法器、多位元減法器、電壓減法器…等，微積分器包含：比例積分器、米勒積分器、線性微分器、非線性微分器，以此類推，但不以上述為限。設計人員將設計電路圖根據圖9方式進行分類，或是由電路佈線系統200在儲存設計電路圖時，根據設計人員設定的設計電路圖名稱、使用的電路組件，或者是由電路佈線系統200根據內建的分類標準(如電路功能、元件類型、電路組件類型、元件名稱或電路組件名稱…等，但不以此為限)進行分類。此有益於設計人員根據分類以查找所需的元件。Please refer to FIG. 9. FIG. 9 is a schematic diagram of classification and storage of a design circuit diagram according to an embodiment of the present invention. In FIG. 9, each design circuit diagram is stored in a database 400 (or circuit wiring system 200) according to a classification condition, which is a name or a characteristic of a component or a circuit component, or a matching circuit characteristic condition. 33 is used as the file name and is based on the name, characteristic or circuit characteristic condition 33 as a basis for classification (but not limited thereto). As shown in FIG. 9A, the adder includes a full adder, a half adder, a multi-bit adder, a forward-looking adder, etc., and the subtractor includes a full subtractor, a half subtractor, a multi-bit subtractor, Voltage subtractor, etc., the integrator includes: a proportional integrator, a Miller integrator, a linear differentiator, a nonlinear differentiator, and so on, but not limited to the above. The designer classifies the design circuit diagram according to the manner of FIG. 9, or when the circuit wiring system 200 stores the design circuit diagram, according to the design circuit diagram name set by the designer, the circuit component used, or the built-in circuit wiring system 200. Classification criteria (such as circuit function, component type, circuit component type, component name or circuit component name, etc., but not limited to this). This is useful for designers to find the components they need based on the classification.
雖然本發明以前述之較佳實施例揭露如上，然其並非用以限定本發明，任何熟習相像技藝者，在不脫離本發明之精神和範圍內，所作更動與潤飾之等效替換，仍為本發明之專利保護範圍內。While the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and the equivalent of the modification and retouching of the present invention is still within the spirit and scope of the present invention. Within the scope of patent protection of the present invention.
1‧‧‧元件模型1‧‧‧Component model
11‧‧‧元件線路圖11‧‧‧Component circuit diagram
12‧‧‧設計文件12‧‧‧ Design documents
13‧‧‧子圖13‧‧‧Submap
100‧‧‧電路圖設計系統100‧‧‧Circuit Design System
2a、2b‧‧‧網表文件2a, 2b‧‧‧ netlist files
200‧‧‧電路佈線系統200‧‧‧Circuit wiring system
201‧‧‧標記201‧‧‧ mark
202‧‧‧更名文件202‧‧‧Renamed documents
3a、3b、3c‧‧‧設計電路圖3a, 3b, 3c‧‧‧ design circuit diagram
31‧‧‧目標電路31‧‧‧Target circuit
32‧‧‧元件配置欄32‧‧‧Component Configuration Bar
33‧‧‧電路特性條件33‧‧‧Circuit characteristics
400‧‧‧資料庫400‧‧‧Database
401‧‧‧電路圖401‧‧‧Circuit diagram
402．．．備用元件線路圖402. . . Spare component wiring diagram
圖1係本發明實施例之電路圖之元件模型複製示意圖；圖2係本發明實施例之元件模型之建立示意圖；圖3係本發明實施例之電路模組化設計方法流程圖；圖4係本發明實施例之元件模型建立與複製流程圖； 圖5係本發明實施例之備用元件線路圖擷取圖之一例；圖6係本發明實施例之備用元件線路圖完成圖之一例；圖7係本發明實施例中之元件模型資料之畫面示意圖；圖8A係本發明實施例之目標電路示意圖之一例；圖8B係本發明實施例之目標電路之元件配置圖之一例；以及圖9係本發明實施例之設計電路圖分類儲存示意圖。1 is a schematic diagram of a component model of a circuit diagram of an embodiment of the present invention; FIG. 2 is a schematic diagram of the component model of the embodiment of the present invention; FIG. 3 is a flowchart of a circuit modular design method according to an embodiment of the present invention; Flow chart of component model establishment and replication of the embodiment of the invention; 5 is an example of a circuit diagram of a spare component circuit diagram according to an embodiment of the present invention; FIG. 6 is an example of a circuit diagram of a spare component circuit diagram of an embodiment of the present invention; and FIG. 7 is a schematic diagram of a component model data according to an embodiment of the present invention. 8A is an example of a schematic diagram of a target circuit of an embodiment of the present invention; FIG. 8B is an example of a component configuration diagram of a target circuit of an embodiment of the present invention; and FIG. 9 is a schematic diagram of a classification of a design circuit diagram of an embodiment of the present invention.
1．．．元件模型1. . . Component model
11．．．元件線路圖11. . . Component wiring diagram
12．．．設計文件12. . . Designing Documents
13．．．子圖13. . . Subgraph
100．．．電路圖設計系統100. . . Circuit diagram design system
2a．．．網表文件2a. . . Netlist file
200．．．電路佈線系統200. . . Circuit wiring system
201．．．標記201. . . mark
202．．．更名文件202. . . Renamed file
3a、3b、3c．．．設計電路圖3a, 3b, 3c. . . Design circuit diagram
400．．．資料庫400. . . database
Claims (11)
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