TWI380375B - Method for fabricating semiconductor device with vertical channel - Google Patents

Method for fabricating semiconductor device with vertical channel Download PDF

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Publication number
TWI380375B
TWI380375B TW096141333A TW96141333A TWI380375B TW I380375 B TWI380375 B TW I380375B TW 096141333 A TW096141333 A TW 096141333A TW 96141333 A TW96141333 A TW 96141333A TW I380375 B TWI380375 B TW I380375B
Authority
TW
Taiwan
Prior art keywords
forming
insulating layer
hard mask
substrate
pillars
Prior art date
Application number
TW096141333A
Other languages
English (en)
Chinese (zh)
Other versions
TW200901328A (en
Inventor
Min-Suk Lee
Hong-Gu Lee
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200901328A publication Critical patent/TW200901328A/zh
Application granted granted Critical
Publication of TWI380375B publication Critical patent/TWI380375B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/038Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0383Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66666Vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823487MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor
    • H10B12/053Making the transistor the transistor being at least partially in a trench in the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/39DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
    • H10B12/395DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/34DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
TW096141333A 2007-06-26 2007-11-02 Method for fabricating semiconductor device with vertical channel TWI380375B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020070062782A KR100869353B1 (ko) 2007-06-26 2007-06-26 수직 채널 트랜지스터를 구비한 반도체 소자의 제조 방법

Publications (2)

Publication Number Publication Date
TW200901328A TW200901328A (en) 2009-01-01
TWI380375B true TWI380375B (en) 2012-12-21

Family

ID=40161109

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096141333A TWI380375B (en) 2007-06-26 2007-11-02 Method for fabricating semiconductor device with vertical channel

Country Status (5)

Country Link
US (1) US8183112B2 (ko)
JP (1) JP2009010314A (ko)
KR (1) KR100869353B1 (ko)
CN (1) CN101335243B (ko)
TW (1) TWI380375B (ko)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100900148B1 (ko) * 2007-10-31 2009-06-01 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
KR101055747B1 (ko) 2008-11-13 2011-08-11 주식회사 하이닉스반도체 수직 채널 트랜지스터를 구비하는 반도체 장치의 제조방법
KR101075492B1 (ko) 2009-03-23 2011-10-21 주식회사 하이닉스반도체 수직트랜지스터를 구비한 반도체장치 및 그 제조 방법
KR101094371B1 (ko) 2009-07-03 2011-12-15 주식회사 하이닉스반도체 수직트랜지스터를 구비한 반도체장치 제조 방법
US8283715B2 (en) * 2010-08-12 2012-10-09 Rexchip Electronics Corporation Method and apparatus for buried word line formation
KR101133701B1 (ko) * 2010-09-10 2012-04-06 주식회사 하이닉스반도체 매립비트라인을 구비한 반도체장치 제조 방법
KR101699442B1 (ko) * 2010-10-13 2017-01-25 삼성전자 주식회사 수직 채널 트랜지스터를 구비한 반도체 소자의 제조 방법
KR20130055983A (ko) * 2011-11-21 2013-05-29 에스케이하이닉스 주식회사 반도체 소자 및 그 제조 방법
US9076824B2 (en) 2012-11-02 2015-07-07 Micron Technology, Inc. Memory arrays with a memory cell adjacent to a smaller size of a pillar having a greater channel length than a memory cell adjacent to a larger size of the pillar and methods
TWI509689B (zh) * 2013-02-06 2015-11-21 Univ Nat Central 介電質材料形成平台側壁的半導體製造方法及其半導體元件
JP6437351B2 (ja) 2015-03-13 2018-12-12 東芝メモリ株式会社 半導体記憶装置及び半導体装置の製造方法
CN111261700A (zh) * 2020-01-21 2020-06-09 中国科学院微电子研究所 C形沟道部半导体器件及其制造方法及包括其的电子设备
CN114121818B (zh) * 2021-11-15 2023-05-26 长鑫存储技术有限公司 半导体器件及其形成方法
CN116209258B (zh) * 2022-11-01 2024-03-29 北京超弦存储器研究院 存储单元的存储结构和制备方法
CN116209259B (zh) * 2022-11-01 2024-03-15 北京超弦存储器研究院 存储单元阵列结构和制备方法

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Publication number Priority date Publication date Assignee Title
JPH0834302B2 (ja) * 1990-04-21 1996-03-29 株式会社東芝 半導体記憶装置
US6034389A (en) 1997-01-22 2000-03-07 International Business Machines Corporation Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array
US6670642B2 (en) 2002-01-22 2003-12-30 Renesas Technology Corporation. Semiconductor memory device using vertical-channel transistors
US7242057B2 (en) * 2004-08-26 2007-07-10 Micron Technology, Inc. Vertical transistor structures having vertical-surrounding-gates with self-aligned features
KR100618875B1 (ko) * 2004-11-08 2006-09-04 삼성전자주식회사 수직 채널 mos 트랜지스터를 구비한 반도체 메모리소자 및 그 제조방법
KR100734266B1 (ko) * 2005-07-15 2007-07-02 삼성전자주식회사 콘택 저항이 개선된 수직 채널 반도체 소자 및 그 제조방법
KR100675285B1 (ko) * 2005-10-10 2007-01-29 삼성전자주식회사 수직 트랜지스터를 갖는 반도체소자 및 그 제조방법
KR100660881B1 (ko) * 2005-10-12 2006-12-26 삼성전자주식회사 수직 채널 트랜지스터를 구비한 반도체 소자 및 그 제조방법
KR100688576B1 (ko) * 2005-10-14 2007-03-02 삼성전자주식회사 수직채널 트랜지스터를 갖는 반도체 메모리 장치 및 그제조방법
JP4315943B2 (ja) * 2005-10-18 2009-08-19 株式会社ルネサステクノロジ 半導体装置の製造方法
KR100723527B1 (ko) * 2006-02-13 2007-05-30 삼성전자주식회사 수직 채널 트랜지스터를 구비한 반도체 소자의 제조방법 및그에 의해 제조된 반도체 소자

Also Published As

Publication number Publication date
TW200901328A (en) 2009-01-01
US8183112B2 (en) 2012-05-22
CN101335243B (zh) 2010-06-16
KR100869353B1 (ko) 2008-11-19
US20090004861A1 (en) 2009-01-01
CN101335243A (zh) 2008-12-31
JP2009010314A (ja) 2009-01-15

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