TWI340428B - Semiconductor device and fabrication process thereof - Google Patents
Semiconductor device and fabrication process thereofInfo
- Publication number
- TWI340428B TWI340428B TW096114392A TW96114392A TWI340428B TW I340428 B TWI340428 B TW I340428B TW 096114392 A TW096114392 A TW 096114392A TW 96114392 A TW96114392 A TW 96114392A TW I340428 B TWI340428 B TW I340428B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- fabrication process
- fabrication
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006254426A JP5162869B2 (ja) | 2006-09-20 | 2006-09-20 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200816377A TW200816377A (en) | 2008-04-01 |
TWI340428B true TWI340428B (en) | 2011-04-11 |
Family
ID=39187740
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096114392A TWI340428B (en) | 2006-09-20 | 2007-04-24 | Semiconductor device and fabrication process thereof |
Country Status (5)
Country | Link |
---|---|
US (2) | US20080067680A1 (zh) |
JP (1) | JP5162869B2 (zh) |
KR (1) | KR100857968B1 (zh) |
CN (1) | CN101150112B (zh) |
TW (1) | TWI340428B (zh) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6764940B1 (en) | 2001-03-13 | 2004-07-20 | Novellus Systems, Inc. | Method for depositing a diffusion barrier for copper interconnect applications |
US8298933B2 (en) | 2003-04-11 | 2012-10-30 | Novellus Systems, Inc. | Conformal films on semiconductor substrates |
US7842605B1 (en) | 2003-04-11 | 2010-11-30 | Novellus Systems, Inc. | Atomic layer profiling of diffusion barrier and metal seed layers |
US7510634B1 (en) | 2006-11-10 | 2009-03-31 | Novellus Systems, Inc. | Apparatus and methods for deposition and/or etch selectivity |
US7682966B1 (en) | 2007-02-01 | 2010-03-23 | Novellus Systems, Inc. | Multistep method of depositing metal seed layers |
US8030778B2 (en) * | 2007-07-06 | 2011-10-04 | United Microelectronics Corp. | Integrated circuit structure and manufacturing method thereof |
JP5272221B2 (ja) * | 2008-05-26 | 2013-08-28 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7964966B2 (en) * | 2009-06-30 | 2011-06-21 | International Business Machines Corporation | Via gouged interconnect structure and method of fabricating same |
WO2011077580A1 (ja) | 2009-12-26 | 2011-06-30 | キヤノン株式会社 | 固体撮像装置および撮像システム |
KR101056247B1 (ko) | 2009-12-31 | 2011-08-11 | 삼성모바일디스플레이주식회사 | 화소 및 이를 이용한 유기전계발광 표시장치 |
JP5451547B2 (ja) * | 2010-07-09 | 2014-03-26 | キヤノン株式会社 | 固体撮像装置 |
US8609540B2 (en) * | 2011-06-20 | 2013-12-17 | Tessera, Inc. | Reliable packaging and interconnect structures |
JP6061181B2 (ja) | 2012-08-20 | 2017-01-18 | ローム株式会社 | 半導体装置 |
KR101994237B1 (ko) * | 2012-08-28 | 2019-06-28 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
US10032712B2 (en) | 2013-03-15 | 2018-07-24 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor structure |
US9343357B2 (en) * | 2014-02-28 | 2016-05-17 | Qualcomm Incorporated | Selective conductive barrier layer formation |
US20160300757A1 (en) * | 2015-04-07 | 2016-10-13 | Applied Materials, Inc. | Dielectric constant recovery |
US10975465B2 (en) * | 2016-05-16 | 2021-04-13 | Ulvac, Inc. | Method of forming internal stress control film |
JP7062535B2 (ja) * | 2018-06-27 | 2022-05-06 | 株式会社アルバック | スパッタ成膜方法 |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6290825B1 (en) * | 1999-02-12 | 2001-09-18 | Applied Materials, Inc. | High-density plasma source for ionized metal deposition |
US6451177B1 (en) * | 2000-01-21 | 2002-09-17 | Applied Materials, Inc. | Vault shaped target and magnetron operable in two sputtering modes |
US6277249B1 (en) | 2000-01-21 | 2001-08-21 | Applied Materials Inc. | Integrated process for copper via filling using a magnetron and target producing highly energetic ions |
JP2001284449A (ja) | 2000-03-31 | 2001-10-12 | Sony Corp | 半導体装置の製造方法 |
US6624066B2 (en) * | 2001-02-14 | 2003-09-23 | Texas Instruments Incorporated | Reliable interconnects with low via/contact resistance |
US6689684B1 (en) * | 2001-02-15 | 2004-02-10 | Advanced Micro Devices, Inc. | Cu damascene interconnections using barrier/capping layer |
US6764940B1 (en) | 2001-03-13 | 2004-07-20 | Novellus Systems, Inc. | Method for depositing a diffusion barrier for copper interconnect applications |
US7186648B1 (en) * | 2001-03-13 | 2007-03-06 | Novellus Systems, Inc. | Barrier first method for single damascene trench applications |
US6642146B1 (en) * | 2001-03-13 | 2003-11-04 | Novellus Systems, Inc. | Method of depositing copper seed on semiconductor substrates |
US6607977B1 (en) | 2001-03-13 | 2003-08-19 | Novellus Systems, Inc. | Method of depositing a diffusion barrier for copper interconnect applications |
JP2003068848A (ja) * | 2001-08-29 | 2003-03-07 | Fujitsu Ltd | 半導体装置及びその製造方法 |
JP3540302B2 (ja) * | 2001-10-19 | 2004-07-07 | Necエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US6887786B2 (en) * | 2002-05-14 | 2005-05-03 | Applied Materials, Inc. | Method and apparatus for forming a barrier layer on a substrate |
JP4193438B2 (ja) * | 2002-07-30 | 2008-12-10 | ソニー株式会社 | 半導体装置の製造方法 |
JP4242136B2 (ja) * | 2002-10-31 | 2009-03-18 | 富士通マイクロエレクトロニクス株式会社 | 配線構造の形成方法 |
US7241696B2 (en) * | 2002-12-11 | 2007-07-10 | International Business Machines Corporation | Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer |
JP2005072384A (ja) * | 2003-08-26 | 2005-03-17 | Matsushita Electric Ind Co Ltd | 電子デバイスの製造方法 |
US20050112957A1 (en) * | 2003-11-26 | 2005-05-26 | International Business Machines Corporation | Partial inter-locking metal contact structure for semiconductor devices and method of manufacture |
US20050151263A1 (en) * | 2004-01-08 | 2005-07-14 | Fujitsu Limited | Wiring structure forming method and semiconductor device |
US7071095B2 (en) * | 2004-05-20 | 2006-07-04 | Taiwan Semiconductor Manufacturing Company | Barrier metal re-distribution process for resistivity reduction |
JP2006216787A (ja) * | 2005-02-03 | 2006-08-17 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP4589787B2 (ja) * | 2005-04-04 | 2010-12-01 | パナソニック株式会社 | 半導体装置 |
JP2007027347A (ja) * | 2005-07-15 | 2007-02-01 | Sony Corp | 半導体装置およびその製造方法 |
DE102005057075B4 (de) * | 2005-11-30 | 2012-04-26 | Advanced Micro Devices, Inc. | Halbleiterbauelement mit einer Kupferlegierung als Barrierenschicht in einer Kupfermetallisierungsschicht und Verfahren zu dessen Herstellung |
US7528066B2 (en) * | 2006-03-01 | 2009-05-05 | International Business Machines Corporation | Structure and method for metal integration |
JP2008041700A (ja) * | 2006-08-01 | 2008-02-21 | Tokyo Electron Ltd | 成膜方法、成膜装置及び記憶媒体 |
DE102007004860B4 (de) * | 2007-01-31 | 2008-11-06 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung einer Kupfer-basierten Metallisierungsschicht mit einer leitenden Deckschicht durch ein verbessertes Integrationsschema |
-
2006
- 2006-09-20 JP JP2006254426A patent/JP5162869B2/ja not_active Expired - Fee Related
-
2007
- 2007-04-23 US US11/785,949 patent/US20080067680A1/en not_active Abandoned
- 2007-04-24 TW TW096114392A patent/TWI340428B/zh not_active IP Right Cessation
- 2007-05-18 KR KR1020070048915A patent/KR100857968B1/ko active IP Right Grant
- 2007-05-18 CN CN2007101033093A patent/CN101150112B/zh not_active Expired - Fee Related
-
2010
- 2010-09-30 US US12/895,002 patent/US20110021020A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
TW200816377A (en) | 2008-04-01 |
JP5162869B2 (ja) | 2013-03-13 |
CN101150112B (zh) | 2010-06-02 |
CN101150112A (zh) | 2008-03-26 |
US20110021020A1 (en) | 2011-01-27 |
US20080067680A1 (en) | 2008-03-20 |
KR20080026467A (ko) | 2008-03-25 |
KR100857968B1 (ko) | 2008-09-10 |
JP2008078300A (ja) | 2008-04-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |