TWI312563B - Vacuum jacketed electrode for phase change memory element - Google Patents
Vacuum jacketed electrode for phase change memory element Download PDFInfo
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- TWI312563B TWI312563B TW095134375A TW95134375A TWI312563B TW I312563 B TWI312563 B TW I312563B TW 095134375 A TW095134375 A TW 095134375A TW 95134375 A TW95134375 A TW 95134375A TW I312563 B TWI312563 B TW I312563B
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- SYQBFIAQOQZEGI-UHFFFAOYSA-N osmium atom Chemical compound [Os] SYQBFIAQOQZEGI-UHFFFAOYSA-N 0.000 claims 1
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 5
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- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
- H10N70/8413—Electrodes adapted for resistive heating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/861—Thermal details
- H10N70/8616—Thermal insulation means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
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- Semiconductor Memories (AREA)
Description
1312563 九、發明說明： 【相關參考申請案】 本發明係主張美國暫時專利申請案號第60/738,883號， 其名稱為 ’’Vacuum Jacketed Electrode for Phase Change Memory Element”，其申請曰為2005年11月21曰。該申 請案係列為本案之參考。 【聯合研究合約之當事人】 約國際商業機械公司、台灣旺宏國際股份有限公司及德 國英飛凌技術公司（Infineon Technologies A.G.)係為聯合研 究合約之當事人。 【發明所屬之技術領域】 本發明一般係有關於非揮發性記憶元件，尤其係有關於 使用相轉換材料之記憶元件。 【先前技術】 以相轉換為基礎之記憶材料係被廣泛地運用於讀寫光 碟片中’且這些材料也逐漸使用於電腦記憶元件之中。這 些材料包括有至少兩種固態相，包括如一大部分為非晶態 之固悲相’以及一大體上為結晶態之固態相。雷射脈衝係 用於讀寫光碟片中，以在二種相中切換，並讀取此種材料 於相轉換之後的光學性質，並且以同樣方法使用電脈衝於 電腦記憶元件中。 如硫屬化物及類似材料之此等相轉換記憶材料，可藉由 1312563 施加其幅度適用於穑髅赍妨丄ι =
可用於隨機存取讀寫。
-、、口日日又係為一低電流步驟。從結晶 乂下指稱為重置（reset))一般係為一高電 紐暫的高電流密度脈衝以融化或破壞結 曰曰結構，其後此相轉換材料會快速冷㉛，抑制相轉換的過 ，，使得至少部份相轉換結構得以_在非晶態。理想狀 態下，致使相轉換材料從結晶態轉變至非晶態之重置電流 幅度應越低越好。欲降低重置所需的重置電流幅度，可藉 由減低在記憶體中的相轉換材料元件的尺寸、以及減少電 極與此相轉換材料之接觸面積而達成，因此可針對此相轉 換材料元件施加較小的絕對電流值而達成較高的電流密 度。 此領域發展的一種方法係致力於在一積體電路結構上 形成微小孔洞’並使用微量可程式化之電阻材料填充這些 微小孔洞。致力於此等微小孔洞的專利包括：於1997年 11月11日公告之美國專利第5,687，112號，，Multibit Single Cell Memory Element Having Tapered Contact”、發明人為 Ovshinky;於1998年8月4曰公告之美國專利第5,789,277 號’’Method of Making Chalogenide [sic] Memory Device”、 發明人為Zahorik等；於2000年11月21日公告之美國專 利第 6,150,253 號” Controllable Ovonic Phase-Change Semiconductor Memory Device and Methods of Fabricating the Same”、發明人為Doan等；於1999年7月6日公告之 6 1312563 . 美國專利第 5,920,788 號’’Chalcogenide Memory Cell with a ' Plurality of Chalcogenide Electrodes,”、發明人為 Reinberg。 - 習知相轉換記憶體與結構會產生的特殊問題在於其所 產生的散熱效應。一般而言，先前技術係教示如何使用金 屬電極於相轉換記憶元素的兩側，而電極的尺寸係大約等 於相轉換構件。這些電極會做為散熱裝置，金屬的高導熱 性會快速地將熱量導離相轉換材料。由於相轉換現象係為 加熱的結果，因此散熱效應會導致需要更大的電流以產生 理想的相轉換現象。 • 解決這種熱流問題的一種方法’可見於美國專利第 6,815,704 號”Self Aligned Air-Gap thermal Insulation for Nano-scale Insulated Chalcogenide Electronics (NICE) RAM”，其中使用一種方式以隔離此記憶細胞。此結構及其 製造程序’係太過複雜且仍無法獲得記憶元件中的最小電 流。 因此，較佳係可提供一種記憶細胞結構，其具有小尺寸 以及低重置電流’同時其結構可解決導熱性問題，同時能 提供一種用以製造此等結構的方法而能滿足用以製造大尺 寸記憶元件時的嚴格製程變數規格。較佳係提供一種製造 程序以及結構’其可相容於製造同一積體電路的周邊電路。 【發明内容】 本發明之一目的，係在提供/種記憶元件其具有環繞第 一電極元素之真空護罩，以提供較佳的隔熱效果。此記憶 元件包括—第一電極元素；一相轉換記憶元素其係接觸至 第一電極元素；一介電填充層，其係圍繞相轉換記憶元素 以及第一電極元素’其中介電層與第一電極元素之間有一 7 1312563 間隔，以在第一電極元素盥 且相轉換記憶層係密封至；;=層之間定義—腔室； 電極元素之隔熱護罩。 、充9，以疋義一環繞第一 【實施方式】 =明關於^實施例的討論，係參照 =其:僅為舉例心 範_申請專本發明之料姻^ 該胞。如本文所述以及 狀態以指定—單一計以維持—電荷或 而吕’錢細胞係㈣成陣列以提供 = 的記憶細胞中，-記.=== 取記憶:胞中而f習知的動態隨機存 =狀態:指示-邏， 1則#日不一邏輯，，〇，，（或低狀態）。 實施例中，—記憶元素1G鱗示於第1圖 一一。示，為了簡潔起見，此記憶元素10係繪示為單 y ;。在實務上，每一元素係為一記憶細胞的一部份， 而母=圮憶細胞則是一較大記憶陣列的一部份，如下所詳 Ϊ素=素的結構會先被討論’接著描述用以製造記憶 一^記憶元錢形錄—基板I2之上，基板I2較佳係為 一；丨2填充材料，例如二氧化矽。其他適合的材料包括聚 亞醯胺、氮化矽、或其他習知的介電填充材料。延伸穿透 1312563 接觸至外部電路的是-拾襄-I „耐火金屬而形成。其^素14，較佳係 錮、銘、紐、^ 的耐火今麗4紅处 從於客-?、鉑、銥、鑭、鎳、與釘屬 素20、以及一上ϋ申f = 一下電極元素16、一相轉換元 電路。 L 。上電極元素係電接觸至外部 相轉換元素可由—類較佳 =材：所構成。硫屬化物包括下列二4屬化物材料為基 i=t(s)、，、以及碲(☆素之任-者:氧 2 VI_部分。硫屬化物包括將_上形成元素週期表 Ϊ性之70素或自由基結合而得。硫c素與—更為正 金其他物質如過渡金屬等結合5物合金包括將硫 J通'包括—個以上選自元素週期表第i—硫屬化合物合 _ jGe)以及錫（Sn)。通常，硫屬^攔的元素，例如 疋素中-個以上的複合物：録（叫 5物合金包括下列 $及銀（Ag)。許多以相轉換為基礎^ (Ga)、錮（In)、 ^於技術文件中，包括下列合金 錢材料已經被描 f /碑、録/碲、鍺/錦/蹄、銦/録/碲、錄錦、銦/錦、銦/砸、 錄/鍺 '銀/銦/錦/碲、鍺/錫/録/碲、碲 '錫/録/碌、 錯/錦/硫。在鍺/録/蹄合金家族中，可以硒/碲、以及蹄 成分。此成分可以下列特徵式表示：Te H^圍的合金 包八^研^ ^ 了最有用的合金係為3，^沈^斗中所 二之平均碲k度係遠低於7〇%，典型地係低於6〇%，並 巧般型態合金中的碲含量範圍從最低23%至最高58%， j最佳係介於48%至58%之碲含量。鍺的濃度係高於約 ~/〇，且其在材料中的平均範圍係從最低8%至最高3〇%， 般係低於50%。最佳地，鍺的濃度範圍係介於8%至 1312563 40%。在此成分中所剩下的主要成分則為録。上述$ γ 係為原子百分比，其為所有組成元素加總為1〇〇$比 (Ovshinky ‘112專利，欄10〜11 )由另一研究者所評^的 特殊合金包括 Ge2Sb2Te：5、GeSb〗Te4、以及 GeSbqTey。' (Noboru Yamada，’’Potential of Ge-Sb-Te Phase-change Optical Disks for High-Data-Rate Recording,,J SPIE v.3109, pp. 28-37(1997))更一般地，過渡金屬如鉻(Cr)、鐵(Fe)、 鎳(Ni)、鈮(Nb)、鈀(Pd)、鉑（Pt)、以及上述之混合物或合 金’可與鍺/銻/碲結合以形成一相轉換合金其包括有可程式 化的電阻性質。可使用的記憶材料的特殊範例，係如 Ovshinsky ‘112專利中欄11-13所述，其範例在此係列入參 考。 相變化材料能在此細胞主動通道區域内依其位置順序 於材料為一般非晶狀態之第一結構狀態與為一般結晶固體 狀態之第二結構狀態之間切換。這些材料至少為雙穩定 態。此詞彙「非晶」係用以指稱一相對較無次序之結構， 其，之一單晶更無次序性，而帶有可偵測之特徵如較之結 晶癌更高之電阻值。此詞彙「結晶態」係用以指稱一相對 較有次序之結構，其較之非晶 態更有次序，因此包括有可 债測的特徵例如比非晶態更低的電阻值。典型地，相轉換 材料可電切換至完全結晶態與完全非晶態之間所有可偵測 ^不同狀態。其他受到非晶態與結晶態之改變而影響之材 料4寺中包括，原子次序、自由電子密度、以及活化能。此 1料可切換成為不同的固態、或可切換成為由兩種以上固 ^所形成之混合物，提供從非晶態至結晶態之間的灰階部 分。此材料中的電性質亦可能隨之改變。 相轉換材料可藉由施加一電脈衝而從一種相態切換至 中華民國發明專利申請案第095134375號 無劃線之中文說明書修正頁 中華民國98年2月20日送呈 1312563 另一相態。先削觀察指出，一較短、較大幅度的脈衝傾向 於將相轉換材料的相態改變成大體為非晶態。一較長、較 ，，度的脈衝傾向於將相轉換材料的相態改變成大體為結 ^態。在較短、較大幅度脈衝中的能量夠大，因此足以破 壞^晶結構的鍵結，同時夠短因此可以防止原子再次排列 。在沒有残當實驗的情形下，可決定特別適用 邮八特換合金的適#脈衝^變曲線。在本文的後續 亦；使用】他2料係以GST代稱’同時吾人亦需瞭解’ 適用於相^換Ϊ =相轉換材料。在本文中所描述之一種 上斑^ 素中之材料，係為Gejt^Te5。 成，例較佳係域化鈦(或類似材料所構 产、μ、巧選自下列群組之元素：矽、鈦、鋁、钽、 υ:係是’做為參考時，在圖式中由 厂水平。、稱為垂直」，而侧向方向則為「橫向」或 在製造指稱對於元件巾的實際方向並無影響，包括 隹表仏甲或使用時皆然。 方二也：相轉換元素20的厚度（亦即平行於頁面長軸 寸）係介於約20nm至I50nm，最佳地俜為約 70nm。下雷栖κ t+ a 吼丨土吧你約幻 社α怂去的厚度應介於約20nm至約15〇nm，且最 勤方向的約1〇〇Ilm。下電極16的寬度（亦即平行於頁面短 約^寸）係介於約l〇nm至約7〇nm，且最佳地係為 佳地係為約^緣細胞的寬度應介於2nm至約2〇nm，且最 =力ionm。因此，相轉換元件的總寬度應介於5〇nm 、\ σ nm ’且最佳地為約7〇ηιη。 、電，疋素與相轉換元素係被一上絕緣層26所包 盆 材料較佳係與基板丨2的材料相同或相似。在二 係為-障礙層18，其係由氣切或類似材料所構：:之門 11 1312563 上絕緣層係與相轉換元素與上電極的側邊接觸，但並不 與下電極元素接觸。相轉換元素水平地延伸超越下電極的 邊緣，使得相轉換元素的兩端、下電極與上絕緣層的侧邊、 以及障礙層的一部份，定義了一絕熱細胞24，其係圍繞著 下電極元素16。 在操作時，流經相轉換元素的電流係從栓塞組合14流 至下電極元素16、流入相轉換元素20、而從上電極22流 出。當然，改變元素配置即可改變電流方向，如該領域所 週知。在任一狀況中，相轉換材料係受到電流所產生的焦 > 耳熱效應，如上所述，造成在GST材料中央的溫度上升。 當溫度超過相轉換所需要的溫度時，相轉換材料的一部份 會改變其狀態。在相轉換元素中，溫度並不是四處均一的， 而是隨著電流密度的改變會產生大幅的變化。相轉換材料 的溫度會決定所產生的效果，因此電流的選擇係用以在 GST材料中達到足以產生理想結果的溫度，無論是非晶態 或結晶態。若欲讀取此元素的狀態，則施加一低電流以做 為感測用。此讀取操作係為非破壞性的，因為元素的溫度 係保持於相轉換的臨界點之下。 _ 隔熱細胞24的作用係將熱量維持在相轉換元素中，因 而有數個正面效果。首先，藉由防止熱量離開下電極元素， 此種設計降低了達到相轉換現象所需要的總熱量，進而減 少了每一次「設定」（SET)或「重置」（RESET)操作所 須要的電流。同時，將熱量維持在下電極元素内，則減少 了傳遞到記憶陣列中其他部分的熱量，亦即直接增加了此 元件的壽命。由於在一個完整的積體電路中，記憶元素的 數量非常龐大（舉例而言，在1GB記憶元件中，至少有八 十億個元素），因此上述的熱量降低效用是非常明顯的。因 12 13l2563 此，上述的設計將可允許記憶元素的較低電流消耗。 用以製造本發明之記憶元件的製程實施例，係如第 2a-2m圖所杀。如此領域中所週知，一記憶陣列較佳係使 用成對的記憶細胞而形成，其結構如圖所示。此製程係以 /妒第2a圖所示之基底結構開始，其係適合形成多個記憶 麵胞，如下所述。栓塞元素14a與14b係延伸穿透基板材 科12，作用炱分、隔的記憶元素。此二記憶元素所使用的材 科係如上所述。字元線15a,15b係以垂直圖式的方向延伸， 以/習知的方式連接數個記憶元素。較佳地係以多晶矽形 成箏元線。共同源極線17係延伸經過記憶元素對的中間， 行於字元線。 第2b圖描述了電極材料層116的加入，其成分係如上 所述。在後續的二圖式2c與2d中，此結構係做為蝕刻操 作的準備，包括光阻材料5〇在預定位置的沈積與圖案化。 然而，在此習知的微影製程並不足以達成所需要的解析 度二Γ為下電極疋素（從氮化鈦層116形成）的寬度係小 微影技術的最小特徵尺寸。因此，在第2c圖所示的 春的+2阻劑係圖案化至可能的最小尺寸，接著在第2d 52成此^行修剪，以產生尺寸符合需求的蝕刻遮罩 查中專利申二果的製程係揭露於本發明之發明人的另一審 接著進案，其細節與本發明並無直接關係。 形成了下電刻步驟，其結果係如第2e圖所示，其中係 性蝕刻、其使疋素16a與16b ’較佳係使用一乾式非等向 礎的電漿化八用一反應性離子蝕刻（RIE)、以及以氯為基 制蝕刻的级赴物。亦可使用一光學發散工具，以確認並控 在蚀刻H料到達基板層時。 ’進行一障礙層118的沈積，其係由上述的 13 1312563 氮化矽所構成’如第2fI^
絕緣層26a的沈積，如^不。此層之後係接著進行一上 的材料相同或類似，例$ §备圖所不，其材料係與基板U 得其完全覆蓋下電極元素2切。”的沈積方式係使 到平面化製程，以顯露一 “礙】。接者’上絕緣層係受 2h圖所示。 D 70件16a，16b的上層，如第 熱隔離細胞係在接下央 層118之中鄰近下電極元、沾二"驟中形成。首先，P章礙 示。在此步驟中係使用一:、"^分係被㈣’如第2i圖所 層材料。磷酸#刻係、用來=% ’以選擇性地钱刻障礙 驟使其停止於下電極戋介^的材料氮化矽。控制蝕刻步 在餘刻步驟之後，進々材料發生大幅度钱刻之前。 GST材料120於介電材料^^步驟沈積作用，以沈積一層 122 (較佳為氮化鈦），如 圓再接著沈積一層電極材料 由將先前蝕刻步驟中留下的j、7示。此沈積作用必須藉 胞24a，24b。此步驟所使用的封而足以形成熱隔離細 材料延伸進入此細胞並密封:衣程係為濺鍍，使得GST 鍍不會-次密封所有的細胞U參數的選擇必須使得機 下-步驟定義了記憶元素對如二領广所週知。 圖案化與蝕刻步驟的結果， a二、10b。第2k圖描述了 電極材料層，係被侧而留下步驟中沈積的GST與 電極元素，其-般係位於下^轉^元件施,施、以及上 案化與1«彳操作制於習知技術。a，16b上的中央。此圖 —最後二步驟則完成了記憶元素的 盍氧化物層26b係施加至第2k R击裏在弟圖中，—覆 應與絕緣層26a中所使用的材^上:此材料 足以完全覆蓋記憶元素1如與i丨:且二：深度必須 ” i〇b。在第2m圖中的最後步 1312563 . 驟中，係繪示金屬化過程，其顯示了接觸元素28a與28b - 的形成，接觸元素係從上電極元素22a,22b開始延伸，而 , 位元線30則橫跨了記憶元素10a與10b、並雙方向延伸至 其他記憶元素，如此領域中所週知。 一替代製程係如第3a-3j圖所示。一般而言，此方法係 遵循大馬士革鑲故技術，此技術一般避免了習知用以沈積 金屬與活性材料於大範圍區域中、接著進行微影圖案化與 介電填充步驟，而是先沈積介電填充材料、再接著形成與 填充（相當微小）金屬與活性材料區域。 • 此製程係開始於一如第3a圖所示的基底結構，此結構 係適合形成多個記憶細胞，如下所示。栓塞元素214a與 214b係延伸通過基板材料212，而作用至分離的記憶元 素。此二元素所使用的材料係如上所述。字元線215a，215b 係沿著垂直於圖式的方向延伸，以習知方式連接數個記憶 元素。較佳地，字元線係由多晶矽所形成。共同源極線217 延伸穿過記憶元素對的中間，平行於字元線。 第3b圖描繪了上介電層226的加入，其材料較佳係與 基板所使用的材料相同。在接續的第3c-3f圖中，係形成每 ® 一記憶元素的下半部。首先，上介電層係經圖案化與独刻， 以生成二凹洞211a，211b，分別位於栓塞214a,214b之上。 此I虫刻步驟（可由反應性離子钱刻完成）必須控制以露出 栓塞元素的上表面。用以生成這些凹洞的微影製程是此領 域中所週知的。接著如第3d圖所示，側壁218a與218b係 形成於每一凹洞中。側壁較佳係包括氮化矽或類似材料。 較佳地，側壁係利用化學氣相沈積（CVD)或類似製程而 沈積，接著進行反應性離子蝕刻以形成此側壁。接著則進 行如第3e圖所示的沈積步驟，其中係形成下電極元素 15 1312563 21=，216b ’較佳係使用CVD或其他已知沈積技術此 元素較佳係包括氮化鈦或類似材料，如上所述。最後: 壁218a，218b被餘刻移除，如第3f圖所示。在此步驟中， 係使用-選擇性餘刻側壁層材料的濕式姓刻製程 刻係用以針對較佳材料氮化石夕進行飿刻。同時，控 =驟使其在下電極或介電材料發生大幅度㈣之前就^亭 、熱絕〕緣細胞與記憶元素的上半部係在下二步騍中形 成。如第3g圖所示的二步驟沈積作用，係用以沈積—芦 =ST材料320於介電材料226a之上，接著沈積一層電極& 料322 (較佳為氮化鈦）。此沈積作用必須可以密封先前蝕 刻步驟中所留下之空洞、而形成熱絕緣細胞224a，224b。此 步驟的較佳製程係為濺鍍，使得GST材料可延伸進入此細 胞並密封之，如圖所示。製程參數的選擇必須使得濺鍍不 會一次填滿所有細胞，如此領域所週知。 下一步驟定義了記憶元素對210a，210b。第3h圖描述了 圖案化與蝕刻步驟的結果，而將在前一步驟中沈積的GST | 與電極材料層蝕刻，留下相轉換元素220a，220b與上電極 元素222a,222b，其係一般位於下電極216a,216b上的中 央。此圖案化與蝕刻步驟係為習知技術。 最後二步驟則完成了記憶元素的製造。在第3i圖中，覆 蓋氧化物層226b係施加至第3h圖所示的結構上。此材料 應與絕緣層226a所使用的材料相同，且其沈積深度必須足 以完全覆蓋記憶元素210a，210b。在第3j圖中’係繪示最 終步驟的金屬化，其顯示了接觸元素228aJ28b的形成， 並從上電極元素222a,222b開始延伸’同時位元線230係 橫跨記憶元素210a，210b並雙方向延伸至其他記憶元素’ 16 1312563 如此領域所週知。 ，然本發明係已參照較佳實施例來加以 本發明創作並未受限於其詳細描述内 拖古樣式係已於先前描述中所建議，並且1他祛 改樣式將為熟習此項技藝之人士所思及。特； ϊ明：構件:!”與方法，所有具有實質上相同於本 精神㈣。因此’所有此等替換方式及修改揭 洛在本發明於隨附中請專利範圍及其均等物所界 ί太Ί之中、。任何在前文中提及之專利申請案以及印刷 文本，均係列為本案之參考。 刎 【圖式簡單說明】 第：^騎示本發明—實施例之相轉換記憶 面圖，其使用了一空氣細胞隔熱元素。 素的第各顺第1圖㈣相轉換記憶元 第3a-3j圖騎示用以製造第！圖所示之相轉換 素的替代實施例的各步驟示意圖。 、思疋 【主要元件符號說明】 10,10a,10b 記憶元素 12 基板 14,14a,14b 检塞元素 15a,15b 字元線 16,16a,16b 下電極元素 17 共同源極線 17 1312563
18 障礙層 20,20a,20b 相轉換元素 22,22a,22b 上電極元素 24,24a,24b 熱絕緣細胞 26,26a 上絕緣層 26b 覆蓋氧化物層 28a,28b 接觸元素 30 位元線 50 光阻材料 52 1虫刻遮罩 116 氮化鈦層 118 障礙層 120 GST材料 122 電極材料 210a,210b 記憶元素 211a,211b 凹洞 212 基板 214a,214b 栓塞元素 215a,215b 字7G線 216a,216b 下電極元素 217 共同源極線 218a,218b 側壁 220a,220b 相轉換元素 222a,222b 上電極元素 224a,224b 熱絕緣細胞 226,226a 上介電層 226b 覆蓋氧化物層 18 1312563 228a,228b 320 322 230 接觸元素 GST材料 電極材料層 位元線
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Claims (1)
- 中華民國發明專利申請案第095134375號 無劃線之申請專利範圍修正本 中華民國98年2月20日送呈 1312563 t 十、申請專利範園 1. 一種記憶元件，包括： 一第一電極元素； 一相轉換記憶元素，其係接觸至該第一電極元素； “ ；|電填充層，其係圍繞該相轉換記憶元素以及該第一 電極元素，其中該介電填充層與該第一電柽元素之間有一 ，隔，以在該第一電極元素與該介電填充層之間定義一腔 室；且該相轉換記憶元素係密封至該介電填充層，以 # —環繞該第一電極元素之隔熱護罩。 2·如申請專利範圍第1項所述之記憶元件，其中該相轉 換記憶元素係包括由鍺(Ge)、銻（Sb)、及碲(Te)所形成之組 合物。3·如申請專利範圍第1項所述之記憶元件，其中該相轉 換記憶元素係包括由下列群組中之至少兩個材料所形成之 組合物：鍺（Ge)、銻（Sb)、碲(Te)、硒（Se)、銦（In)、鈦(Ti)、 鎵(Ga)、鉍(Bi)、錫（Sn)、銅（Cu)、鈀(pd)、鉛 硫⑻、以及金(Au)。 ( 8) 4.如申請專利範圍第i項所述之記憶元件，其中該相轉 奐圮憶兀素之寬度係約70nm、其厚度係約7〇nm、且該 一電極元素之寬度係約50nm。 項所述之記憶元件，其中該隔熱 5.如申請專利範圍第 5蒦罩之寬度係約1 Onm。 20 1312563 成一種C件之方法，包括下列步驟： 办成一弟一電極元素； 沈積一襯底層於該第一電極元素之上； 形成-介電層其環繞該第—電極元素； 該第—電極元素之额底“露 之^生Γ空润:^及層’以在該第-電極元素與該介電層 沈 ：一相轉換元素以密封該空洞並 極70素，進而界定一環繞該第一電極元素之隔熱護ί。電 7. 如中請專利範圍第6項所述之方法，其中 素係包括由鍺、銻、及碲所形成之組合物。Λ ' 8. 如申請專利範圍第6項所 :係包括由下列群組中之至少兩個二形==元 姻，、鎵，、踢、銅，、錯、銀、 9. 如申請專利範圍第6項所述之 隔熱護 二如::為專:r第6項所述之方法 11. 一種用以製造一記憶元件之太 形成-基板’該基板之最上層係由L介構 21 I· 1312563 成； f除^介電材料之敎部分以在該基板中形成凹洞；形 成具有由襯底材料所形成之侧壁在該些凹洞中； 一電極元素其在該些凹洞中； 乂 電極元素與該介電層 選擇性#刻該襯底層，以在該第一 之間形成一空洞；以及 沈積一相轉換元素以密封該空洞並電接觸至該第一雷 極兀素，進岐義-環繞該第—電極元素之隔熱護罩。元;=鍺專利===其中該相轉換 亓請專利範圍第11項所述之方法，其中該相轉換 物ί3由下列群組中之至少兩個材料所形成之組合 •鍺、銻、碲、硒、銦、鈦、鎵、鉍、錫、銅、鈀、金L、 銀、硫、以及金。 σ -备.心申钿專利範圍第11項所述之方法，其中該相轉換 兀'、之見度係約為70nm、其厚度係約70nm、且該 極兀素之寬度係約50nm。 罩丄5寬度如二\專:'匕園第11項所述之方法，其中該隔熱護 22 1312563 七、指定代表圖： (一) 本案指定代表圖為：第（2m )圖。 (二) 本代表圖之元件符號簡單說明： 10a,10b 記憶元素 12 基板 14a, 14b 栓塞元素 15a,15b 字元線 16a, 16b 下電極元素 17 共同源極線 20a,20b 相轉換元素 22a,22b 上電極元素 24a,24b 熱絕緣細胞 26a 上絕緣層 26b 覆蓋氧化物層 30 位元線 118 障礙層 八、本案若有化學式時，請揭示最能顯示發明特徵的化學式： 無
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-
2006
- 2006-04-21 US US11/408,596 patent/US7479649B2/en active Active
- 2006-09-15 TW TW095134375A patent/TWI312563B/zh active
- 2006-10-24 CN CNB2006101320708A patent/CN100502080C/zh active Active
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| US7687307B2 (en) | 2010-03-30 |
| US20070158862A1 (en) | 2007-07-12 |
| CN1971960A (zh) | 2007-05-30 |
| TW200721409A (en) | 2007-06-01 |
| US7479649B2 (en) | 2009-01-20 |
| CN100502080C (zh) | 2009-06-17 |
| US20090098678A1 (en) | 2009-04-16 |
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