TWI303861B - Method of creating high-quality relaxed sige-on-insulator for strained si cmos applications - Google Patents
Method of creating high-quality relaxed sige-on-insulator for strained si cmos applications Download PDFInfo
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- TWI303861B TWI303861B TW92101466A TW92101466A TWI303861B TW I303861 B TWI303861 B TW I303861B TW 92101466 A TW92101466 A TW 92101466A TW 92101466 A TW92101466 A TW 92101466A TW I303861 B TWI303861 B TW I303861B
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- germanium
- substantially relaxed
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- 238000000034 method Methods 0.000 title claims description 66
- 239000012212 insulator Substances 0.000 title description 3
- 239000000758 substrate Substances 0.000 claims description 73
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 60
- 229910052732 germanium Inorganic materials 0.000 claims description 57
- 239000000463 material Substances 0.000 claims description 45
- 230000004888 barrier function Effects 0.000 claims description 40
- 229910052707 ruthenium Inorganic materials 0.000 claims description 29
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 28
- 239000013078 crystal Substances 0.000 claims description 26
- 229910052715 tantalum Inorganic materials 0.000 claims description 25
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 25
- 238000010438 heat treatment Methods 0.000 claims description 22
- 239000007789 gas Substances 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 11
- 230000007547 defect Effects 0.000 claims description 10
- 230000008021 deposition Effects 0.000 claims description 10
- 238000009792 diffusion process Methods 0.000 claims description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 8
- 239000001301 oxygen Substances 0.000 claims description 8
- 229910052760 oxygen Inorganic materials 0.000 claims description 8
- 239000000126 substance Substances 0.000 claims description 8
- 150000004767 nitrides Chemical class 0.000 claims description 4
- 238000005259 measurement Methods 0.000 claims description 3
- 230000001590 oxidative effect Effects 0.000 claims description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 2
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- 239000011261 inert gas Substances 0.000 claims description 2
- 239000000203 mixture Substances 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims 1
- 238000007865 diluting Methods 0.000 claims 1
- 238000001451 molecular beam epitaxy Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 176
- 239000004065 semiconductor Substances 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 6
- 239000004575 stone Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 230000002040 relaxant effect Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 229910003811 SiGeC Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 229910052758 niobium Inorganic materials 0.000 description 2
- 239000010955 niobium Substances 0.000 description 2
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 2
- 238000000038 ultrahigh vacuum chemical vapour deposition Methods 0.000 description 2
- 241000167854 Bourreria succulenta Species 0.000 description 1
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 206010036790 Productive cough Diseases 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910001362 Ta alloys Inorganic materials 0.000 description 1
- 241000209140 Triticum Species 0.000 description 1
- 235000021307 Triticum Nutrition 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000000675 anti-caries Effects 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 229910001570 bauxite Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 235000019693 cherries Nutrition 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000008240 homogeneous mixture Substances 0.000 description 1
- -1 i.e. Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910052743 krypton Inorganic materials 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000001393 microlithography Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 210000003802 sputum Anatomy 0.000 description 1
- 208000024794 sputum Diseases 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical group [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 1
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
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- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66893—Unipolar field-effect transistors with a PN junction gate, i.e. JFET
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Description
1303861 Ο) 玖、發明:説胡 (發明說明應敘明:發明所屬之技術領域、先前技術、内容、實施方式及圖式簡單說明) 技術領域 本發明係關於一種用以製造一半導體基板材料之方 法,更明確地說,即用以製造高品質實質上鬆弛的薄絕緣 層上矽鍺基板材料。本發明之鬆弛絕緣層上矽鍺基板材料 可用作晶格失配樣板,以藉由隨後的矽磊晶生長,在其上 形成一應變矽層。該應變矽層具有高度的載體靈活性,用 於兩性能互補式金屬氧化物半導體(complementary metal oxide semiconductor ; CMOS)應用。本發明也關於絕緣層上矽 鍺基板材料及包括至少基板材料的結構。 先前技術 在半導體產業中,最近有使用應變矽基異質結構獲得 C Μ Ο S應用之高靈活性結構的高潮。傳統上,實施此方法 之先前技術為在厚鬆弛矽鍺緩衝層(依序自約1到約5個微 米)上生長應變矽層。 雖然先前技術生產的異質結構也報告有高通道電子靈 活性,但是,使用厚矽鍺緩衝層有若干顯著缺點。第一, 厚石夕錯緩衝層一般不容易與現有矽基CMOS技術整合。第 一’缺 也度’包括穿線錯位(threading dislocations ; TDS) 和不相稱錯位皆約為i 〇 5到約1 〇 8個缺陷/釐米2,這對於實 際超大規模積體電路(very large scale丨加^加丨⑽;VSLI)應用 而言仍然太高了。第三,先前技術結構之性質排除了矽鍺 緩衝層的選擇性生長’使得利用含應變矽、非應變矽和矽 鍺基板材料的裝置的電路難以整合,在某些情況下,幾乎 (2) 1303861 不可能整合。 為在碎基板上生產麥 &他矽鍺基板材料,先前技術之方法 一般生長均勻、分級 &梯形的矽鍺層,其厚度超過暫穩 關鍵厚度(即超過就形士 w ^成錯位釋放壓力的厚度),而且形成
穿過矽鍺緩衝層的不知^ A 相%錯位及穿線錯位。已經試用了各 種缓衝層結構來增加,士 m^ %構中不相稱錯位區段的長度,並藉 此減少TDS密度。 如Ek等人的美國專利安# 〜柔唬5,461,243和5,759,898之描述,為 另一種先前技術方法传掉 1糸&供一種具有應變和無缺陷半導 體層之結構’其中有新 ^應力釋放機制運作,藉此鬆弛矽鍺 緩衝層而不在矽鍺層 曰T產生TD。 在Ek等人的專利中护
矿田述的傳統方法或替代方法皆未提 供解決方法,其能夠警所L 、貝上滿足裝置應用的材料要求,即 足夠低的TD密度,〇 ° 的或沒有不相稱錯位密度,並 控制形成TD缺陷的區 „ ^ ^ ^ ^ ^ , 又。因此,需要不斷開發製造鬆弛 絕緣層上矽鍺基板枒Μ μ ^ ^ ^ ^ ^ 枓的新型及改良方法,其對缺陷的產 生具有熱力穩定性。 發明内容 本發明之目標之一係提供— 種用以製造高品質實質上 鬆弛薄絕緣層上矽鍺基板材料之方法。 、、、 本發明之另一個目標係提供一 、 種用以製造高品質鬆弛 薄絕緣層上石夕鍺基板材料之方法兮 ^ °亥專材料對不相稱及穿 線錯位之類缺陷的產生具有熱力穩定性。 本發明之進一步目標係提供一 7里用以製造與CMOS處理 1303861 步驟相容的高品質實質上鬆弛薄絕緣層上矽鍺基板材料 之方法。 本發明之更進一步目標係提供一種用以製造高品質實 質上鬆弛薄絕緣層上矽鍺基板材料之方法,該等材料可用 作製造應變矽層的晶格失配樣板,即基板。 本發明之更進一步的目標係提供應變矽/實質上鬆弛絕 緣層上矽鍺結構,其具有高度載體靈活性,並可用於高性 能的CMOS應用。 本發明之這些目標和優勢係利用一種方法獲得,其包 括,第一,在第一單晶矽層的表面上形成矽鍺或純鍺層, 該第一單晶矽層係位於防止鍺擴散之阻障層的表面;之 後,實施加熱步驟,加熱溫度應使鍺在第一單晶矽層和矽 鍺或純鍺層之間相互擴散,藉此在阻障層上形成實質上鬆 弛單晶矽鍺層。應注意,實質上鬆弛單晶層係由矽鍺或純 鍺層與第一單晶矽層的同質混合物構成。 依照本發明的步驟,可在實質上鬆弛單晶矽鍺層上磊晶 生長應變矽層,以形成應變矽/鬆弛矽鍺,其含有異質結 構,可用於各種高性能的CMOS應用。 在本發明的某些具體實施例中,第一單晶矽和阻障層係 絕緣層上石夕(silicon-on-insulator ; SOI)之組成部分。在其他 具體實施例中,阻障層形成於半導體基板的表面上,之後 第一單晶矽層形成於阻障層的表面。後者的基板材料係非 SOI基板。 本發明也考慮使用未圖樣化(即阻障層還是連續的)或 (4) 1303861
已圖樣化(即 的阻障層。 在本發明的另一個具體實施例中,在加熱結構前先在矽 鍺或純鍺層上形成一矽蓋層。本發明之具體實施例提供熱 力穩定(以防止產生缺陷而言)實質上鬆弛薄絕緣層上矽 鍺基板材#。應注意,與高品質、實質上鬆弛絕緣層上矽 鍺基板材料相關之溥」一詞,表示矽鍺層的厚度約為2 〇⑽ 奈来或以下’約10到200奈米厚更佳。 本發明另一方面係關於利用該處理步驟製造的絕緣層 上矽鍺基板材料。明確地說,所發明之基板材料包括含矽 土板s夕基板表面上防止鍺擴散的絕緣區段和一絕緣 區段表面之實質上鬆弛矽鍺層,其中該實質上鬆弛石夕鍺層 的厚度約為2000奈米或以下。 本發明更進一步之方而及日日^ 面係關於包括至少該基板材料的 -種異質結構。明確地說,本 板、一含矽美抬本品L /、貝、、、口構包括含矽基 板3夕基板表面上防止錯擴散的 段表面之實質上鬆弛矽鍺層,其中該者、併匚飯和—絕緣區 厚度約為2000奈米或以、°亥貫質上鬆弛矽鍺層的 丨,且在實皙 成一應變矽層。 、、鬆弛矽鍺層表面形 本發明之其他方面係關於超日曰处 結構之樣板,其至少包括 °…構及其它晶袼失配 料。 本發明之絕緣層切錯基板材 實施方式 本發明提供-種用以製造高品質、實w # 、、貝上鬆弛薄絕緣層 -10- 1303861
上矽鍺基板材料之方法,該等材料可用作晶格失配樣板, 以在其上生長磊晶矽,現將參照本專利申請之附圖予以更 詳細之描述。應注意,附圖和/或對應元件皆以相似的參 考數字表示。 首先參照圖1 A和2 A,其顯示可用於本發明之初始基板 材料。明確地說,圖1 A和2 A示範的初始基板材料各包括 含石夕半導體基板10、含石夕半導體基板1〇表面上防止鍺擴散 的阻障層12(以下簡稱「阻障層」)及第一單晶矽層I*,其 在阻障層表面上具有小於約1x1 〇8缺陷/釐米2的不相稱和 TD密度。圖中描繪的兩種初始基板之差異為,在圖ία中, 阻障層連續貫穿整個結構,而在圖2 A中,阻障層係作為 離散和隔離區段或隔離島,由半導體材料即層1 〇和1 4包 圍。因此,應注意,圖1 A顯示的初始結構包括未圖樣化 的阻障層,而圖2 A的初始結構包括圖樣化的阻障層。 儘管如此,不論阻障層是否圖樣化,初始結構可以為傳 統絕緣層上石夕材料(silicon-on-insulator ; S 01)基板材料,其 中區段1 2為埋入氧化物區段,其使第一單晶矽層1 4與含矽 基板半導體基板1 0電性絕緣。本文所用的「含矽」一詞係 表示至少包含矽的半導體基板。說明性範例包括但不限 於:Si、SiGe、SiC、SiGeC、Si/Si、Si/SiC、Si/SiGeC, 及預製的絕緣層上矽,其可包括其上任何數量的埋入氧化 物(連續的、不連續的或連續和不連續的混合)區段。 可使用熟習技術人士皆知的傳統氧離子植入(separation by ion implantation of oxygen ; SIMOX)程序及共同轉讓的美國
1303861 ⑹ 專利申請序號中描述的各種SIM OX程序製造SOI基板,這 些專利序號為2001年5月21日申請的〇9/861,593、200 1年5 月21曰申請的09/86 1,594、 200 1年5月21曰申請的 09/861,590、2001年 5 月 21 日申請的 09/861,596、2 00 1 年 6 月 1 9 曰申請的〇9/884,670,以及Sadana等人的美國專利案號 5,930,634,各專利之完整内容以引述方法並入本文。應注 意,‘590申請中揭示的程序可用於本文,製造圖2A顯示 的圖樣化基板。或者,可使用其他傳統程序,例如熱黏接 和切割程序生產SOI基板材料。 除SOI基板外,圖1A和2A顯示的初始基板可以是非SOI 基板,其使用傳統沈積程序及微影蝕刻(製造一圖樣化基 板時使用)製造。明確地說,當使用非SOI基板時,可藉由 傳統沈積或熱生長程序在含矽基板表面上沈積鍺擴散阻 障層而形成初始結構、或使用傳統微影蝕刻圖樣化阻障層
形成初始結構;之後,使用傳統沈積程序在阻障層表面形 成單晶碎層,該傳統沈積程序包括化學氣體沈積(chemical vapor deposition ; CVD)、電漿增強CVD、喷濺、蒸鍍、化學 溶劑沈積或磊晶矽生長。 圖1 A和2 A顯示的初始結構的阻障層1 2包括高度防止鍺 擴散的任何絕緣材料。這些絕緣和防鍺擴散材料包括但不 限於:晶體或非晶體氧化物或氮化物。 初始結構各層的厚度可根據製造時使用的程序不同而 變化。但是,一般而言,單晶矽層1 4的厚度從約1到約2 00 0 奈米,厚度從約2 0到約2 0 0奈米更佳。如果係阻障層1 2 (即 -12- Ϊ303861 ⑺ 防鍺擴散層),該屉沾广 曰的厚度可能從約1到約1〇〇〇奈 從約20到200奈米争杜 τ卞厗度 。對本發明而言,含矽基板層,即 層10的厚度不重要 。應注意,該提供的厚度係示範性 , 絕非限制本發明之範圍 ^ 圖1 B和2 B解說了 夕鍺或純鍺層1 6在第一單晶矽;】4矣 面上形成後的結構。「 9 衣 石夕錯層」術語包括發錯合金,直句 括高達99.99的鍺原;^ ^ 、卞百分比,而純鍺包括含100的鍺原子 百分比的層。若佶田 、 秒錯層’其錯含量從約0 · 1到約9 9 9
原子百分比較佳,咎 轉原子百分比從約1 0到約3 5更佳。 根據本啦明,矽鍺或鍺層係使用任何傳統磊晶生長方法 在第單曰曰夕層1 4的表面上形成,熟習技術人士皆知該傳 統方法,其能夠(i)生長熱力穩定(低於關鍵厚度)矽鍺或純 鍺層’或(U)生長暫穩和沒有缺陷、即不相稱和錯位的 石夕鍺或純鍺層。能夠滿足該條件(i)或(ii)的這些磊晶生長
過程的解釋性示範包括但不限於:低壓化學氣體沈積 (low-pressure chemical vapor deposition ; LPCVD)、超高真空化 學氣體沈積(ultra-high vacuum chemical vapor deposition ; UHVCVD)、大氣壓力化學氣體沈積(atmospheric pressure chemical vapor deposition ; APCVD)、分子波束(molecular beam ; MB E)磊晶和電漿增強化學氣體沈積(plasma-enhanced chemical vapor deposition ; PECVD) 〇 於本發明此點形成之矽鍺或純鍺層的厚度可以變化’但 是,一般而言,層1 6的厚度範圍約為1 〇到5 0 0奈米,厚度 約為2 0到2 0 0奈米更佳 -13 -
1303861 ⑻ 在圖3 A到3B的本發明替代性具體實施例中,在實施本 發明之加熱步驟前,在矽鍺或純鍺層1 6的表面上形成選擇 性蓋層1 8。本發明採用的選擇性蓋層包括任何矽材料,包 括但不限於:蠢晶石夕(epitaxial silicon ; epi_ Si)、無定形石夕 (amorphous silicon ; a: Si)、單晶或多晶石夕或其結合,包括多 層矽。在較佳具體實施例中,蓋層由磊晶矽組成。應注意, 層16和18可以或不可以在同一反應室中形成。 若有選擇性蓋層18,其厚度約為1到100奈米,厚度約為 1到3 0奈米更佳。選擇性蓋層係使用任何眾所周知的沈積 程序形成’包括該蠢晶生長程序。 在本發明的一個具體實施例中,在單晶矽層表面上形成 厚約1到2000奈米的純鍺或矽鍺(15到20鍺原子百分比)層 較佳,此後,在鍺或矽鍺層上形成厚度約為1到1 00奈米的 石夕蓋層。 在初始結構表面上形成純錯或碎錯層(或選擇性蓋層) 後,加熱圖IB、2B、3A或3B顯示的結構,即,在使鍺相 互擴散至第一單晶矽層1 4、矽鍺或純鍺層1 6和選擇性蓋層 (如果有的話)的溫度退火,選擇性蓋層藉此在該阻障層^ 面上形成實質上鬆弛單晶矽鍺層20。應注意,在加熱步驟 中,層2 0表面上形成氧化物層2 2。在加熱步驟後,一般但 並不總是使用傳統濕蝕刻程序從結構中移除該氧化物 層,其中蝕刻程序使用化學蝕刻劑,如HF,與矽鍺相比, 其移除氧化物時具有高度選擇性。 應注意,移除氧化物層後,層2 0的表面上可形成第二單 -14- 1303861 —— (9) 晶矽層,而本發明之該處理步驟可重複任何次數,以形成 多層鬆弛石夕鍺基板材料。 . 本發明加熱步驟後形成的氧化物層具有不同厚度,範圍 ’_ 從約10到1 000奈求,厚度約為20到5 00奈米更佳。 明確地說,本發明之加熱步驟係退火步驟,在溫度約為 9 0 0 °到1 3 5 0 °時實施,溫度約為1 2 0 0。C到1 3 3 5 ° C更佳。而 且,本發明的加熱步驟係在氧化環境下進行,包括至少一 種含氧氣體,如〇2、NO、N20、臭氧、空氣和其他類似 含氧氣體。含氧氣體可相互混合(如〇2和NO的混合氣體),® 或用惰性氣體稀釋,如He、Ar、N2、Xe、Kr或Ne。 加熱步驟可進行不同時間,一般約從1 〇到1 8 0 0分鐘,約 從6 0到6 0 0分鐘更佳。加熱步驟可按單一目標溫度進行, 或採用使用各種斜坡率和浸泡時間的各種斜坡或浸泡周 期。 加熱步驟係在氧化環境下實施,以獲得表面氧化物層, 即層22,作為鍺原子擴散的阻障層。因此,一旦結構表面 形成氧化物層,鍺就截留於阻障層1 2和氧化物層22之間。· 隨著表面氧化物層變厚,鍺更加均勻地分佈於層1 4、1 6 和選擇性層1 8之間,但仍被連續有效地阻止其侵蝕氧化物 層。因此,當各層(現已均勻化)在加熱步驟中變薄時,相 關的鍺部分增加:當加熱步驟在稀釋含氧氣體中約1 200° 到1 3 2 0 ° C實施時,即可實現本發明之有效熱混合。 本文也包括使用基於矽鍺層熔點的訂制加熱周期。在這 種情況下,溫度調整到低於矽鍺層的熔點以下。 -15 - 1303861 纖綱纖: 應注意,若氧化發生得太快,鍺就無法從氧化表面/矽 鍺結合面迅速擴散,或者穿過氧化物層(損失掉)或者使結· 合面的鍺濃度太高,達到合金的熔點。 - 本發明加熱步驟的作用係(1)使鍺原子更迅速地擴散, 藉此保持退火過程的均勻分佈;(2)使(「初始」)應變層 結構受熱,促成平衡配置。在實施加熱步驟後,該結構即 包括了一均勻和實質上鬆弛矽鍺合金層20,夾在阻障層12 和表面氧化物層22之間。 根據本發明’鬆弛石夕鍺層2 0的厚度範圍約為2 〇 〇 〇奈米或鲁 以下’厚度約為10到100奈米更佳。應注意,依據本發明 形成之鬆弛矽鍺層薄於以前的矽鍺緩衝層,其缺陷密度 (包括不相稱和TD)小於約1〇8缺陷/麓米2。 本發明形成之鬆弛矽鍺層的最終鍺含量約為〇·丨到99.9 原子百分比,鍺原子百分比約為1〇到35更佳。鬆弛矽鍺層 2 2的另特徵係其測里日日袼鬆弛度約為1到i 〇 〇 %,測量晶 格鬆弛度約為5 0到8 0 %更佳。 如上所述,在本發明之此步驟可剝除表面氧化物層22, φ 以提供絕緣層上矽鍺基板材料,如圖丨D或2D所示(應注 意,基板材料不包括蓋層,因為,該層在形成鬆弛矽鍺層 時已經用掉)。 圖4 A到B顯不的結構係分別在圖1 〇和2D之矽鍺層表面 形成石夕層24後所得。石夕層24係使用眾所周知的傳統磊晶沈 積程序形成。蠢晶矽層2 4的厚度可以變化,但是,一般而 言,其厚度約為1到1 0 0奈来,厚度從1到3 〇奈米更佳。 -16-
1303861 〇i) 在某些情況下,利用該處理步驟,可在鬆弛矽鍺層2 0 表面形成額外的矽鍺層,之後可形成磊晶矽層24。因為層 20與磊晶層24相比具有大平面晶格參數,磊晶層24將以拉 伸方式應變。 如上所述,本發明也包括超晶格結構及晶格失配結構, 其至少包括本發明之絕緣層上矽鍺基板材料。若為超晶格 結構,該等結構將至少包括本發明之實質上鬆弛絕緣層上 矽鍺基板材料,及在基板材料的實質上鬆弛矽鍺層表面上 形成的替代性碎層和碎鍺層。 若為晶格失配結構,則本發明之絕緣層上矽鍺基板材料 的實質上鬆弛矽鍺層表面上將形成GaAs、GaP或其他類似 化合物。 雖然已經參考較佳的具體實施例對本發明進行圖形表 示及說明,不過熟習本技術的人士將會暸解在不脫離本發 明的精神與範圍下有可能對前述及其它部分進行形式及 細部的改變。因此,本發明的目的並不限於所說明及圖示 的確切形式及細節,而應以隨附申請專利範圍的範疇為 主。 圖式簡單說明 圖1 A到1 D係繪圖作品(斷面圖),顯示本發明製造一高品 質、實質上鬆弛薄絕緣層上矽鍺基板材料所使用的基本 處理步驟,其中初始基板包括未圖樣化的鍺擴散位障區 段。 圖2 A到D係繪圖作品(斷面圖),顯示本發明之替代性具 1303861 - (12) 體實施例在製造一高品質、實質上鬆弛薄絕緣層上矽鍺基 板材料時所使用的基本處理步驟,其中初始基板包括圖樣 化的鍺擴散位障區段。 圖3 A到3 B係繪圖作品(斷面圖),顯示本發明之替代性具 體實施例,其矽蓋層形成於鍺或矽鍺層表面上,而後者形 成於未圖樣化(3A)或圖樣化(3 B)的基板上。 圖4 A到4 B係繪圖作品(斷面圖),分別顯示在圖1 D和2 D 的高品質、實質上鬆弛薄絕緣層上矽鍺基板材料上形成應 變石夕層。 圖式代表符號說明 10 含 矽 半 導 體 基板 12 阻 障 層 14 第 一 單 晶 矽 層 16 矽 鍺 或 純 鍺 層 20 單 晶 矽 鍺 層 22 氧 化 物 層 18 選 擇 性 蓋 層 24 矽 層 -18-
Claims (1)
1303861 拾、申請專利範圍 1. 一種用以製造高品質實質上鬆弛薄絕緣層上矽鍺基板 材料之方法,其步驟包括: (a) 在一第一單晶矽層表面上形成一矽鍺或純鍺層,該第 一單晶矽層係位於一用以防止鍺擴散之阻障層表面 上;及 (b) 加熱該層,溫度應使鍺在該第一單晶矽層和該矽鍺或 純矽層之間相互擴散,藉此在該阻障層表面上形成實 質上鬆弛單晶矽鍺層。 2. 如申請專利範圍第1項之方法,其中該第一單晶矽層和 該阻障層皆係絕緣層上矽(S ΟI)基板之組成部分。 3. 如申請專利範圍第1項之方法,其中該第一單晶矽層和 該阻障層皆係非SOI矽基板之組成部分。 4. 如申請專利範圍第3項之方法,其中該第一單晶矽層之 厚度範圍約為1到2 0 0 0奈米。 5. 如申請專利範圍第1項之方法,其中該阻障層係圖樣化 阻障層。 6. 如申請專利範圍第1項之方法,其中該阻障層係未圖樣 化阻障層。 7. 如申請專利範圍第1項之方法,其中該阻障層包括晶體 或非晶體氧化物,或晶體或非晶體氮化物。 8. 如申請專利範圍第1項之方法,其中該阻障層係圖樣化 或未圖樣化的埋入氧化物區段。 9. 如申請專利範圍第1項之方法,其中該阻障層之厚度係 介於約1至1 0 0 0奈米之範圍。 1303861 10. 如申請專利範圍第1項之方法,其中一矽鍺層包括最高 99.99鍺原子百分比,用於步驟(a)。 11. 如申請專利範圍第10項之方法,其中該矽鍺層包括約10 到3 5鍺原子百分比。 12. 如申請專利範圍第1項之方法,其中該矽鍺或純鍺層係 由蠢晶生長程序形成^該程序係從以下程序中選出:低 壓化學氣體沈積、大氣壓力化學氣體沈積、超高真空化 學氣體沈積、分子束磊晶生長及電漿增強化學氣體沈 積。 13. 如申請專利範圍第1項之方法,其中一純鍺層係用於步 驟(a)。 14. 如申請專利範圍第1項之方法,進一步包括在實施步驟 (b)之前在該矽鍺或純鍺層表面上形成矽蓋層。 15. 如申請專利範圍第1 4項之方法,其中該矽蓋層包括磊晶 矽、無定形矽、單晶或多晶矽、或其任何組合及其多層 結構。 16. 如申請專利範圍第1 5項之方法,其中該矽蓋層包括一磊 晶碎。 17. 如申請專利範圍第14項之方法,其中該矽蓋層之厚度係 介於約1至1 0 0奈米。 18. 如申請專利範圍第1項之方法,其中一表面氧化物層係 形成於該加熱步驟。 19. 如申請專利範圍第1 8項之方法,其中該表面氧化物層之 厚度係介於1 0到1 0 0 0奈米。 1303861
20.如申請專利範圍第1 8項之方法,進一步包括利用濕化學 ϋ刻程序移除該表面氧化物層。 21·如申請專利範圍第1項之方法,其中步驟(a)到(b)可重複 任何次數。 22·如申請專利範圍第1項之方法,其中該加熱步驟係在氧 化環境中實施,該環境包括至少一種含氧氣體。 23. 如申請專利範圍第22項之方法,其中該至少一含氧氣體 包括02、NO、N20、臭氧、空氣或其混合氣體。 24. 如申請專利範圍第22項之方法,進一步包括惰性氣體, 該惰性氣體係用於稀釋該至少一含氧氣體。 25. 如申請專利範圍第1項之方法,其中該加熱步驟的實施 溫度係介於9 0 0 °到1 3 5 0 ° C。 26. 如申請專利範圍第2 5項之方法,其中該加熱步驟的實施 溫度係介於1 2 0 0 ° C到1 3 3 5 ° C。 27. 如申請專利範圍第1項之方法,其中該實質上鬆弛矽鍺 層的厚度係小於約2 0 0 0奈米或以下。 28. 如申請專利範圍第27項之方法,其中該實質上鬆弛矽鍺 層之厚度係介於約10至100奈米。 29. 如申請專利範圍第1項之方法,其中該實質上鬆弛矽鍺 層的缺陷密度係小於1 08缺陷/釐米2。 30. 如申請專利範圍第1項之方法,其中該實質上鬆弛矽鍺 層之測量晶格鬆弛度係介於約1至1 0 0 %。 31. 如申請專利範圍第30項之方法,其中該實質上鬆弛石夕鍺 層之測量晶格鬆弛度係介於約5 0至8 0 %。
1303861 32. 如申請專利範圍第1項之方法,其進一步包括在該實質 上鬆弛^夕錯層表面上生長一額外碎錯層。 33. 如申請專利範圍第32項之方法,其進一步包括在該額外 矽鍺層表面上形成一應變矽層。 34. 如申請專利範圍第1項之方法,其進一步包括在該實質 上鬆弛矽鍺層表面上形成一應變矽層。 35. —種基板材料,其包括: 一含矽基板; 一在該含矽基板表面上之用以防止鍺擴散之絕緣區 段;及 一在該絕緣區段表面上之實質上鬆弛矽鍺層,其中該 實質上鬆弛矽鍺層厚度約為2000奈米或以下。 36. 如申請專利範圍第3 5項之基板材料,其中該絕緣區段係 圖樣化的。 37. 如申請專利範圍第3 5項之基板材料,其中該絕緣區段係 未圖樣化的。 38. 如申請專利範圍第3 5項之基板材料,其中該絕緣區段包 括晶體或非晶體氧化物,或晶體或非晶體氮化物。 39. 如申請專利範圍第3 5項之基板材料,其中該絕緣區段係 圖樣化或未圖樣化的埋入氧化物區段。 40. 如申請專利範圍第3 5項之基板材料,其中該絕緣區段之 厚度係介於約1至1 0 0 0奈米。 41. 如申請專利範圍第3 5項之基板材料,其中該實質上鬆弛 矽鍺層之厚度係介於約1 0至1 〇 0奈米。
1303861 42. 如申請專利範圍第36項之基板材料,其中該實質上鬆弛 矽鍺層之測量晶格鬆弛度係介於約1至1 〇 0 %。 43. 如申請專利範圍第42項之基板材料,其中該實質上鬆弛 矽鍺層之測量晶格鬆弛度係介於約5 0至8 0 %。 44. 一種異質結構,其包括: 一含碎基板; 一在該含矽基板表面上之用以防止鍺擴散之絕緣區 段; 一在該絕緣區段表面上之實質上鬆弛矽鍺層,其中該 實質上鬆弛矽鍺層厚度約為2000奈米或以下; 及一在該實質上鬆弛矽鍺層表面上形成之應變矽層。 45. 如申請專利範圍第44項之異質結構,其中該絕緣區段係 圖樣化的。 46. 如申請專利範圍第44項之異質結構,其中該絕緣區段係 未圖樣化的。 47. 如申請專利範圍第44項之異質結構,其中該絕緣區段包 括晶體或非晶體氧化物、或晶體或非晶體氮化物。 48. 如申請專利範圍第44項之異質結構,其中該絕緣區段阻 障層係圖樣化或未圖樣化的埋入氧化物區段。 49. 如申請專利範圍第44項之異質結構,其中該絕緣區段之 厚度係介於約20至200奈米。 50. 如申請專利範圍第44項之異質結構,其中該實質上鬆弛 矽鍺層之厚度係介於約1 0至1 0 0奈米。 51.如申請專利範圍第44項之異質結構,其中該實質上鬆弛
1303861 矽鍺層之測量晶格鬆弛度係介於約1至1 ο ο %。 52. 如申請專利範圍第5 1項之異質結構,其中該實質上鬆弛 矽鍺層之測量晶格鬆弛度係介於約5 0至8 0 %。 53. 如申請專利範圍第44項之異質結構,其中該應變矽層之 厚度係介於約1至1 〇 〇奈米。 54. 如申請專利範圍第44項之異質結構,其中該應變矽層包 括一蠢晶秒層。 55. 如申請專利範圍第44項之異質結構,其中鬆弛矽鍺和應 變矽選擇層皆形成於該應變矽層表面上。 56. 如申請專利範圍第44項之異質結構,其中該應變矽層係 由晶格失配化合物替代,該化合物係從GaAs和GaP中選
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