TW478301B - Thin integral resistor/capacitor/inductor package, method of manufacture - Google Patents

Thin integral resistor/capacitor/inductor package, method of manufacture Download PDF

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TW478301B
TW478301B TW089119575A TW89119575A TW478301B TW 478301 B TW478301 B TW 478301B TW 089119575 A TW089119575 A TW 089119575A TW 89119575 A TW89119575 A TW 89119575A TW 478301 B TW478301 B TW 478301B
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layer
resistive
substance
circuitized
foil
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TW089119575A
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Richard W Carpenter
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Morton Int Inc
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0302—Properties and characteristics in general
    • H05K2201/0317—Thin film conductor layer; Thin film passive component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672—Superposed layout, i.e. in different planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0338—Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1333—Deposition techniques, e.g. coating
    • H05K2203/1338—Chemical vapour deposition
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0064—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a polymeric substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Manufacturing Cores, Coils, And Magnets (AREA)
  • Coils Or Transformers For Communication (AREA)

Description

A7 五、發明說明（1 ) 本發明係關於一種能夠提 路及選擇性電感器之電子電路及m、電容器、相連電 [發明背景] 、σ構體之製造方法。 印刷電路微小化之熱潮正 部分印刷電路板中，電路跡線係以、習：方= 以光阻技術製成。諸如電容器盘電阻器笼 特別是 離構件之方式來提供，並焊 、以刀^ 工式或機械人式。該等構=印刷電路，其方法可為人1 "1… 印刷電路板上會佔據真實的 1 ’故要裝设於電路板上可能甚為困難或甚為昂責。 因此，藉由電路形成步驟使諸如電容器及/或電阻 構件隨電路跡線-起提供之結構體已有若干提案。 此種結構體之先前技術例已揭示於美國專利第 5079069^5155655.5161086.5261153.5347258^5466892 號案中’其中各案之揭示内容均以參考文件方式併入本說 :書中’其典型構造係以複數個此種結構體與介電物質層 疊在一起以形成多層印刷電路板。 經濟部智慧財產局員工消費合作社印製 本發明係關於-種能夠提供電容器、電阻器及包含電 路跡線與選擇性電感器之薄型電路層疊構造的製造方法， 及由該方法製造之薄型電路層疊構造。 [發明概述] 依照本發明之製造方法，係提供層疊有嵌入式介電物 質層之第1導電金屬箔片，及一側塗佈有電阻物質層之第 2導電金屬箔片，該第2箔片上之電阻物質層所具備之厚 度係小於上述第1金屬箔片上之鼓入式介電物質層的厚 91652 本紐尺度適用中闕家標準（CNS)A4規X 297公釐「 478301 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明（2 ) 度。將電阻物質層電路化以形成電阻物質式分離接線 (cHscrete patches)。然後將兩種結構體層疊在一起使電阻 物質層喪入於嵌入式介雷物暂思 χ ¥物質[但I電阻物質接線不接 觸第1落片。此時，第1或帛2 示1及第2泊片均予以電路化，而得 以提供互相連接之電路跡線與諸如電感器等選擇性電氣組 件。為支持該結構體，已電路化之洛片係嵌入於諸如以 ” prepreg”知名之玻璃填充式環氧樹脂等介電物質中，藉該 介電物質在隨後之製程中支持該結構體。於談結構體以此 方式予以支持後，另一金屬箔片亦予電路化，而此側面亦 可嵌入介電物質中。多數個此種結構體可予以層疊形成一 多層式印刷電路板，而多數層之間可經由孔洞以習知方法 相互電氣連接。 [圖式之簡單說明] 第1圖為第1金屬箔片之剖視圖，其上面層疊有篏入 >式介電物質之薄層。 第2圖為第2金屬箔片之剖視圖，其上沈積有電阻物 質之薄層。 第3圖為第2圖所示結構體之剖視圖，其中之電阻物 質業已電路化以形成分離式電阻接線。 第4圖為第1圖之結構體已層疊於第3圖之結構體之 剖視圖，其中之電阻物質接線已嵌入於嵌入式介電物質層 内。 第5圖為/第4圖之結構體之剖視圖，其中第2金屬箔 片業已電路化。 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 91652 11 in------------線 (請先閱讀背面之注意事項再填寫本頁) 478301 經濟部智慧財產局員工消費合作社印製 五、發明說明（3 第6圖為已電路化之苐2笔 ’白片層業已嵌入介電物質層 中且第1落片層亦已隨之電路化之結構趙之剖視圖 [元件符號] 胃 10、13 11 14 15a 21 13a、 16、 19 第1箔片（層） 第2箔片 電阻接線
20 、结構體 介電物質層 電阻物質層 連接跡線 電感線圈 電容器之導電板(電容器板)2 2 [較佳實施例之詳細說明] 第1圖所示之結構體10包括層疊有薄層介電物質12 之箔片層11。第2圖所示之結構體13包括上面沈積有薄 層電阻物質15之箔片層14。該等箔片層11、14可選自各 種金及合金’但以銅箔最常用。一般而言，該等箔片n、 14之厚度係介於約3至5〇微米間，介電物質層12之厚度 亦介於約3至5 0微米間，而電阻物質i 5之厚度則介於約 0.1至0.5微米，甚至只能更薄，通常其厚度係少於介電物 質層約2.9至49.5微米之間。 目前用作介電物質層12之較佳材料為以”Dynavin，，商 標販售之環氧樹脂。 本製造方法實施例之第一步驟為使電阻物質層1 5電 路化，俾在第二箔片14上形成分離型電阻接線（patch) 15a，而形成第3圖所示之結構體13a(為便於簡化圖式， 該電阻接線1 5a僅顯示一個）。電阻物質層1 5之電路化係 與習知導體電路化以形成印刷電路跡線之方法非常類似。 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 3 91652 478301 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（4 ) 電阻物質層1 5上覆蓋一光阻劑（此處為負活性光阻劑），令 該光阻劑介由跡線圖案曝露於光化學照射中，未曝光部分 之光阻劑會顯影出來，曝光部分之電阻物質層1 5則被蝕刻 去除。 美國專利申請案第09/198954號揭示一種形成該層15 之較佳電阻物質，亦即包含相當少量之介電物質（例如矽） 之白金’其具有實質的電阻特性，而且按照介電物質量之 多募，通常其範圍約在〇 5wt〇/〇及5.〇wt%，而顯示出該電 阻特性。美國專利第5652〇21案號所述之燃燒式化學蒸鍍 法（CCVD)可以很方便地沈積出摻雜有矽之白金薄層。利用 CC VD法沈積之pt/Si〇2具有實質的多孔性，使得所選擇之 Pt/Si〇2部分可以藉由美國專利申請案〇9/198954號所述之 奪除#刻法（ablative etching)從銅箔上移去。令pt/Si〇2層 中丄曝光之α卩分接觸例如氣化鐵等銅姓劑（c〇pper etchant) 丨’由該銅姓刻渗透pt/Si〇2層而侵姑介於兩層面間之銅。 結果發現當底層之銅顯著脫落之前，黏性消失，使pt/Si〇2 層得以奪除。以此方式，銅（或其他金屬箔片）上面之Pt/Si02 層即得以電路化。為使此處理程序更為精細，可以在沈積 Pt/Si〇2之前利用CCVD或電鍍法在鋼箔上沈積例如鎳等 非常薄的姓刻劑敏感層（etchant-sensitive layer)。當蝕刻劑 滲透Pt/Si〇2層時，即可迅速侵蝕蝕刻敏感層而有助於奪 除餘刻程序之進行。 繼之，利用電阻層接線pt側壓入介電物質12之方式， 將第一落片11上具備介電物質層12之結構體10層疊於結 I I I I — — — — — — — ---— II--11 — — — — — — 1· (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 4 91652 經濟部智慧財產局員工消費合作社印製 478301 A7 一· B7 五、發明說明（5 ) 構體13a，使接線15a喪入介電物質中而形成第4圖所示 之結構體16。由於介電物質们2係微厚於電阻接線…， 故接線15 a乃利用介電物質層丨2之薄化部位而與第一落片 11保持電性區隔。 ' 其次，利用習知光阻劑電路化技術使第二箔片14電路 化’而形成第5圖所示具有電路元件2〇、2卜22之結構體 1 9(該處理步驟亦可使用相類似之操作，亦即先使第i箔片 11電路化，其後再使第二箔片14電路化）。元件2〇代表 電阻接線15a相對端部之導電連接跡線。因此，兩連接跡 線20間可以經由電祖接線15a而形成電阻性電性通路， 15a/20乃成一具有電阻器作用之單元。元件η代表一電 容器之導電板，元件21與稍後藉由第一篇片層u電路化 所形成之類似板體間即得以建立電容作用（capacitance)。 元件22代表提供電感器作用之印刷電氣線圈。 薄層之介電物質層12實質上並無機械強度。因此，在 結構體19得以進一步處理之前，結構體19已電路化之一 側先喪入介電物質層2 6，而如第6圖所示地藉其支持該結 構體之機械強度。繼之，將第一箔片η電路化以形成電路 跡線、電容器板2 1及電感線圈22。已電路化之一側隨後 後入於另一介電物質層（未圖示）。多數個此種結構體可以 層疊在一起而形成内部具有多數貫穿孔之多層印刷電路 板’且該等貫穿孔係經習知方法電鍍，使多層之間形成電 性連接。 以下以具體例更詳細說明本發明。
Aw· Μ--------^--------- (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 5 91652 478301 A7 B7 五、發明說明（6 ) 實施例1 結構體10之形成，如第1圖所示。 厚度50微米之銅羯層疊於5〇微米厚之”"牌環 氧樹月曰片上，該樹脂片係用作嵌入式介電物質層12。 實施例2 結構體13之形成，如第2圖所示。 於厚度50微米之鋼箔上電鍍35微米厚之鎳層以 CCVD法沈積〇至b微米厚度之pt/sic^97 5 : 2 5重量 比），其沈積條件如下： 製備溶液 1.23g. Pt(C〇D；)* 250ml甲苯 〇;g TEOS“（甲苯中含i 5wt〇/〇石夕） 15〇g 丙烷 沈積條件 溶液流速 沈積時間 沈積溫度 自藕變壓器 前端氧氣流速 *二苯-(1.5環辛二烯）鉑π * *四乙氧基硅烷 實施例3 將實施例2所得結構體之兩面均覆以Lamina^5〇㈧ 光阻劑。令Pt/Si〇2側曝露於圖案化之光化學照射下，箔 片側則完全曝露於光化學照射中，然後該結構體在2%^ 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ' — ----- 6 91652 I---------1---I ^--I I-----線 (請先閱讀背面之注意事項再填寫本頁) 3ml/分鐘 1小時 500°C 3.0 A 2900ml/分 41 經 濟 部 智 慧 財 產 局 員 工 消 費 合 作 社 印 製 478301 A7 B7 五、發明說明（7 ) 酸鈉於80C下實施顯影’藉以從電阻物質側去除未曝光之 光阻劑區。藉由已曝光之光阻劑對銅箔之保護作用，該結 構體復以足夠的時間浸潰於氯化銅溶液，使溶液滲透 Pt/Si〇2而充分去除鎳層，俾曝光部分之pt/si〇2奪除。然 後用NaOH溶液將光阻劑剝離。經餘刻之該結構體再層疊 於第1圖所示之結構體，並使殘留之Pt/Si〇2部分嵌入介 電物質中。 兩箔片層再塗覆光阻劑，在處理程序中，令具有 Pt/Si〇2之箔片層曝露於圖案化之光化學照射，另一笛片層 則完全曝露，以保護光阻劑。使結構體如前述地在碳酸鈉 中顯影。而一箔片層之曝露部分則以氣化鐵溶液蝕刻，以 形成電路跡線、電容板、電阻連接器及電感線圈。然後， 將光阻劑從結構體兩側面剝離。 將電路化之箔片層嵌入所層疊之介電物質層中。 然後’另一箔片層則如前述地施行電路化，以形成電 路跡線、電容板及電感線圈。 -----------♦裝 (請先閱讀背面之注意事項再填寫本頁) ----訂--- 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） 7 91652

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  1. 478301 、申請專利範圍 1· 一種薄整合電阻/電容/ 成含 感封裝件之製造方法，用以形 成&有電路跡線、整合雷 欠 阻器及整合電容器之電子電 $ 路，其步驟包括·· 卞皂 :備包含第1導電金屬箔片及層疊於該箔 入式介電物質層的第1層叠結構體； 製備包含第2導電佥厲^u 咏、切 μ ^ - €金屬伯片之第2層疊結構體，而 $ V白片於一側面具有電 度小於上i；班“八帝 且該電阻物質層之厚 、上述嵌入式；丨電物質層之厚度； 令該電阻物質層電路化盘 型電阻物質接線； ^形成分離 將第1及第2結構體相層疊，*使電 入於嵌入式介電物質層， 貝接線嵌 令一落片或另一箔片電路化 綠 电路化，以形成電容板、電路 跡線、選擇性電感線圈，甚 連接通路； 最至視*要形成第2落片電阻 線 :電路化荡片嵌入介電物質層疊層，俾於繼後製造 程序令支持該結構體，·及 胸Γ另片電路化；以形成電容板、電路跡線、選 由電感線圈，甚至視需要形成第2落片電阻連接器。 •=專利範圍第i項之製造方法，其中，該步驟再包 括將另一電路化落片嵌入介電物質層積層令。 3. 請專利範圍第1項之製造方法，其中'該步驟再包 括將上迷製造方法所得之複數電子電路相疊積在一起 i 以形成多層印刷電路。 ^狀·中國國家標準各⑵0 X 297公爱） 8 91652 4/8JU1 經濟部智慧財產局員工消費合作社印製 六、申請專利範圍 4·如申請專利範圍 第1項之製造方法’其中，各該羯片之 异度係介於約3 ^ ^〜 微未至約50微米間。 5·:申=利範固第1項之製造方法，其中，該電阻物質 二 係介於約3微米至約50微米之間；該嵌入式 介電物質層之&认， ^ 、 度係"於約3微米至約50微米間；而 " 弋7丨電物質層之厚度係大於電阻物質層之厚度 約2·9微米至約49.5微米。 6·如申請專利範圍第1項之製造方法 箔。 7·如申請專利範圍第i項之製造方法 電物質為環氧樹脂。 8·如申請專利範圍第1項之製造方法 層為摻雜有介電物質之白金。 9· 一種敌入式電路結構體，依序包括： 一環氧樹脂 埋入層； 一電路化之第一導電物質層； 一圖案化之電阻物質層，具有連接於上述電路化j 一導電物質層之電阻物質接線，俾經由該電阻物質接矣 形成電阻器通路； 一介電物質層，由該電阻物質接線嵌合該電阻物1 接線；及 一電路化之第二導電物質層，經由該介電物質層ί 電阻物質接線與第二電路層隔開，使電容器道路經由1 介電物質層而界定於第一與第二電路化層。 其中，該箔片為銅 其中，該嵌入式介 其中，該電阻物質 (請先閱讀背面之注意事項再填寫本頁) ▼裳--------訂---- 拳· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 9 91652 478301 A8 B8 C8 D8 六、申請專利範圍 ； 10.如申請專利範圍第9項之結構體，其中，該第二電路化 層係嵌入於環氧樹脂層。 11.如申請專利範圍第9項之結構體，其中，該介電物質層 為環氧樹脂。 12·如申請專利範圍第9項之結構體，其中，該電阻物質層 為摻雜有介電物質之白金。 13·如申請專利範圍第9項之結構體，其中，各該箔片層之 厚度為介於約3微米至約50微米。 14.如申請專利範圍第9項之結構體，其中，該電阻層厚度 係介於約0.1微米至0.5微米間，該嵌入式物質層厚度 係介於約3微米至約50微米，而該嵌入式物質層厚度 係大於電阻層厚度約2.9微米至約49.5微米。 --------------裝---.----—訂 _ (請先閱讀背面之注意事項再填寫本頁)
    -線 經濟-部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 10 91652
TW089119575A 1999-09-23 2000-09-22 Thin integral resistor/capacitor/inductor package, method of manufacture TW478301B (en)

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CN1303229A (zh) 2001-07-11
KR100811498B1 (ko) 2008-03-07
JP2001189541A (ja) 2001-07-10
EP1087647A2 (en) 2001-03-28
US6356455B1 (en) 2002-03-12
EP1087647B1 (en) 2007-11-21
SG90170A1 (en) 2002-07-23
EP1087647A3 (en) 2002-07-10
KR20010050609A (ko) 2001-06-15
DE60037168T2 (de) 2008-10-09
DE60037168D1 (de) 2008-01-03
CN1254162C (zh) 2006-04-26

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