TW442856B - Tungsten silicide nitride as an electrode for tantalum pentoxide device - Google Patents

Tungsten silicide nitride as an electrode for tantalum pentoxide device Download PDF

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TW442856B
TW442856B TW088121671A TW88121671A TW442856B TW 442856 B TW442856 B TW 442856B TW 088121671 A TW088121671 A TW 088121671A TW 88121671 A TW88121671 A TW 88121671A TW 442856 B TW442856 B TW 442856B
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Isik C Kizilyalli
Sailesh Mansinh Merchant
Pradip Kumar Roy
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Lucent Technologies Inc
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Description

442856 五、發明說明(1) 發明範圍 本發明有關製造場效裝置之方法’更特別的是用以形成 作為矽MOS電晶體閘極電極之方法。 發明背景 因為1970年代場效電晶體工業開始之故,該閘極介電體 係二氧化矽,近來,則使用氧氮化矽。此等裝置之電極通 常為多辱矽。該多晶矽通常經雙重摻雜’而且其上具有氮 化鈦之摻雜劑擴散劑障礙層。近來,已提出以五氧化鈕代 替二氧化矽作為介電體。參考C. Hu,Elec. Dev_
Letters,Sept. 1 998,第34卜42頁’其以提及的方式併 « 入本文中。然而,於高溫處理時,隨著氧流失’發生五氧 化钽漏電流之情形增加。於氧化氣體(諸如02或N20)下退火 通常會使此降解作用逆轉。氮化鈦對於此種氧流失而言是 無效障礙,尤其是高於約600C,當氮化鈦開始於該溫度附 近下分解時尤甚。因此,使用五氧化钽作為該閘極電極時 ’高密度矽MOS電晶體技術中需要一種經改良閘極電極材 料。 發明嫵結 本發明人發展出一種經改良MOS閘極結構,其用於具有 五氧化钽或堆疊五氧化鈕介電體之矽MOS電晶體ic裝置。 該結構包括一種兩層之WSi與ffSiN複合物與一種三層之 WSi/WSiN/WSi複合物。該矽化鎢層提供該閘極結構導電 性,而該矽氮化鎢層係有效之氧擴散障礙層,於約8〇〇(^之 高溫下尤其如此。此閘極結構無氮化鈦之高溫問題。經改
442856 五、發明說明(2) 良結構之適用特色係其玎於單一沉積工具中以原位附近處 理所有複合層製得彼。 圊式簡述 參閱附圖與下列詳述可以最明白本發明。要強調的是, 根據本發明半導體工業常見實務’該圖之各圊並非一定比 例。相反地,為求清楚起見’可任意放大或縮小各圖之大 小。該囷中包括下列各圖: 圖1係代表性場效電晶體之閘極區示意圖,其顯示根據 本發明製得之複合物問極電極; 圖2係適用於本發明之物理蒸氣沉積(pVD)裝置示意圖; 及 、 圖3-5係形成圖1複合物閘極電極之處理順序示意圖。 詳述 參考圊1 ’顯示矽基板11具有場介電體12,而五氧化钽 閉極介電體13係由金屬有機化學蒸氣沉積作用(MOCVD)形 成。本發明較佳應用中’閘極介電層小於約丨〇毫微米,小 ,約6毫微米為佳。此係五氧化钽介電體之耗氧問題最為 嚴重的尺寸體系。因為不希望受限於任何理論,氧流失可 能產生低於化學計量之氧化鈕,所流失之氧留下h〇le載體 ,其可能減少五氧化鈕之絕緣性質,並增加漏電流情形。 特佳者係使用堆疊五氧化鈕介電系統,其中先於矽上形成 二氡化矽,然後形成五氧化鈕,然後形成另一層二氧化矽 ’各別厚度係約〇 . 8至約2毫微米,約3至約3 0毫微米,以 及約0. 5至約2毫微米。堆疊五氧化鈕系統係由p. K. R〇y等
第5頁 442856 五、發明說明(3) ~---- 人描述於 APP1· PhyS. Letts.,V〇l. 72,N。. 22,1998 年6月1日,第2835-3 7頁,以提及的方式將其全文併入 文中。 次一處理順序係形成複合物閘極電極丨6。以單 該閘極電極,表達在本發明較佳多層結構之事實中^ 彼此之間無明顯斷層,而整個複合物閘極電極實單 一處理操作製成。該複合物閘極電極包括矽 (wsum作為沉積於問極電極13上之狳擴散障:層'而 矽化鎢(WS i x)層1 8沉積於矽氮化鎢i D^除了較佳之 之外,可以沉積其他導電材料(諸如鋁與銅 x =導料代替形成複合物問極電極有等 層係以依序操作沉積,將於下文描述之。 以及約1 0至約 其中氮與矽含 其二具體實例中’首先將一 wsi黏著層沉積於堆疊五 =钽上,形成wsi/wsiN/wsi之三層複合物,其代表性一 厚度約1至約2毫微米,約5至約30毫微米, 1 2 0毫微米。 β該複合物堆疊體可沉積為官能梯度材料 量針對鎢而平滑地變化’層間無明確界限 物=例如習用RIE(反應電子钮刻作用)界定該複合 ☆電體13示於圖】,其係由源極沒極區上方 習用離子植入作用形成源極21與没極二 m適當位置’ *用複合物閘極電極作為植入r經由j 介電層進仃源極與汲極植入。就p_通道裝置而言,該摻^
442856 五、發明說明(4) 劑係硼,而就Π—通道裝置而言’該摻雜劑通常係神。某些 先前技藝方法中’在植入步称期間曝露出閘極電極’並將 雜質植入露出之蘭極電極’以提局問極導電性。然而’使 用本發明複合材料不需要而且可避免該閘極之摻雜作用。 形成源極/汲極之後’沉積該中間介電層’經由石版印 刷術在該中間介電層中開啟源極及極接觸窗口’使用鶴 或銘栓或間柱製造該閘極電極與源極/及極區之接點°然 後,沉積互連金屬層(未顯示出來)並形成圖型’並沉積 其他中間介電層(未顯示出來)。可以選擇性形成第三互連 層(未顯示出來)。源極與汲極概示於圖1中之24與25。最 後三系列步驟係IC技術中之標準步驟,此處未予圖示。 本發明内容中之方法的重要特徵係形成多層閘極電極。 參考圖2-5更詳細描述之。 形成多層閘極電極之較佳沉積方法係物理蒸氣沉積 (PVD ),即濺鍍作用。在減壓下,於一種惰性氣氛中自一 石夕化鎢濺靶濺鍍該矽化鎢層。於氮與氬氣中之反應性濺鍍 作用形成氮化鎢層。可單獨使用氮》在不破壞該PVD裝置 中之真空狀態下,該多層沉積步驟於同一沉積裝置中依序 進行為佳。為了描述,以此方式形成之層稱為"於原位"形 成。 PVD本紙係一種習用方法,而且其可於任何適用PVD裝置 進行。PVD裝置之示意圖示於圖2。真空室27罩住減^ 29 中f擇性平行光管31 (可自其底部或頂部將氣體導入該室 ),以及基板加熱器33,其支撐晶圓35。該圖中顯g
442856
五、發明說明(5) ’而且包括用以濺鍍金屬層之氩氣,以及用以反應 化物層之氩氣與氮氣
參考圖3 ’矽基板示為4 1,其上有五氧化钽閘極介電層 42形成。可使用電阻加熱接受器或加熱器或是以氩在後側 加熱(未顯示出來)提高晶圓溫度。此圖係M〇s裝置之閑極/ 通道區,因此不會顯現場效。其次沉積閘極電極層。T 參考圖4,將障礙層43濺鍍沉積於層43,將気添加於該 PVD反應器中’在PVD反應器中原位進行為佳。該障礙層^ WSixNy,而且其係避免前述自五氧化鈕區經由擴散作用產' 生氧流失之多層閘極電、極堆疊體中之關鍵梯度β較佳氣流 介於約5至約55 seem之間,氬氣載體介約4〇至約6〇 sccm 。層4 3之矽化物/氮化物材料通常係一種高電阻係數材料 。控制氤流速與該層形成之組成可以控制該材料之板電 阻。WSixNy障礙層之較佳組成範圍約5至約30% N,約4〇至 約6 0% Si,其餘為W。層44之較佳厚度在約50至約3⑽埃範 圍内。視氮流速而定’該氮化物可以沉積為氮化物模式或 非氮化物模式。本技藝中習知此等沉積模式。 於PVD反應器中,使用S i對W比率大於2之ws ix減起沉積 該矽化鎢層(示於圖5中之44)。較佳之Si/ff比大於約2 5, 最有效範圍約2.5至約2.9。在壓力範圍約2至約6毫托耳且 溫度範圍約25至約400 C之氬> 氣氣中沉積層44。層44之厚· 度範圍約1 0 0至約1 2 0 0埃,約6 0 0至約8 0 0埃為佳。 層43-44亦可由其他技術沉積,諸如CVD。例如,可使用 二氣梦烧或是類似先質形成石夕化物,遵添加提供氣來源之
442856 五、發明說明(6) 氣體形成碎氣化物。然後關閉該氮源形成最上層石夕化物層 ’完成該沉積作用β 熟知本技藝者會明白使用本發明多層閘極電極之優點。 矽氮化物與矽化物之多層結構構成一個可以調節應力之組 成分級堆疊體。此種結構容易製造之證據係:整個閘極電 極堆疊體可在單一室中沉積,毋需如同先前技藝般在分離 =具中沉積多晶S 1之成本。此外,製造該裝置期間對其進 仃熱處理時,WSixNy可作為氧自五氧化鈕擴散出來之優良 障礙物。先前技藝中,此種障礙物不存在多晶^或氮化鈦 堆疊體中。 熟知本技藝者會得到本發明各種其他改良。得自本說明 書特定教不之各種變異基本上係以發展本技藝之原則與其 相等物為基礎’其可適當地視為包括在本發明所述與申請 專利範圍之範圍内。

Claims (1)

  1. 442856 1跑種製造矽閘極場效電晶體裝置之方法,包括下列之 及 在石夕基板之經選擇之區域上形成五氧化钽介電層 世杖介電層上沉積多層閘極電極層’《中該多層閘極 ο 有矽I化鎢之複合層與一電導體。 Ζ ·根據申請專利 号列範圍第1項之方法,其中該電導體包括 尽化妈。 .專利圍第1項之方法’更包括下列之步驟 刻該多 層閘極 中之源 用多層 :以及 成與該 據申請 部分對 據申請 之曝露 源極與 據申請 連續步 該介電 一個多 蓋基板 使 沒極區 形 4.根 之露出 5·根 介電層 露出之 6_根 極係由 在 層閘極電 電極,留 極與汲極 閘極電極 源極與沒 專利範圍 該源極與 專利範圍 部分,以 没極區。 專利範圍 驟製得, 層上沉積 極層’在該介電層之閘極部分製造 下露出之介電層部分,此等部分覆 區; 作為光罩’將摻雜劑植入該源極與 極區之電接點。 第3項之方法,其中經由該介電層 淡極進行植入。 第3項之方法,其另外包括蝕刻掉 露出該源極與汲極’並將雜質植入 第1項之方法,其中該多層閘極電 其包括: 第一層,該第一層包括矽気化鎢;
    8^1
    442856 六、申請專利範圍 " 在該第一層上沉積第二層,該第二層包括矽化鎢電導 體,俾製得該多層閘極電極層;及 蝕刻該第一與第二層,以製得該多層閘極電極。 7,根據申請專利範圍第6項之方法,其中該多層閘極電 極之厚度在約50至約2 0 0毫微米範圍内。 8. 根據申請專利範圍第6項之方法,其中該第一層包括 約5至約30%之N,約40至約60%之Si,其餘為。 9. 根據申請專利範圍第6項之方法,其中第二層之矽化 鎢中’矽對鎢之比率大於約2.5。 10. 根據申請專利範闺第6項之方法,其中第二層之矽化 鎮中’矽對鎢之比率在約2. 5至約2.9範圍内。 11. 根據申請專利範圍第6項之方法,其中於一減壓裝置 中進行沉積步驟’其不會破壞該裝置中之減壓力。 1 2.根據申請專利範圍第1項之方法,其另外包括於沉積 矽氮化鎢層之前沉積矽化鎢層之步驟。 13. 根據申s奢專利範圍第1項之方法,其中該介電層之厚 度小於約1 0毫微米》 14. 根據申請專利範圍第1項之方法,其中該五氧化鈕層 介電層係一經堆疊之五氧化鈕。 1 5_ —種製造矽閘極場效電晶體裝置之方法,包括下列 之步驟: 在一矽基板上之經選擇裝置區域上形成堆疊五氧化 钽介電層; 在該經選擇裝置區域之介電層上沉積多層閘極電極
    第11頁 ----- 442856 六、申請專利範圍 層’其中該多層閘極電極包虹 ^ ^ >fh ^ m . 括包含石夕I化鎢之第一層與包 含矽化鎢之第一層的複合層; 1〜^ ^ ^ 蝕刻該閘極電極層’在 分上製造多層問極電極,露屮八置^區域之介電層閘極部 分覆蓋該基板之源極與没極:該介電層保留部>,此等部 使用多層閘極電極作為 與汲極,區;以及 罩將摻雜劑植入該源極 形成與該源極與汲極區之電接點 本發明另外特徵係於單一裝置中 多層閘極電極,此等步驟包括: 以連續步驟製造該 藉由在包含氮而且流速在約5至約55 sccm範圍内之 第一氣氛中之濺鍍作用,將第一層沉積於該介電體上; 自石夕化鶴減乾減鐘在第一層上’以沉積第二層, 其中該滅乾之石夕對鎢比率在約2 5至約2, 9範圍内,該濺鍍 作用係於主要由惰性氣體組成且流速在約4 〇至約6 〇 sc cm 之第二氣氛中進行’該介電層之溫度在約100至約400 °c範 圍内,及 蝕刻第一與第二層,製得多層閘極電極。 16. —種場效電晶體,其包括一個源極、一個閘極與一 個没極’其中該閘極包括包含五氧化组層、碎氮化钱層與 矽化鎢層之多層閘極電極。 1 7,根據申請專利範圍第1 6項之電晶體,其中該矽氮化 鎢層包括約5至約30%之N,約40至約60%之Si,其餘為W。 1 8.根據申請專利範圍第1 6項之電晶體’其中矽化鎢層
    Q\61\61814.PTD 第12頁 4428 5 6 六、申請專利範圍 中矽對鎢之比率大於約2. 5。 1 9.根據申請專利範圍第1 6項之電晶體,其中矽化鎢層 中矽對鎢之比率在約2. 5至約2 . 9範圍内。 2 0.根據申請專利範圍第1 6項之電晶體,其中該五氧化 组層係一經堆疊之五氧化組層。
    O:\6L\618I4.PTD 第13頁
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US20060091483A1 (en) * 2004-11-02 2006-05-04 Doczy Mark L Method for making a semiconductor device with a high-k gate dielectric layer and a silicide gate electrode
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