TW417223B - Apparatus and method for improved deposition of conformal liner films and plugs in high aspect ratio contacts - Google Patents

Apparatus and method for improved deposition of conformal liner films and plugs in high aspect ratio contacts Download PDF

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Publication number
TW417223B
TW417223B TW086105261A TW86105261A TW417223B TW 417223 B TW417223 B TW 417223B TW 086105261 A TW086105261 A TW 086105261A TW 86105261 A TW86105261 A TW 86105261A TW 417223 B TW417223 B TW 417223B
Authority
TW
Taiwan
Prior art keywords
substrate
contacts
collimator
target
deposition
Prior art date
Application number
TW086105261A
Other languages
English (en)
Chinese (zh)
Inventor
Corey A Weiss
Bruce Gittleman
Jeffrey M Bulson
Original Assignee
Sony Corp
Materials Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp, Materials Research Corp filed Critical Sony Corp
Application granted granted Critical
Publication of TW417223B publication Critical patent/TW417223B/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/046—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
TW086105261A 1996-04-26 1997-04-23 Apparatus and method for improved deposition of conformal liner films and plugs in high aspect ratio contacts TW417223B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US63829096A 1996-04-26 1996-04-26

Publications (1)

Publication Number Publication Date
TW417223B true TW417223B (en) 2001-01-01

Family

ID=24559418

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086105261A TW417223B (en) 1996-04-26 1997-04-23 Apparatus and method for improved deposition of conformal liner films and plugs in high aspect ratio contacts

Country Status (7)

Country Link
EP (1) EP0843890A1 (ja)
JP (1) JPH11509049A (ja)
KR (1) KR19990028451A (ja)
AU (1) AU2400497A (ja)
CA (1) CA2225446A1 (ja)
TW (1) TW417223B (ja)
WO (1) WO1997041598A1 (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002007198A2 (en) * 2000-07-18 2002-01-24 Applied Materials, Inc. Deposition of low stress tantalum films
JP2005082873A (ja) * 2003-09-10 2005-03-31 Applied Materials Inc 膜形成方法
KR101603798B1 (ko) * 2007-10-26 2016-03-15 에바텍 어드벤스드 테크놀로지스 아크티엔게젤샤프트 관통 실리콘 비아 금속화에 대한 고전력 마그네트론 스퍼터링의 적용
US20100096253A1 (en) * 2008-10-22 2010-04-22 Applied Materials, Inc Pvd cu seed overhang re-sputtering with enhanced cu ionization

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4925542A (en) * 1988-12-08 1990-05-15 Trw Inc. Plasma plating apparatus and method
EP0735577A3 (en) * 1994-12-14 1997-04-02 Applied Materials Inc Deposit process and apparatus

Also Published As

Publication number Publication date
WO1997041598A1 (en) 1997-11-06
CA2225446A1 (en) 1997-11-06
AU2400497A (en) 1997-11-19
KR19990028451A (ko) 1999-04-15
JPH11509049A (ja) 1999-08-03
EP0843890A1 (en) 1998-05-27

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