TW367496B - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
TW367496B
TW367496B TW086107130A TW86107130A TW367496B TW 367496 B TW367496 B TW 367496B TW 086107130 A TW086107130 A TW 086107130A TW 86107130 A TW86107130 A TW 86107130A TW 367496 B TW367496 B TW 367496B
Authority
TW
Taiwan
Prior art keywords
memory cell
current leakage
memory device
semiconductor memory
generate
Prior art date
Application number
TW086107130A
Other languages
English (en)
Inventor
Tatsuya Fukuda
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW367496B publication Critical patent/TW367496B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G11C5/146—Substrate bias generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/067—Single-ended amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14—Dummy cell management; Sense reference voltage generators
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5004—Voltage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
TW086107130A 1996-12-19 1997-05-27 Semiconductor memory device TW367496B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8339344A JPH10178108A (ja) 1996-12-19 1996-12-19 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW367496B true TW367496B (en) 1999-08-21

Family

ID=18326568

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086107130A TW367496B (en) 1996-12-19 1997-05-27 Semiconductor memory device

Country Status (6)

Country Link
US (1) US5761143A (zh)
JP (1) JPH10178108A (zh)
KR (1) KR100263529B1 (zh)
CN (1) CN1185629A (zh)
DE (1) DE19727262B4 (zh)
TW (1) TW367496B (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100641912B1 (ko) * 1998-12-24 2007-07-12 주식회사 하이닉스반도체 셀 누설전류 감지장치
US6181626B1 (en) 2000-04-03 2001-01-30 Lsi Logic Corporation Self-timing circuit for semiconductor memory devices
JP2002056671A (ja) * 2000-08-14 2002-02-22 Hitachi Ltd ダイナミック型ｒａｍのデータ保持方法と半導体集積回路装置
AU1142001A (en) * 2000-10-19 2002-04-29 Dsm N.V. Protein hydrolysates
JP2002197867A (ja) * 2000-12-28 2002-07-12 Nec Corp 半導体装置
KR100406555B1 (ko) * 2001-06-29 2003-11-20 주식회사 하이닉스반도체 반도체 메모리 장치 및 그 테스트 방법
CN100352059C (zh) * 2002-10-21 2007-11-28 松下电器产业株式会社 半导体集成电路装置
JP4578878B2 (ja) * 2004-07-27 2010-11-10 パナソニック株式会社 半導体集積回路
JP4764086B2 (ja) * 2005-07-27 2011-08-31 パナソニック株式会社 半導体集積回路装置
KR100990144B1 (ko) 2007-03-05 2010-10-29 주식회사 하이닉스반도체 반도체 소자 및 그의 동작방법
CN101901632B (zh) * 2010-08-11 2015-12-02 上海华虹宏力半导体制造有限公司 监控位线电压的监控电路及监控方法
US8537625B2 (en) * 2011-03-10 2013-09-17 Freescale Semiconductor, Inc. Memory voltage regulator with leakage current voltage control
FR3014266B1 (fr) 2013-12-03 2017-07-21 Stmicroelectronics Rousset Procede et dispositif de commande d'un echantillonneur bloqueur.

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4307307A (en) * 1979-08-09 1981-12-22 Parekh Rajesh H Bias control for transistor circuits incorporating substrate bias generators
JPS63121197A (ja) * 1986-11-07 1988-05-25 Fujitsu Ltd 半導体記憶装置
US5272676A (en) * 1990-11-20 1993-12-21 Hitachi, Ltd. Semiconductor integrated circuit device
JPH05205465A (ja) * 1992-01-20 1993-08-13 Sharp Corp 半導体メモリ装置
JPH05225777A (ja) * 1992-02-13 1993-09-03 Sharp Corp 半導体メモリ装置
JP3583482B2 (ja) * 1994-10-04 2004-11-04 株式会社ルネサステクノロジ 半導体集積回路装置
US5680357A (en) * 1996-09-09 1997-10-21 Hewlett Packard Company High speed, low noise, low power, electronic memory sensing scheme

Also Published As

Publication number Publication date
DE19727262B4 (de) 2004-10-21
US5761143A (en) 1998-06-02
JPH10178108A (ja) 1998-06-30
DE19727262A1 (de) 1998-06-25
KR100263529B1 (ko) 2000-08-01
KR19980063380A (ko) 1998-10-07
CN1185629A (zh) 1998-06-24

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