TW202314817A - 元件晶片的製造方法 - Google Patents

元件晶片的製造方法 Download PDF

Info

Publication number
TW202314817A
TW202314817A TW111121647A TW111121647A TW202314817A TW 202314817 A TW202314817 A TW 202314817A TW 111121647 A TW111121647 A TW 111121647A TW 111121647 A TW111121647 A TW 111121647A TW 202314817 A TW202314817 A TW 202314817A
Authority
TW
Taiwan
Prior art keywords
wafer
layer
laser beam
manufacturing
dividing
Prior art date
Application number
TW111121647A
Other languages
English (en)
Inventor
鈴木克彥
木内逸人
小田中健太郎
北原信康
下房大悟
Original Assignee
日商迪思科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商迪思科股份有限公司 filed Critical 日商迪思科股份有限公司
Publication of TW202314817A publication Critical patent/TW202314817A/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/18—Working by laser beam, e.g. welding, cutting or boring using absorbing layers on the workpiece, e.g. for marking or protecting purposes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00—Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36—Removing material
    • B23K26/38—Removing material by boring or cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Mechanical Engineering (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)

Abstract

[課題]提供一種元件晶片的製造方法，其可實現製造僅由元件層所構成之元件晶片之新製程。[解決手段]一種元件晶片的製造方法，其包含：晶圓準備步驟，其準備具有基材、雷射光束吸收層以及元件層之晶圓，所述雷射光束吸收層層積於基材上，所述元件層層積於雷射光束吸收層上且在由交叉之多條分割預定線所劃分之各區域分別形成有元件；元件層分割步驟，其形成分割槽，所述分割槽沿著分割預定線至少將元件層分割成一個個元件晶片；以及剝離步驟，其在實施元件層分割步驟後，從基材側照射會被雷射光束吸收層吸收之波長的雷射光束，並將元件晶片從基材上剝離。

Description

元件晶片的製造方法
本發明係關於一種元件晶片的製造方法。
伴隨著電子機器的薄型化，元件晶片也被要求薄化至100μm以下，例如廣為採用以下技術：僅將晶圓的與元件對應之區域進行薄化並使外周部維持厚度地殘留，藉此防止操作處理時的破損（例如，參照專利文件1）。 [習知技術文獻] [專利文獻]
[專利文獻1]日本特開2021-5621號公報
[發明所欲解決的課題] 然而，晶圓有所謂SOI（Silicon on Insulator，絕緣層上矽）晶圓，其在矽等基材上形成由SiO 2所構成之被稱為BOX層（Buried Oxide Layer，埋入式氧化層）之絕緣層，並在其上形成元件層，所述元件層包含構成元件之重佈層。
近年來，有欲實現以下內容的期望：將此SOI晶圓的矽等基材完全地去除，作成僅由元件層所構成之元件晶片，藉此將元件晶片進一步薄化。
因此，本發明之目的為提供一種元件晶片的製造方法，其可實現製造僅由元件層所構成之元件晶片之新製程。
[解決課題的技術手段] 根據本發明，提供一種元件晶片的製造方法，其具備：晶圓準備步驟，其準備具有基材、雷射光束吸收層以及元件層之晶圓，所述雷射光束吸收層層積於該基材上，所述元件層層積於該雷射光束吸收層上且在由交叉之多條分割預定線所劃分之各區域分別形成有元件；元件層分割步驟，其形成分割槽，所述分割槽沿著該分割預定線至少將該元件層分割成一個個元件晶片；以及剝離步驟，其在實施該元件層分割步驟後，從該基材側照射會被該雷射光束吸收層吸收之波長的雷射光束，並將該元件晶片從該基材上剝離。
較佳為，元件晶片的製造方法進一步具備：移設用構件配設步驟，其在實施該剝離步驟之前將移設用構件配設於該元件層正面。
[發明功效] 根據本發明，發揮可實現製造僅由元件層所構成之元件晶片之新製程的效果。
以下，針對本發明的實施方式，一邊參照圖式一邊進行詳細說明。本發明不受以下的實施方式所記載之內容限定。又，在以下所記載之構成要素中，包含本發明所屬技術領域中具有通常知識者可容易思及者、實質上相同者。再者，以下所記載之構成能適當組合。又，在不脫離本發明的主旨的範圍內，可進行構成的各種省略、取代或變更。
根據圖式，說明本發明的實施方式之元件晶片的製造方法。圖1係實施方式之元件晶片的製造方法的加工對象的晶圓的立體圖。圖2係表示圖1所示之晶圓的剖面圖。圖3係表示實施方式之元件晶片的製造方法的流程之流程圖。
實施方式之元件晶片的製造方法係圖1所示之晶圓1的加工方法。如圖1及圖2所示，實施方式之元件晶片的製造方法的加工對象的晶圓1係具備基材2、層積於基材2上之雷射光束吸收層3以及設置於雷射光束吸收層3的上表面31之元件層4之圓板狀的半導體晶圓等晶圓。
在實施方式中，基材2係藉由矽所構成，並被形成為圓板狀。雷射光束吸收層3係藉由樹脂所構成，在實施方式中，係藉由聚醯亞胺所構成。雷射光束吸收層3係遍佈基材2的正面21的整面地層積於基材2上。
如圖1所示，元件層4係在由交叉之多條分割預定線5所劃分之各區域形成有元件6。元件6例如為IC（Integrated Circuit，積體電路）或LSI（Large Scale Integration，大型積體電路）等積體電路、功率元件、或MEMS（Micro Electro Mechanical Systems，微機電系統）。
如圖2所示，元件層4包含：絕緣層7，其形成於雷射光束吸收層3的上表面31；矽層8，其形成於絕緣層7上；以及重佈層9，其形成於矽層8上。絕緣層7係由SiO 2所構成之被稱為BOX層（Buried Oxide Layer，埋入式氧化物）者。矽層8係藉由矽所構成。重佈層9係構成元件6者。
如此，在實施方式中，晶圓1係所謂SOI（Silicon on Insulator，絕緣層上矽）晶圓，其在雷射光束吸收層3的上表面31上形成元件層4。在實施方式中，晶圓1的基材2及雷射光束吸收層3會被去除，且沿著分割預定線5被分割成一個個元件晶片。在實施方式中，被分割成一個個之元件晶片係僅由元件層4所構成，且厚度為10μm左右。
前述之晶圓1例如係藉由將以下兩種矽晶圓貼合而製造：將雷射光束吸收層3與絕緣層7依序層積於基材2上而成之矽晶圓、將重佈層9層積於成為矽層8之基材上而成之矽晶圓。又，晶圓1例如係藉由將以下兩種矽晶圓貼合而製造：將雷射光束吸收層3層積於基材2上而成之矽晶圓、將絕緣層7層積於成為矽層8之基材的一側的面上且將重佈層9層積於另一側的面上而成之矽晶圓。
實施方式之元件晶片的製造方法係去除晶圓1的基材2及雷射光束吸收層3，並沿著分割預定線5進行分割，而製造一個個元件晶片之方法。如圖3所示，元件晶片的製造方法具備：晶圓準備步驟1001、元件層分割步驟1002、移設用構件配設步驟1003、剝離步驟1004以及元件拾取步驟1005。
（晶圓準備步驟） 晶圓準備步驟1001係準備前述之構成的晶圓之步驟。在晶圓準備步驟1001中，準備前述之構成的晶圓1。
（元件層分割步驟） 圖4係示意性地表示圖3所示之元件晶片的製造方法的元件層分割步驟之立體圖。圖5係示意性地表示圖3所示之元件晶片的製造方法的元件層分割步驟後的晶圓之剖面圖。在實施方式中，元件層分割步驟1002係形成分割槽10之步驟，所述分割槽10沿著分割預定線5至少將元件層4分割成一個個元件晶片。
在實施方式中，在元件層分割步驟1002中，習知的黏貼機係如圖4所示將直徑大於晶圓1之圓板狀的膠膜11黏貼於晶圓1的基材2的正面21的背側的背面22，且將內徑大於晶圓1的外徑之環狀的框架12黏貼於膠膜11的外周緣，將晶圓1支撐於環狀的框架12的內側的開口內。
在實施方式中，在元件層分割步驟1002中，雷射加工裝置50係透過膠膜11而將晶圓1的基材2的背面22側吸引保持於保持台51的保持面52。在實施方式中，在元件層分割步驟1002中，雷射加工裝置50將雷射光束53的聚光點54設定於元件層4，並一邊使保持台51相對於雷射光束照射單元55而沿著分割預定線5相對地移動，一邊從雷射光束照射單元55將對於晶圓1具有吸收性之波長的雷射光束53照射至晶圓1的分割預定線5，而對晶圓1施以燒蝕加工。
在實施方式中，在元件層分割步驟1002中，雷射加工裝置50係對晶圓1的分割預定線5施以燒蝕加工，而形成將元件層4依一個個元件6進行分割之分割槽10。在實施方式中，在元件層分割步驟1002中，如圖5所示，雷射加工裝置50在晶圓1的全部的分割預定線5形成分割槽10。此外，在實施方式中，分割槽10係將元件層4與雷射光束吸收層3依元件6進行分割。
此外，在實施方式中，在元件層分割步驟1002中，雷射加工裝置50雖對晶圓1的分割預定線5施以燒蝕加工而形成分割槽10，但在本發明中，在元件層分割步驟1002中，切割裝置也可將切割刀片切入晶圓1的元件層4的分割預定線5而形成分割槽10。又，在本發明中，在元件層分割步驟1002中，也可對晶圓1的元件層4的分割預定線5施以濕蝕刻或乾蝕刻等蝕刻而形成分割槽10。
（移設用構件配設步驟） 圖6係示意性地表示圖3所示之元件晶片的製造方法的移設用構件配設步驟後的晶圓之剖面圖。移設用構件配設步驟1003係在實施剝離步驟1004之前將移設用構件13配設於元件層4的正面41之步驟。
在實施方式中，在移設用構件配設步驟1003中，將接著力會因施加外部刺激而下降之接著劑14塗布於晶圓1的元件層4的正面41，並如圖6所示，將移設用構件13黏貼於接著劑14，而將移設用構件13配設於元件層4的正面41，且從背面22剝離膠膜11。此外，在實施方式中，施加外部刺激例如係照射紫外線或進行加熱。
在實施方式中，移設用構件13係由硬質的材質所構成，並被形成為與晶圓1相同直徑的圓板狀。在實施方式中，移設用構件13係藉由玻璃所構成。
又，在本發明中，移設用構件13也可將液狀樹脂（迪思科公司製，ResiFlat（註冊商標））塗布於元件層4的正面41並將液狀樹脂進行硬化而形成。又，在本發明中，移設用構件13也可為由基材與糊層所構成之表面保護膠膜，並也可透過接著劑14而將由金屬、陶瓷以及矽等硬質的材料所構成之圓板狀的板配設於元件層4的正面41。
（剝離步驟） 圖7係示意性地表示圖3所示之元件晶片的製造方法的剝離步驟中照射雷射光束之狀態之剖面圖。圖8係表示圖3所示之元件晶片的製造方法的剝離步驟的雷射光束的聚光點的軌跡之俯視圖。圖9係示意性地表示圖3所示之元件晶片的製造方法的剝離步驟中去除基材之狀態之剖面圖。
剝離步驟1004係在實施元件層分割步驟1002後，從基材2側照射會被雷射光束吸收層3吸收之波長的雷射光束73，並從基材2上剝離元件6之步驟。在實施方式中，在剝離步驟1004中，雷射加工裝置70將設置於吸引路徑76之開關閥77開啟，並藉由吸引源78而吸引保持台71的保持面72，透過移設用構件13而將晶圓1的元件層4的正面41側吸引保持於保持台71的保持面72。
在實施方式中，在剝離步驟1004中，雷射加工裝置70將聚光點74設定於保持台71所保持之晶圓1的雷射光束吸收層3，並如圖7所示，從雷射光束照射單元75，將對於基材2具有透射性且會被雷射光束吸收層3吸收之波長的脈衝狀的雷射光束73從晶圓1的基材2側照射至雷射光束吸收層3。
在剝離步驟1004中，雷射加工裝置70係如圖8所示，最初係將聚光點74定位於雷射光束吸收層3的最外緣，以聚光點74在從最外圍一邊往圓周方向移動一邊緩緩地朝向中心之螺旋狀的軌跡79上移動之方式，一邊使雷射光束73的聚光點74與保持台71相對地移動一邊照射脈衝狀的雷射光束73。
脈衝狀的雷射光束73具有對於基材2具有透射性且對於雷射光束吸收層3具有吸收性之波長。藉此，在剝離步驟1004中，被照射雷射光束73之雷射光束吸收層3會被破壞，而產生氣體。在實施方式中，在剝離步驟1004中，如圖9所示，從晶圓1的元件層4的正面41的背側的背面42亦即絕緣層7剝離基材2，並從元件層4亦即元件6去除基材2。此外，在實施方式中，雷射光束73的波長係1064nm。
（元件拾取步驟） 元件拾取步驟1005係在實施剝離步驟1004後，從移設用構件13拾取經單體化之元件6之步驟。
在實施方式中，在元件拾取步驟1005中，對接著劑14施加外在刺激，使接著劑14的接著力降低。在實施方式中，在元件拾取步驟1005中，在使接著劑14的接著力降低後，未圖示的拾取器（picker）會進行吸引保持元件6等動作，而從移設用構件13一個一個地拾取元件6。
此外，在本發明中，在元件拾取步驟1005中，也可將膠膜等黏貼於元件層4的背面側，並在轉移元件6後再進行拾取。又，在本發明中，在元件拾取步驟1005中，也可將移設用構件13依元件6進行分割，並將經單體化之移設用構件13與元件6一起進行拾取。
以上所說明之實施方法之元件的製造方法係在晶圓準備步驟1001中準備具備基材2、雷射光束吸收層3以及元件層4之晶圓1，所述雷射光束吸收層3層積於基材2上，所述元件層4在雷射光束吸收層3的上表面31之由交叉之多條分割預定線5所劃分之各區域形成有元件6，並且，在元件層分割步驟1002中分割元件層4後，在剝離步驟1004中從基材2側照射會被雷射光束吸收層3吸收之波長的雷射光束73，藉此使雷射光束73被雷射光束吸收層3吸收，並從元件層4的背面42去除基材2。在剝離步驟1004之後，晶圓1被單體化成僅由元件層4所構成之一個個元件晶片。其結果，實施方式之元件晶片的製造方法發揮可實現製造僅由元件層4所構成之元件晶片之新製程的效果。
此外，本發明並未受限於上述實施方式等。亦即，在不脫離本發明的精神的範圍內，可進行各種變形並實施。
1:晶圓 2:基材 3:雷射光束吸收層 4:元件層 5:分割預定線 6:元件 10:分割槽 13:移設用構件 31:上表面 41:正面 73:雷射光束 1001:晶圓準備步驟 1002:元件層分割步驟 1003:移設用構件配設步驟 1004:剝離步驟 1005:元件拾取步驟
圖1係實施方式之元件晶片的製造方法的加工對象的晶圓的立體圖。 圖2係表示圖1所示之晶圓的剖面圖。 圖3係表示實施方式之元件晶片的製造方法的流程之流程圖。 圖4係示意性地表示圖3所示之元件晶片的製造方法的元件層分割步驟之立體圖。 圖5係示意性地表示圖3所示之元件晶片的製造方法的元件層分割步驟後的晶圓之剖面圖。 圖6係示意性地表示圖3所示之元件晶片的製造方法的移設用構件配設步驟後的晶圓之剖面圖。 圖7係示意性地表示圖3所示之元件晶片的製造方法的剝離步驟中照射雷射光束之狀態之剖面圖。 圖8係表示圖3所示之元件晶片的製造方法的剝離步驟的雷射光束的聚光點的軌跡之俯視圖。 圖9係示意性地表示圖3所示之元件晶片的製造方法的剝離步驟中去除基材之狀態之剖面圖。
1001:晶圓準備步驟
1002:元件層分割步驟
1003:移設用構件配設步驟
1004:剝離步驟
1005:元件拾取步驟

Claims (2)

  1. 一種元件晶片的製造方法，其具備： 晶圓準備步驟，其準備具有基材、雷射光束吸收層以及元件層之晶圓，該雷射光束吸收層層積於該基材上，該元件層層積於該雷射光束吸收層上且在由交叉之多條分割預定線所劃分之各區域分別形成有元件； 元件層分割步驟，其形成分割槽，該分割槽沿著該分割預定線至少將該元件層分割成一個個元件晶片；以及 剝離步驟，其在實施該元件層分割步驟後，從該基材側照射會被該雷射光束吸收層吸收之波長的雷射光束，並將該元件晶片從該基材上剝離。
  2. 如請求項1之元件晶片的製造方法，其中，進一步具備： 移設用構件配設步驟，其在實施該剝離步驟之前將移設用構件配設於該元件層正面。
TW111121647A 2021-06-15 2022-06-10 元件晶片的製造方法 TW202314817A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021-099660 2021-06-15
JP2021099660A JP2022191043A (ja) 2021-06-15 2021-06-15 デバイスの製造方法

Publications (1)

Publication Number Publication Date
TW202314817A true TW202314817A (zh) 2023-04-01

Family

ID=84390559

Family Applications (1)

Application Number Title Priority Date Filing Date
TW111121647A TW202314817A (zh) 2021-06-15 2022-06-10 元件晶片的製造方法

Country Status (5)

Country Link
US (1) US20220399235A1 (zh)
JP (1) JP2022191043A (zh)
KR (1) KR20220168156A (zh)
CN (1) CN115483155A (zh)
TW (1) TW202314817A (zh)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021005621A (ja) 2019-06-26 2021-01-14 株式会社ディスコ ウエーハの加工方法

Also Published As

Publication number Publication date
CN115483155A (zh) 2022-12-16
US20220399235A1 (en) 2022-12-15
KR20220168156A (ko) 2022-12-22
JP2022191043A (ja) 2022-12-27

Similar Documents

Publication Publication Date Title
JP4791843B2 (ja) 接着フィルム付きデバイスの製造方法
JP6367084B2 (ja) 半導体チップの接合方法及び半導体チップの接合装置
JP6189700B2 (ja) ウエーハの加工方法
TWI713976B (zh) 處理晶圓的方法
TWI703625B (zh) 晶圓的加工方法
TWI655744B (zh) 積層元件的製造方法
JP2011181822A (ja) 半導体装置の製造方法
JP6782617B2 (ja) 被加工物の固定方法、及び被加工物の加工方法
JP2018060905A (ja) 静電チャックプレート及び静電チャックプレートの製造方法
JP6385727B2 (ja) 貼り合わせウェーハ形成方法
WO2005083763A1 (ja) ウェハの転写方法
US10276423B2 (en) Method of manufacturing element chip
TW202314817A (zh) 元件晶片的製造方法
JP6298720B2 (ja) 積層デバイスの製造方法
JP2004273639A (ja) 半導体装置の製造方法
JP6991673B2 (ja) 剥離方法
JP2018133497A (ja) 素子チップの製造方法
JP2013219245A (ja) 半導体装置の製造方法
JP6616457B2 (ja) チップの接合方法及びチップの接合装置
TWM613900U (zh) 半導體加工裝置
TW201935549A (zh) 晶圓之加工方法
JP2022191941A (ja) デバイスの製造方法
JP2019169686A (ja) 素子チップの製造方法
TWI797532B (zh) 半導體加工的方法及裝置
JP7386745B2 (ja) デバイスチップの製造方法