TW201740476A - Electronic component mounting device and mounting method, and method for manufacturing package component - Google Patents
Electronic component mounting device and mounting method, and method for manufacturing package component Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips, lead frames
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
- H05K13/0404—Pick-and-place heads or apparatus, e.g. with jaws
- H05K13/0413—Pick-and-place heads or apparatus, e.g. with jaws with orientation of the component while holding it; Drive mechanisms for gripping tools, e.g. lifting, lowering or turning of gripping tools
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Supply And Installment Of Electrical Components (AREA)
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- Die Bonding (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
本發明之實施形態，係有關於電子零件之安裝裝置和安裝方法及封裝零件之製造方法。 Embodiments of the present invention relate to an electronic component mounting device, a mounting method, and a method of manufacturing a package component.
從先前技術起，使用像是CSP(Chip Size Package)或BGA(Ball Grid Array)等一般之中介基板(中繼用基板)所進行的半導體封裝之製造製程係為周知。除此之外，並不使用中介基板地而在並不分割成各個半導體晶片之晶圓的狀態下來進行封裝化的被稱作晶圓等級封裝(Wafer Level Package：WLP)之製造製程，係為周知。WLP，由於係並不使用中介基板，因此係有著能夠達成半導體封裝之薄型化以及能夠減低製造成本之優點。 From the prior art, a manufacturing process of a semiconductor package using a general interposer (relay substrate) such as a CSP (Chip Size Package) or a BGA (Ball Grid Array) is known. In addition, a manufacturing process called Wafer Level Package (WLP), in which the interposer is not used and is not divided into wafers of the respective semiconductor wafers, is used. I know. Since the WLP does not use an interposer substrate, it has the advantage of being able to achieve a thinner semiconductor package and a reduction in manufacturing cost.
在WLP中，以不會超出半導體晶片之被形成有電極墊之面上之區域的方式來在半導體晶片上形成包含半導體封裝之I/O端子的再配線層之所謂扇入晶圓等級封裝(fan in-WLP：FI-WLP)係為周知。又，近年來，係亦提案有超出半導體晶片之區域地來形成包含半導體封裝之I/O端子的再配線層之所謂扇出晶圓等級封裝(fan out- WLP：FO-WLP)。FO-WLP，由於係亦能夠對於在1個的封裝內搭載有RAM、快閃記憶體、CPU等之半導體晶片或二極體、電容器等之複數種類之電子零件的多晶片封裝(Multi Chip Package：MCP)作適用，因此係受到矚目。 In the WLP, a so-called fan-in wafer level package in which a rewiring layer including I/O terminals of a semiconductor package is formed on a semiconductor wafer without exceeding a region of the semiconductor wafer on which the electrode pads are formed ( Fan in-WLP: FI-WLP) is well known. Moreover, in recent years, there has been proposed a so-called fan-out wafer level package (fan out-) that extends beyond the area of the semiconductor wafer to form a rewiring layer including the I/O terminals of the semiconductor package. WLP: FO-WLP). In the case of the FO-WLP, a multi-chip package (Multi Chip Package) in which a plurality of types of electronic components such as a semiconductor chip such as a RAM, a flash memory, and a CPU, or a diode or a capacitor are mounted in one package is used. :MCP) is applicable, so it is attracting attention.
於此，所謂MCP，係如同上述一般，為在1個的封裝內搭載有複數種類之電子零件者。在此種MCP中，搭載於同一封裝中之電子零件的個別之安裝位置之偏移，由於係會相互地對於該封裝之電性特性造成影響，因此，對於各個的電子零件之安裝，係要求有高位置精確度。在前述之使用中介基板所進行的半導體封裝之製造製程中，由於係在中介基板上之各安裝區域處設置有位置辨識用之對位記號，因此，藉由適用針對各安裝區域之每一者而對於對位記號作辨識並將電子零件定位於安裝區域而進行安裝的方式(以下，稱作局部辨識方式)，係實現有高位置精確度之安裝。 Here, the MCP is generally mounted as a plurality of types of electronic components in one package. In such an MCP, the offset of the individual mounting positions of the electronic components mounted in the same package affects the electrical characteristics of the package, and therefore, the mounting of each electronic component is required. High position accuracy. In the manufacturing process of the semiconductor package using the interposer substrate described above, since the alignment marks for position identification are provided at the respective mounting areas on the interposer, each of the mounting areas is applied by The manner in which the alignment mark is recognized and the electronic component is positioned in the mounting area and mounted (hereinafter, referred to as the partial identification method) is to achieve installation with high positional accuracy.
在FO-WLP之製造製程中，首先係在支持基板上將複數之半導體晶片以空出有間隔的狀態來安裝為行列狀，之後，將半導體晶片間之空隙藉由樹脂來密封而將複數之半導體晶片一體化，藉由此，來形成如同藉由半導體製造製程所形成的晶圓一般地所作了成形之擬似晶圓。在此擬似晶圓上，形成用以設置I/O端子之再配線層。在將複數之半導體晶片作樹脂密封並一體化之後，支持基板係被剝下而被除去。然而，在想要藉由FO-WLP來製造 MCP的情況時，在支持基板上，由於係並不具備有像是能夠用來針對將半導體晶片作安裝之安裝區域的每一者而進行位置辨識一般之可進行畫像辨識的圖案，因此，適用像是對於中介基板所進行一般之局部辨識方式一事，係缺乏實用性。 In the manufacturing process of the FO-WLP, a plurality of semiconductor wafers are first mounted in a matrix on a support substrate in a spaced apart state, and then the spaces between the semiconductor wafers are sealed by a resin to be plural. The semiconductor wafer is integrated, thereby forming a pseudo wafer that is generally formed as a wafer formed by a semiconductor fabrication process. On this pseudo-wafer, a rewiring layer for setting I/O terminals is formed. After the plurality of semiconductor wafers are resin-sealed and integrated, the support substrate is peeled off and removed. However, I want to make it by FO-WLP. In the case of the MCP, the support substrate is not provided with a pattern that can be used for image recognition as well as position recognition for each of the mounting regions in which the semiconductor wafer is mounted. For example, the general local identification method for the interposer substrate lacks practicality.
在無法進行局部辨識的情況時，係成為適用藉由對於代表支持基板之外形位置或基板全體之位置的對位記號作辨識一事來辨識出支持基板之全體位置並依據此支持基板之全體位置來將半導體晶片安裝在支持基板上之各安裝區域處的方式(以下，稱作全域辨識方式)。又，在MCP中之半導體晶片之安裝位置的偏移，例如，在對於具備有標準性的電極墊之直徑(20μm)與形成節距(35μm)的半導體晶片作考慮的情況時，為了確保半導體晶片之端子和藉由在配線層所形成的端子之間之接觸面積，並避免相鄰接之端子間的接觸，係希望能夠抑制在±5μm以下。 In the case where local identification is not possible, it is possible to recognize the entire position of the support substrate by recognizing the alignment mark representing the position of the support substrate or the position of the entire substrate, and to support the entire position of the substrate. A method of mounting a semiconductor wafer on each mounting region on a support substrate (hereinafter referred to as a global identification method). Further, the offset of the mounting position of the semiconductor wafer in the MCP is, for example, a case where a diameter (20 μm) having a standard electrode pad and a semiconductor wafer having a pitch (35 μm) are considered. The contact area between the terminals of the wafer and the terminals formed in the wiring layer and the contact between the adjacent terminals are prevented from being suppressed to ±5 μm or less.
然而，在嘗試著將用以對於中介基板等之於各安裝區域之每一者處而具備有對位記號的基板來安裝半導體晶片之安裝裝置施加全域辨識方式之設定並直接使用在FO-WLP之製造製程中之後，其結果，係在安裝精確度中產生有超過±5μm之安裝誤差，而並無法將半導體晶片以良好的精確度來安裝在並未於各安裝區域之每一者處而設置有對位記號的支持基板上。因此，在適用有全域辨識方式之FO-WLP的製造製程中，係並不存在能夠以±5μm 以下之位置精確度來安裝半導體晶片之安裝裝置。 However, an attempt is made to apply a global identification method to a mounting device for mounting a semiconductor wafer with a substrate having a registration mark for each of the mounting regions of the interposer or the like, and to directly use the FO-WLP. After the manufacturing process, the result is an installation error of more than ±5 μm in mounting accuracy, and the semiconductor wafer cannot be mounted with good precision at each of the mounting areas. Set on the support substrate with the alignment mark. Therefore, in the manufacturing process of the FO-WLP to which the global identification method is applied, there is no such that it can be ±5 μm. The following positional accuracy is used to mount the semiconductor wafer mounting device.
若是僅需使安裝精確度提昇，則係可考慮對於在FO-WLP之製造製程中所使用的支持基板而與各安裝區域相對應地來預先設置對位記號，並適用局部辨識方式。然而，FO-WLP之支持基板，係為在形成了擬似晶圓之後會被從擬似晶圓而剝下並除去者，而並未被作為製品來使用。為了此種支持基板而設置用以形成記號之設備以及工程一事，不僅是會導致工程數量等之增加，並且在安裝工程中也會成為在每次安裝半導體晶片時均需要進行對於局部記號作辨識之動作，1個的半導體晶片之安裝工程時間也會增加。根據此點，局部辨識方式之適用，係會使半導體封裝之製造成本增加，並成為對於WLP之優點有所損害。 If it is only necessary to improve the mounting accuracy, it is conceivable to preliminarily set the alignment mark corresponding to each mounting area for the support substrate used in the manufacturing process of the FO-WLP, and to apply the partial identification method. However, the support substrate of the FO-WLP is peeled off and removed from the pseudo wafer after forming the pseudo wafer, and is not used as an article. In order to provide such a support substrate with equipment for forming marks and engineering, it is not only an increase in the number of projects, but also in the installation process, it is necessary to identify the local marks each time the semiconductor wafer is mounted. The operation time of one semiconductor wafer is also increased. According to this point, the application of the local identification method increases the manufacturing cost of the semiconductor package and is detrimental to the advantages of the WLP.
又，為了對於半導體晶片之安裝誤差採取對策，係提案有對於半導體晶片之安裝誤差作考慮而進行再配線層之形成之技術。此技術，係為在對於擬似晶圓而對再配線層之電路圖案進行曝光時，於曝光之前先預先對於擬似晶圓上之各半導體晶片的安裝誤差(從理想位置起之位置偏移)個別地作測定，並在使曝光用之雷射光對於各半導體晶片之每一者進行掃描時，基於曝光對象之半導體晶片的安裝誤差來對於在描繪資料中所包含的各電路圖案之位置資訊作修正者。此技術，對於在1個的半導體封裝中組入1個的半導體晶片之單晶封裝，係可作適用。然而，在MCP的情況時，由於電路圖案之描繪資料係以封 裝單位而被作成，因此，當產生有於同一封裝內之半導體晶片間之相對性之位置偏移的情況時，係並無法僅藉由對於所描繪的電路圖案之位置資訊進行修正一事來作對應。 Moreover, in order to take measures against the mounting error of the semiconductor wafer, a technique for forming a rewiring layer in consideration of a mounting error of the semiconductor wafer has been proposed. This technique is used to pre-exposure the mounting errors of the semiconductor wafers on the wafer (position offset from the ideal position) before exposure to the circuit pattern of the rewiring layer for the pseudo-wafer. The ground is measured, and when the laser light for exposure is scanned for each of the semiconductor wafers, the position information of each circuit pattern included in the drawing material is corrected based on the mounting error of the semiconductor wafer to be exposed. By. This technique is applicable to a single crystal package in which one semiconductor wafer is incorporated in one semiconductor package. However, in the case of the MCP, the data of the circuit pattern is sealed. The unit is fabricated. Therefore, when the positional displacement between the semiconductor wafers in the same package is generated, it is not possible to correct only by correcting the position information of the drawn circuit pattern. correspond.
進而，對於被使用在FO-WLP之製造製程中的安裝裝置，係要求能夠將半導體晶片之安裝時間縮短。亦即是，擬似晶圓上之再配線層之形成工程，通常係對於1枚的擬似晶圓而整批地進行，相對於此，對於支持基板之半導體晶片的安裝工程，則係對於1個1個的半導體晶片而分別實施。若是對此些之處理時間作考慮，則相較於再配線層之形成工程，由於係以半導體晶片之安裝工程會需要更長的時間，因此，係要求能夠將半導體晶片之安裝時間縮短。若是僅需要將安裝時間縮短，則係可考慮適用具備有複數之安裝頭的安裝裝置。然而，若是僅單純地適用複數之安裝頭，則起因於在各安裝頭之每一者處所產生的移動誤差之影響，半導體晶片之安裝精確度會更進一步降低。如此這般，對於被使用在FO-WLP之製造製程中的安裝裝置，係要求能夠同時達成半導體晶片等之電子零件的安裝精確度之提昇以及安裝時間之縮短。 Further, it is required for the mounting device used in the manufacturing process of the FO-WLP to shorten the mounting time of the semiconductor wafer. In other words, the formation of the rewiring layer on the wafer is usually performed in batches for one pseudo wafer, whereas the mounting process for the semiconductor wafer supporting the substrate is one. One semiconductor wafer is implemented separately. In consideration of such processing time, it is required to be able to shorten the mounting time of the semiconductor wafer because the mounting process of the semiconductor wafer takes longer than the formation of the rewiring layer. If it is only necessary to shorten the installation time, it is conceivable to apply a mounting device having a plurality of mounting heads. However, if only a plurality of mounting heads are simply applied, the mounting accuracy of the semiconductor wafer is further lowered due to the influence of the movement error generated at each of the mounting heads. In this way, for the mounting device used in the manufacturing process of the FO-WLP, it is required to simultaneously achieve the improvement of the mounting accuracy of the electronic components such as the semiconductor wafer and the shortening of the mounting time.
[專利文獻1]日本特開2008-041976號公報 [Patent Document 1] Japanese Patent Laid-Open Publication No. 2008-041976
[專利文獻2]日本特開2009-259917號公報 [Patent Document 2] Japanese Patent Laid-Open Publication No. 2009-259917
[專利文獻3]國際公開第2007/072714號 [Patent Document 3] International Publication No. 2007/072714
[專利文獻4]日本特開2013-058520號公報 [Patent Document 4] Japanese Patent Laid-Open Publication No. 2013-058520
本發明所欲解決之課題，係在於提供一種就算是在並未於各安裝區域之每一者處而形成有位置檢測用之記號等的圖案之支持基板的情況時，也能夠對於各安裝區域而將半導體晶片等之電子零件以良好精確度以及良好的效率來作安裝的電子零件之安裝裝置和安裝方法、以及適用有此種安裝方法之封裝零件之製造方法。 The problem to be solved by the present invention is to provide a support substrate in which a pattern such as a mark for position detection is not formed in each of the mounting regions. A mounting device and mounting method for an electronic component in which an electronic component such as a semiconductor wafer is mounted with good precision and good efficiency, and a manufacturing method of a package component to which the mounting method is applied.
實施形態之電子零件之安裝裝置，係具備有：平台部，係具備被載置有具有使電子零件被作安裝的複數之安裝區域的支持基板之平台、和以使前述複數之安裝區域依序被定位在一定之安裝位置處的方式來使前述平台移動之平台移動機構；和安裝部，係具備分別保持前述電子零件並安裝於前述支持基板之前述安裝區域處之第1以及第2安裝頭、和使保持了前述電子零件之前述第1以及第2安裝頭交互地移動至前述安裝位置處之安裝頭移動機構；和第1辨識部，係對於被載置於前述平台上之前述支持基板的全體位置作辨識；和第2辨識部，係對於被保持於前述第1或第2安裝頭處之前述電子零件的位置作辨識；和記憶部，係記憶對於由前述平台移動機構所致的前述平台之移動位置誤差作修正之修正資料；和控制部，係基於藉由前述第1辨識部所辨識出的前述支持基板之位置 資料和藉由前述第2辨識部所辨識出的前述電子零件之位置資料以及前述修正資料，來對於前述平台和前述第1以及第2安裝頭之移動作控制。 The mounting device for an electronic component according to the embodiment includes a platform portion having a platform on which a support substrate having a plurality of mounting regions for mounting electronic components is mounted, and a plurality of mounting regions are sequentially arranged a platform moving mechanism that moves the platform at a fixed mounting position; and a mounting portion that includes first and second mounting heads that respectively hold the electronic components and are mounted on the mounting area of the support substrate And a mounting head moving mechanism that moves the first and second mounting heads that hold the electronic component to the mounting position; and the first identifying unit is configured to support the support substrate placed on the platform The entire position is identified; and the second identification unit identifies the position of the electronic component held by the first or second mounting head; and the memory unit memorizes the movement of the platform by the platform a correction data for correcting a movement position error of the platform; and a control unit based on the support base identified by the first identification unit The location The data and the positional data of the electronic component identified by the second identification unit and the correction data are used to control movement of the platform and the first and second mounting heads.
實施形態之電子零件之安裝方法，係具備有：取得被載置有具有使電子零件被作安裝之複數之安裝區域的支持基板之平台之移動位置誤差，並使記憶部記憶對於前述移動位置誤差作修正的修正資料之工程；和將前述支持基板載置於前述平台上，並對於被載置於前述平台上之前述支持基板的全體位置作辨識之工程；和以一面基於藉由前述支持基板之位置辨識工程所得到的前述支持基板之位置資料和前述修正資料來對於前述平台之移動作修正一面使前述複數之安裝區域依序被定位在一定之安裝位置處的方式，來使前述平台移動之工程；和藉由第1以及第2安裝頭而交互接收前述電子零件，並對於被保持於前述第1或第2安裝頭處之前述電子零件處的位置作辨識，並且一面基於所辨識出的前述電子零件之位置資料來對於前述第1以及第2安裝頭之移動作修正一面使前述第1以及第2安裝頭交互地移動至前述安裝位置處，而藉由前述第1以及第2安裝頭來將前述電子零件交互地安裝至依序被定位於前述安裝位置處之前述安裝區域處之工程。 The method of mounting an electronic component according to the embodiment includes: obtaining a movement position error of a platform on which a support substrate having a plurality of mounting regions for mounting the electronic component is mounted, and causing the memory portion to memorize the movement position error And a project for modifying the correction data; and the supporting substrate is placed on the platform, and the entire position of the support substrate placed on the platform is recognized; and one side is based on the support substrate Positioning data of the support substrate obtained by the position recognition project and the correction data are used to correct the movement of the platform while the plurality of mounting areas are sequentially positioned at a certain mounting position to move the platform And receiving the electronic component by the first and second mounting heads, and identifying the position of the electronic component held at the first or second mounting head, and based on the identification The position information of the aforementioned electronic component is corrected for the movement of the first and second mounting heads The first and second mounting heads are alternately moved to the mounting position, and the electronic components are alternately mounted to the mounting area sequentially positioned at the mounting position by the first and second mounting heads. Engineering.
實施形態之封裝零件之安裝方法，係具備有：將電子零件安裝於在具有複數之安裝區域的支持基板處之前述複數之安裝區域的各者處之工程；和藉由將被安裝於前述複數之安裝區域處的前述電子零件整批地作密 封，來形成擬似晶圓之工程；和藉由在前述擬似晶圓之前述電子零件上形成再配線層，而製造封裝零件之工程。在實施形態之封裝零件之製造方法中的前述電子零件之安裝工程，係具備有：取得被載置有前述支持基板之平台之移動位置誤差，並使記憶部記憶對於前述移動位置誤差作修正的修正資料之工程；和將前述支持基板載置於前述平台上，並對於被載置於前述平台上之前述支持基板的全體位置作辨識之工程；和以一面基於藉由前述支持基板之位置辨識工程所得到的前述支持基板之位置資料和前述修正資料來對於前述平台之移動作修正一面使前述複數之安裝區域依序被定位在一定之安裝位置處的方式，來使前述平台移動之工程；和藉由第1以及第2安裝頭而交互接收前述電子零件，並對於被保持於前述第1或第2安裝頭處之前述電子零件處的位置作辨識，並且一面基於所辨識出的前述電子零件之位置資料來對於前述第1以及第2安裝頭之移動作修正一面使前述第1以及第2安裝頭交互地移動至前述安裝位置處，而藉由前述第1以及第2安裝頭來將前述電子零件交互地安裝至依序被定位於前述安裝位置處之前述安裝區域處之工程。 The mounting method of the package component of the embodiment includes: a project of mounting the electronic component on each of the plurality of mounting regions at the support substrate having a plurality of mounting regions; and by being mounted on the plural The aforementioned electronic parts at the installation area are densely packed in batches Sealing to form a pseudo-wafer-like project; and fabricating a packaged component by forming a rewiring layer on the aforementioned electronic component of the pseudo-wafer. In the method of manufacturing a packaged component according to the embodiment, the mounting of the electronic component includes: obtaining a movement position error of a platform on which the support substrate is placed, and causing the memory unit to correct the movement position error. Correcting the engineering of the data; and placing the support substrate on the platform and identifying the entire position of the support substrate placed on the platform; and using one side based on the position of the support substrate The position data of the support substrate obtained by the engineering and the correction data are used to correct the movement of the platform, and the plurality of installation areas are sequentially positioned at a certain installation position to move the platform; And receiving the electronic component by the first and second mounting heads, and identifying the position of the electronic component held at the first or second mounting head, and based on the recognized electronic component The positional data of the parts is corrected for the movement of the first and second mounting heads described above. And the second mounting head is alternately moved to the mounting position, and the electronic components are alternately mounted to the aforementioned mounting area at the aforementioned mounting position by the first and second mounting heads described above. .
1‧‧‧安裝裝置 1‧‧‧Installation device
10‧‧‧零件供給部 10‧‧‧Parts Supply Department
11‧‧‧晶圓環 11‧‧‧ wafer ring
12‧‧‧晶圓環支持器 12‧‧‧ wafer ring holder
13‧‧‧第1攝像機 13‧‧‧1st camera
20‧‧‧平台部 20‧‧‧ Platform Department
21‧‧‧平台 21‧‧‧ platform
22‧‧‧第2攝像機 22‧‧‧2nd camera
23‧‧‧第4攝像機 23‧‧‧4th camera
30‧‧‧基板搬送部 30‧‧‧Substrate transport department
40、40A、40B‧‧‧移載部 40, 40A, 40B‧‧‧Transportation Department
43‧‧‧反轉機構 43‧‧‧Reversal mechanism
44‧‧‧吸附噴嘴 44‧‧‧Adsorption nozzle
47‧‧‧反轉臂 47‧‧‧Reverse arm
50、50A、50B‧‧‧安裝部 50, 50A, 50B‧‧‧ Installation Department
51‧‧‧支持框 51‧‧‧Support box
52‧‧‧X方向移動區塊 52‧‧‧X direction moving block
53‧‧‧Y方向移動裝置 53‧‧‧Y direction mobile device
55‧‧‧安裝頭 55‧‧‧Installation head
56‧‧‧安裝工具 56‧‧‧Installation tools
60‧‧‧控制部 60‧‧‧Control Department
61‧‧‧記憶部 61‧‧‧Memory Department
W‧‧‧支持基板 W‧‧‧Support substrate
t‧‧‧半導體晶片 t‧‧‧Semiconductor wafer
[圖1]係為對於實施形態之安裝裝置作展示之平面圖。 Fig. 1 is a plan view showing the mounting device of the embodiment.
[圖2]係為對於實施形態之安裝裝置作展示之正面圖。 Fig. 2 is a front view showing the mounting device of the embodiment.
[圖3]係為對於實施形態之安裝裝置作展示之右側面圖。 Fig. 3 is a right side view showing the mounting device of the embodiment.
[圖4]係為對於實施形態之安裝裝置的一部分藉由2點鍊線來作展示之平面圖，並為用以對於支持基板之搬入、搬出狀態作說明之圖。 FIG. 4 is a plan view showing a part of the mounting apparatus according to the embodiment by a two-dot chain line, and is a view for explaining the loading and unloading state of the support substrate.
[圖5]係為將實施形態之安裝裝置的一部分省略而作展示之正面圖，並為用以對於電子零件之位置辨識狀態作說明之圖。 Fig. 5 is a front view showing a part of the mounting device of the embodiment omitted, and is a view for explaining the position recognition state of the electronic component.
[圖6]係為對於實施形態之安裝裝置作展示之區塊圖。 Fig. 6 is a block diagram showing the mounting device of the embodiment.
[圖7A]係為對於對實施形態之安裝裝置供給半導體晶片的晶圓環作展示之平面圖。 Fig. 7A is a plan view showing a wafer ring for supplying a semiconductor wafer to the mounting device of the embodiment.
[圖7B]係為沿著圖7A之X-X線的晶圓環之剖面圖。 Fig. 7B is a cross-sectional view of the wafer ring taken along the line X-X of Fig. 7A.
[圖8]係為對於在實施形態之安裝裝置中的基板平台之校正工程之準備工程作展示之圖。 Fig. 8 is a view showing a preparation work for a calibration project of a substrate platform in the mounting device of the embodiment.
[圖9]係為對於在實施形態之安裝裝置中的基板平台之校正工程作展示之圖。 Fig. 9 is a view showing a calibration process of a substrate platform in the mounting apparatus of the embodiment.
[圖10]係為對於在實施形態之安裝裝置中的基板平台之移動位置誤差的修正方法作說明之圖。 Fig. 10 is a view for explaining a method of correcting a movement position error of a substrate platform in the mounting apparatus of the embodiment.
[圖11]係為對於在實施形態之安裝裝置中的基板平台之位置偏移的修正方法作說明之圖。 Fig. 11 is a view for explaining a method of correcting the positional deviation of the substrate stage in the mounting apparatus of the embodiment.
[圖12]係為對於使用實施形態之安裝裝置而被安裝在1個的安裝區域中之電子零件的其中一例作展示之平面圖。 Fig. 12 is a plan view showing an example of an electronic component mounted in one mounting region using the mounting device of the embodiment.
[圖13]係為對於使用實施例1以及比較例1之安裝裝置而將半導體晶片作了安裝的支持基板作展示之平面圖。 Fig. 13 is a plan view showing a support substrate on which a semiconductor wafer is mounted using the mounting devices of the first embodiment and the comparative example 1.
[圖14]係為對於實施形態之封裝零件的製造工程作展示之流程圖。 Fig. 14 is a flow chart showing the manufacturing process of the packaged component of the embodiment.
以下，參考圖面，針對實施形態之電子零件之安裝裝置和安裝方法作說明。圖面，係為作示意性展示者，關於厚度和平面尺寸間之關係、各部之厚度之比例等，係會有與實物相異的情況。在說明中之代表上下之方向的用語，在並未特別明記的情況時，係指在將後述之支持基板之電子零件的安裝面設為上的情況時之相對性的方向，代表左右之方向的用語，在並未特別明記的情況時，係指以圖2之正面圖作為基準之方向。 Hereinafter, the mounting device and the mounting method of the electronic component according to the embodiment will be described with reference to the drawings. The drawings are for illustrative purposes, and the relationship between the thickness and the plane size, the ratio of the thickness of each part, etc., may be different from the actual one. In the case where the direction of the upper and lower directions in the description is not particularly indicated, the direction of the relative position when the mounting surface of the electronic component of the support substrate described later is set is the direction of the left and right directions. The terminology, when not specifically stated, refers to the direction in which the front view of Figure 2 is used as a reference.
圖1，係為對於由實施形態所致之電子零件之安裝裝置的構成作展示之平面圖，圖2，係為圖1中所示之安裝裝置之正面圖，圖3，係為圖1中所示之安裝裝置之右側面圖。在圖1以及圖2中，在被配置在安裝裝置1之左右 處的移載部40A、40B和同樣地被配置在左右處的安裝部50A、50B中，係將左側之移載部40A和安裝部50A以2點鍊線來作展示，並將右側之移載部40B和安裝部50B以實線來作展示。圖4，係為在與圖1相同之平面圖中，將左右之安裝部50A、50B以2點鍊線來作展示，而用以對於支持基板W之搬入、搬出狀態作說明之圖。圖5，係為在與圖2相同之正面圖中，將左側之移載部40A和安裝部50A之圖示省略，而用以對於辨識攝像機之狀態作說明之圖。圖6，係為對於由實施形態所致之安裝裝置的構成作展示之區塊圖。圖7A以及圖7B，係為對於供給作為電子零件的半導體晶片之晶圓環作展示之圖。在此些之途中，係相對於安裝裝置1，而將左右方向設為X方向，並將前後方向設為Y方向，且將上下方向設為Z方向。 1 is a plan view showing a configuration of an electronic component mounting device according to an embodiment, and FIG. 2 is a front view of the mounting device shown in FIG. 1, and FIG. 3 is a view of FIG. The right side view of the mounting device is shown. In FIG. 1 and FIG. 2, it is disposed on the left and right of the mounting device 1. The transfer portions 40A and 40B at the same position and the mounting portions 50A and 50B disposed at the left and right are similarly displayed on the left side transfer portion 40A and the mounting portion 50A by a two-dot chain line, and the right side is shifted. The carrier portion 40B and the mounting portion 50B are shown in solid lines. 4 is a view showing a state in which the mounting portions 50A and 50B on the left and right sides are displayed as a two-dot chain line in the same plan view as that of FIG. 1, and the loading and unloading state of the support substrate W is described. Fig. 5 is a view similar to Fig. 2, in which the illustration of the transfer portion 40A on the left side and the attachment portion 50A is omitted, and the state of the recognition camera is explained. Fig. 6 is a block diagram showing the configuration of the mounting device by the embodiment. 7A and 7B are diagrams showing a wafer ring for supplying a semiconductor wafer as an electronic component. In the meantime, the left-right direction is the X direction with respect to the mounting device 1, and the front-rear direction is the Y direction, and the vertical direction is the Z direction.
圖1~圖6中所示之安裝裝置1，係具備有供給半導體晶片t等之電子零件的零件供給部10、和具備被載置有支持基板W之平台21的平台部20、和對於平台21而將支持基板W作搬入以及搬出之基板搬送部30、和從零件供給部10而取出半導體晶片t之一對之移載部40、和接收一對之移載部40所取出的半導體晶片t並安裝於載置在平台21上之支持基板W處的一對之安裝部50、以及對於各部之動作進行控制之控制部60。 The mounting device 1 shown in FIGS. 1 to 6 includes a component supply unit 10 that supplies electronic components such as a semiconductor wafer t, a platform portion 20 including a stage 21 on which the support substrate W is placed, and a platform. 21, the substrate transfer unit 30 for loading and unloading the support substrate W, and the transfer unit 40 for taking out one of the semiconductor wafers t from the component supply unit 10, and the semiconductor wafer taken out by the pair of transfer units 40 And a pair of mounting portions 50 mounted on the support substrate W placed on the stage 21, and a control unit 60 for controlling the operation of each unit.
零件供給部10，係具備將貼著有被個片化為各個的半導體晶片t之半導體晶圓T的樹脂薄片S作保持之晶圓環11(圖7A、7B)、和將晶圓環11可自由裝卸 地作保持並能夠藉由未圖示之XY移動機構而在XY方向上移動之晶圓環支持器12、和對於被貼著在晶圓環11上之半導體晶片t進行攝像之第1攝像機13、和在藉由移載部40而將半導體晶片t取出時將被取出的半導體晶片t從晶圓環11之下側而上突的上突機構(未圖示)。 The component supply unit 10 includes a wafer ring 11 (FIGS. 7A and 7B) for holding a resin sheet S on which a semiconductor wafer T of a semiconductor wafer t is diced, and a wafer ring 11 Free loading and unloading The wafer ring holder 12 that can be moved in the XY direction by an XY moving mechanism (not shown) and the first camera 13 that images the semiconductor wafer t that is attached to the wafer ring 11 And an upper protrusion mechanism (not shown) that protrudes from the lower side of the wafer ring 11 when the semiconductor wafer t is taken out by the transfer unit 40.
上突機構，係為固定性地設置在由移載部40所致之半導體晶片t之取出位置處。晶圓環11上之各半導體晶片t，係藉由晶圓環支持器12而成為依序被定位在取出位置處。第1攝像機13，係被配置在取出位置之正上方，並用以對於被定位在取出位置處之半導體晶片t進行攝像而對於晶片位置作辨識。 The upper protruding mechanism is fixedly disposed at the take-out position of the semiconductor wafer t caused by the transfer portion 40. Each of the semiconductor wafers t on the wafer ring 11 is sequentially positioned at the take-out position by the wafer ring holder 12. The first camera 13 is disposed directly above the take-out position and is used to recognize the position of the wafer for imaging the semiconductor wafer t positioned at the take-out position.
零件供給部10，係更進而具備有未圖示之晶圓環11之交換裝置。交換裝置，係具備有被設置在安裝裝置1之前面側處的收容部(在上下方向具備有複數之收容晶圓環11之溝部者，亦稱作艙匣(magazine))、和晶圓環搬送部。交換裝置，係將未使用之晶圓環11供給至晶圓環支持器12上，並將結束了半導體晶片之取出的晶圓環11收容在收容部中，再將新的晶圓環供給至晶圓環支持器12處。 The component supply unit 10 further includes an exchange device including a wafer ring 11 (not shown). The exchange device is provided with a housing portion (a groove portion for accommodating the wafer ring 11 in a vertical direction, which is also called a magazine), and a wafer ring provided on the front surface side of the mounting device 1 Transport department. In the switching device, the unused wafer ring 11 is supplied to the wafer ring holder 12, and the wafer ring 11 from which the semiconductor wafer is taken out is accommodated in the housing portion, and a new wafer ring is supplied thereto. The wafer ring holder 12 is located.
被安裝於支持基板上之電子零件，係並不被限定於1種類的半導體晶片t，亦可為複數種類之半導體晶片，亦可為半導體晶片和二極體以及電容器等。實施形態之安裝裝置1，在將包含半導體晶片、二極體、電容器等之複數種類之電子零件安裝於支持基板W上並製造 MCP時，係可合適作使用。作為MCP之構成例，係可列舉出具備有複數種類之半導體晶片者、具備有1種類之半導體晶片和二極體及電容器等者、乃至於具備有複數種類之半導體晶片和二極體及電容器等者。 The electronic component mounted on the support substrate is not limited to one type of semiconductor wafer t, and may be a plurality of types of semiconductor wafers, and may be a semiconductor wafer, a diode, a capacitor, or the like. In the mounting device 1 of the embodiment, a plurality of types of electronic components including a semiconductor wafer, a diode, a capacitor, and the like are mounted on a support substrate W and manufactured. In the case of MCP, it can be used as appropriate. Examples of the configuration of the MCP include those having a plurality of types of semiconductor wafers, one type of semiconductor wafer, a diode, a capacitor, and the like, and a plurality of types of semiconductor wafers, diodes, and capacitors. And so on.
零件供給部10，係並不被限定於使用貼著有被作了個片化的半導體晶圓T之晶圓環11的晶片供給機構。在零件供給部10處，例如係亦可適用使用有帶式送料機或托盤的晶片供給機構。所謂帶式送料機，係為將在帶狀之樹脂薄片上連續地形成有凹狀(壓花狀)之口袋的載體帶(亦被稱作壓花載體帶)的各口袋中所收容之半導體晶片t一個一個地作供給者。載體帶，係以將收容有半導體晶片t之口袋藉由覆蓋帶而從上方來加蓋並被捲繞在捲盤上的狀態而被作收容。又，係構成為將載體帶從此捲盤而送出並一面將覆蓋帶剝離一面使各口袋依序位置於半導體晶片t之取出位置處。 The component supply unit 10 is not limited to the wafer supply mechanism using the wafer ring 11 to which the sliced semiconductor wafer T is attached. At the component supply unit 10, for example, a wafer supply mechanism using a tape feeder or a tray can be applied. The tape feeder is a semiconductor housed in each pocket of a carrier tape (also referred to as an embossed carrier tape) in which a concave (embossed) pocket is continuously formed on a strip-shaped resin sheet. The wafers t are supplied one by one as suppliers. The carrier tape is housed in a state in which a pocket in which the semiconductor wafer t is housed is covered by a cover tape and wound up on a reel. Further, the carrier tape is sent out from the reel and the cover tape is peeled off while the pockets are sequentially positioned at the take-out position of the semiconductor wafer t.
在使用此種帶式送料機的情況時，係可設為從1個的帶式送料機來藉由左右之移載部40A、40B而交互地將半導體晶片t拾起，亦可設為將2個的帶式送料機作並排配置，並藉由左側之移載部40A來從左側之帶式送料機而將半導體晶片t拾起，並且藉由右側之移載部401B來從右側之帶式送料機而將半導體晶片t拾起。進而，係亦可構成為能夠將收容有品種相異之半導體晶片t的帶式送料機作複數種類之裝備，並構成為能夠將複數種類之半導體晶片t選擇性地作供給。此種構成，在對於1個的支 持基板W而安裝複數種類之半導體晶片t的情況時，係為有效。 In the case of using such a tape feeder, it is possible to alternately pick up the semiconductor wafer t by the left and right transfer portions 40A and 40B from one tape feeder, or to Two belt feeders are arranged side by side, and the semiconductor wafer t is picked up from the belt feeder on the left side by the transfer portion 40A on the left side, and is taken from the right side by the transfer portion 401B on the right side. The semiconductor wafer t is picked up by the feeder. Further, it is also possible to configure a tape feeder that accommodates semiconductor wafers t of different types into a plurality of types of equipment, and to selectively supply a plurality of types of semiconductor wafers t. This kind of composition, for one branch It is effective when a plurality of types of semiconductor wafers t are mounted while holding the substrate W.
又，係亦可將由晶圓環11所致之半導體晶片t的供給和由帶式送料機所致之半導體晶片t的供給之雙方均作設置。具體而言，係在晶圓環支持器12之左側處，配置左側之移載部40A用之帶式送料機，並在右側處，配置右側之移載部40B用之帶式送料機。若是在各移載部40A、40B處設置XY移動裝置，並構成為能夠使移載部40A、40B之移載噴嘴移動至從晶圓環11上而取出半導體晶片t之取出位置和從帶式送料機而取出半導體晶片之取出位置處，則為理想。 Further, both the supply of the semiconductor wafer t by the wafer ring 11 and the supply of the semiconductor wafer t by the tape feeder may be provided. Specifically, a belt feeder for the transfer unit 40A on the left side is disposed on the left side of the wafer ring holder 12, and a belt feeder for the transfer unit 40B on the right side is disposed on the right side. When the XY moving device is provided in each of the transfer portions 40A and 40B, the transfer nozzles of the transfer portions 40A and 40B can be moved to the take-out position and the tape take-out position of the semiconductor wafer t from the wafer ring 11. It is preferable that the feeder takes out the removal position of the semiconductor wafer.
平台部20，係具備有：被載置有具備複數之安裝區域的支持基板W之平台21、和使平台21在XY方向上移動之未圖示之XY移動機構。XY移動機構，係以使被載置在平台21上之支持基板W的各安裝區域會依序被定位於後續所詳細敘述之一定之安裝位置處的方式，來使平台21移動。平台21，係構成為能夠藉由未圖示之吸引吸附機構來將被作了載置的支持基板W作吸附保持。在平台21之上方，係被配置有用以對於支持基板W進行攝像之第2攝像機22。第2攝像機22，例如係為對於被設置在支持基板W處之全域記號進行攝像並對於支持基板W之全體位置作辨識者，並為作為第1辨識部而起作用者。支持基板W之全體位置，係亦可構成為藉由第2攝像機22來對於支持基板W之外形作攝像並進行辨識。 The platform unit 20 includes a stage 21 on which a support substrate W having a plurality of mounting areas is placed, and an XY moving mechanism (not shown) that moves the stage 21 in the XY direction. The XY moving mechanism moves the stage 21 such that each mounting area of the support substrate W placed on the stage 21 is sequentially positioned at a predetermined mounting position as described later in detail. The stage 21 is configured to be capable of holding and holding the supported support substrate W by a suction suction mechanism (not shown). Above the stage 21, a second camera 22 for imaging the support substrate W is disposed. The second camera 22 is, for example, a person who images the entire mark provided on the support substrate W and recognizes the entire position of the support substrate W, and functions as the first identification unit. The entire position of the support substrate W may be configured to be imaged and recognized by the second camera 22 in addition to the support substrate W.
被載置在平台21上之支持基板W，例如係為用以形成在FO-WLP之製造時所適用的擬似晶圓之基板，並由玻璃基板、矽基板、不鏽鋼等之金屬基板等所成。所謂擬似晶圓，係為對於將被作了個片化的複數之半導體晶片等之電子零件平面性地作了配置者，而將電子零件間作樹脂密封並成形為1枚之板狀的狀態之物。故而，在擬似晶圓之形成中所使用的支持基板W之形狀，係並不被限定於圓形，而亦可為四角形或其以外之多角形、橢圓形等，其之形狀係並未特別作限定。支持基板W，較理想，係為如同上述一般之當在FO-WLP製程中而製造MCP時所使用的基板，亦即是係為在各安裝區域處被安裝有複數之半導體晶片和電容器等的電子零件之基板。 The support substrate W placed on the stage 21 is, for example, a substrate for forming a wafer to be used in the manufacture of the FO-WLP, and is formed of a metal substrate such as a glass substrate, a germanium substrate, or a stainless steel. . The pseudo-wafer is a flat state in which electronic components such as a plurality of semiconductor wafers to be sliced are planarly arranged, and the electronic components are sealed by resin and formed into a single plate shape. Things. Therefore, the shape of the support substrate W used in the formation of the pseudo-wafer is not limited to a circular shape, but may be a square shape or a polygonal shape other than the polygonal shape, an elliptical shape, or the like, and the shape thereof is not particularly limited. Limited. The support substrate W is preferably a substrate used when the MCP is manufactured in the FO-WLP process as described above, that is, a plurality of semiconductor wafers and capacitors are mounted at each mounting region. A substrate for electronic parts.
支持基板W，係具備被安裝有半導體晶片t等的電子零件之複數之安裝區域。但是，複數之安裝區域，係為在支持基板W上所被假想性地設定者，而並未被形成有代表各安裝區域之記號或圖案等。支持基板W，係亦可具備有代表基板全體之位置的全域辨識用之對位記號，但是，係並未具備有代表各個的安裝區域之位置之局部辨識用之對位記號。所謂全域辨識方式，係指當在支持基板之複數之安裝區域處分別安裝電子零件時，藉由一次的基板之位置檢測來對於該基板上之複數之安裝區域而進行電子零件之安裝的方式。所謂局部辨識方式，係指當在支持基板之複數之安裝區域處分別安裝電子零件時，於安裝各個電子零件時均一次一次地進行電子零件之安裝區域 之位置檢測的方式。 The support substrate W is provided with a plurality of mounting regions in which electronic components such as semiconductor wafers t are mounted. However, the plurality of mounting regions are imaginarily set on the support substrate W, and marks or patterns representing the respective mounting regions are not formed. The support substrate W may have a alignment mark for global identification that represents the position of the entire substrate. However, the alignment mark for local identification of the position of each of the mounting regions is not provided. The global identification method refers to a method of mounting electronic components on a plurality of mounting areas on the substrate by detecting the position of the substrate once when the electronic components are mounted in a plurality of mounting areas of the supporting substrate. The so-called local identification method means that when the electronic components are separately mounted at a plurality of mounting areas of the supporting substrate, the mounting area of the electronic components is performed once and for all when the electronic components are mounted. The way the position is detected.
基板搬送部30，係具備有搬入輸送帶31、和搬出輸送帶32、和在搬入輸送帶31與平台21之間而進行支持基板W之遞交的第1遞交部33、和在平台21與搬出輸送帶32之間而進行支持基板W之遞交的第2遞交部34、和從搬入輸送帶31之配置位置起而至搬出輸送帶32之配置位置地被作設置並將第1以及第2遞交部33、34可移動地作支持之導引部35。第1以及第2遞交部33、34，係分別藉由以旋轉馬達所驅動的正時皮帶(均未圖示)而構成為能夠沿著導引部35來個別地移動。但是，遞交部33、34之驅動，係並不被限定於正時皮帶，而亦可藉由線性馬達等之其他的驅動裝置來實施。 The substrate transport unit 30 includes a carry-in conveyor 31 and a carry-out conveyor 32, and a first delivery unit 33 that carries the support substrate W between the transport conveyor 31 and the platform 21, and the platform 21 and the carry-out The second delivery unit 34 that supports the delivery of the support substrate W between the conveyor belts 32 and the arrangement position from the placement position of the transport conveyance belt 31 to the position where the transport conveyance belt 32 is carried out is set and the first and second delivery are performed. The portions 33, 34 are movably supported as guides 35. Each of the first and second delivery units 33 and 34 is configured to be movable along the guide unit 35 by a timing belt (none of which is shown) driven by a rotary motor. However, the driving of the delivery units 33 and 34 is not limited to the timing belt, but may be implemented by another driving device such as a linear motor.
第1以及第2遞交部33、34，係具備有相同之構成，並具備有沿著導引部35而移動之可動部33a、34a，和在可動部33a、34a處而被可上下移動地作設置之水平臂33b、34b，和在水平臂33b、34b處以將支持基板W從上側起來吸引吸附並作保持的方式而被設置之4個的吸附噴嘴33c、34c。吸附噴嘴33c、34c，係以能夠將支持基板W之外緣部分的並未被安裝有半導體晶片t之空餘部分作吸附的方式，而被固定在水平臂33b、34b處。 The first and second delivery units 33 and 34 have the same configuration, and include movable portions 33a and 34a that move along the guide portion 35, and are movable up and down at the movable portions 33a and 34a. The horizontal arms 33b and 34b are provided, and four adsorption nozzles 33c and 34c are provided at the horizontal arms 33b and 34b so as to attract and hold the support substrate W from the upper side. The adsorption nozzles 33c and 34c are fixed to the horizontal arms 33b and 34b so as to be capable of adsorbing the vacant portion of the outer edge portion of the support substrate W to which the semiconductor wafer t is not attached.
一對之移載部40，係為將2個的移載部40A、40B以作了左右反轉的狀態來作配置者，2個的移載部40A、40B，係除了作左右反轉以外，為具備有相同之構成。參考圖1、圖2以及圖3，對於右側之移載部 40B之構成作說明。移載部40B，係具備有升降裝置41、和在升降裝置41處而被可上下移動地作了支持的臂體42、和被設置在臂體42之前端部處的反轉機構43、以及被設置在反轉機構43處之吸附噴嘴(移載噴嘴)44。升降裝置41，係具備有旋轉馬達45，並透過未圖示之滾珠螺桿機構而使臂體42上下移動。 In the pair of transfer units 40, the two transfer units 40A and 40B are arranged in a left-right reversed state, and the two transfer units 40A and 40B are not limited to each other. , in order to have the same composition. Referring to Figure 1, Figure 2 and Figure 3, for the transfer part on the right side The composition of 40B is explained. The transfer unit 40B includes an elevating device 41, an arm body 42 supported by the elevating device 41 so as to be movable up and down, and an inverting mechanism 43 provided at an end portion of the arm body 42 and The adsorption nozzle (transfer nozzle) 44 is provided at the reversing mechanism 43. The lifting device 41 is provided with a rotary motor 45, and the arm body 42 is moved up and down by a ball screw mechanism (not shown).
反轉機構43，係在臂體42之前端部處而被固定於裝置前側之側面處，並具備有使朝向Y方向延伸之旋轉軸貫通臂體42地而被作了設置的旋轉驅動部46、和被與驅動部46之旋轉軸作了連結的反轉臂47。反轉臂47，係在使其之前端部朝向裝置左方向的水平狀態和朝向右方向的水平狀態之間，以於上側而描繪出圓弧的軌跡來作180度之反轉。吸附噴嘴44，係以在反轉臂47被設為朝向左方向之水平狀態的狀態下會使將半導體晶片t作真空吸附之吸附面朝向下方的方式來安裝在反轉臂47處。左側之移載部40A，除了各部之配置係作左右反轉以外，係具備有相同之構成。 The reversing mechanism 43 is fixed to the side surface of the front side of the apparatus at the front end of the arm body 42, and is provided with a rotation driving unit 46 that is provided to allow the rotating shaft extending in the Y direction to pass through the arm body 42. And an inversion arm 47 coupled to the rotating shaft of the driving portion 46. The reverse arm 47 is formed such that the trajectory of the circular arc is drawn on the upper side between the horizontal state in which the front end portion faces the left direction of the device and the horizontal state in the right direction, and is reversed by 180 degrees. The adsorption nozzle 44 is attached to the reverse arm 47 so that the adsorption surface for vacuum-adsorbing the semiconductor wafer t faces downward in a state where the reverse arm 47 is horizontally oriented in the left direction. The transfer unit 40A on the left side has the same configuration except that the arrangement of the respective units is reversed left and right.
左右之移載部40A、40B，係配置為在以使吸附噴嘴44之吸附面朝向下方的方式來使反轉臂47作了旋轉的狀態時吸附噴嘴44之吸附面會位置於上突機構之正上方(取出位置)處一般的位置關係。因此，若是以使兩移載部40A、40B之吸附噴嘴44會同時地位置於取出位置處的方式而作反轉，則吸附噴嘴44彼此(反轉臂47彼此)係會相互碰撞。故而，吸附噴嘴44，係將以使吸附 面朝向上方的方式來作了反轉的狀態作為待機狀態，並以會從此待機狀態起來交互地移動至取出位置處的方式而被作控制。 The left and right transfer portions 40A and 40B are arranged such that the adsorption surface of the adsorption nozzle 44 is positioned in the upper protrusion mechanism when the reverse rotation arm 47 is rotated so that the adsorption surface of the adsorption nozzle 44 faces downward. The general positional relationship at the top (removal position). Therefore, if the adsorption nozzles 44 of the two transfer portions 40A and 40B are simultaneously placed at the take-out position, the adsorption nozzles 44 (the reverse arms 47) collide with each other. Therefore, the adsorption nozzle 44 will be used for adsorption. The state in which the face is facing upward is reversed as a standby state, and is controlled in such a manner that it moves from the standby state to the take-out position interactively.
一對之安裝部50，係與一對之移載部40同樣的，為將具備有相同構成之2個的安裝部50A、50B以作了左右反轉的狀態來作配置者。參考圖1、圖2以及圖3，對於右側之安裝部50B之構成作說明。安裝部50B，係具備有：在側面觀察時呈門型之支持框51、和在支持框51上可沿著X方向移動地而被作了支持之X方向移動塊52、和被設置在X方向移動塊52之左側的側面處之Y方向移動裝置53、和在Y方向移動裝置53處可沿著Y方向移動地而被作了設置之可動體54、以及在可動體54處可朝向上下方向移動地而被作了設置的安裝頭55。在安裝頭55之下端，係被設置有安裝工具56，該安裝工具56，係於下面具備有半導體晶片t之保持面。安裝工具56，係構成為能夠配合於半導體晶片t之品種(特別是大小)來進行交換。安裝部50B，係亦可具備有安裝工具56之自動交換器。 In the same manner as the pair of transfer portions 40, the pair of attachment portions 50 are arranged such that the attachment portions 50A and 50B having the same configuration are reversed left and right. The configuration of the attachment portion 50B on the right side will be described with reference to Figs. 1, 2, and 3. The mounting portion 50B is provided with a support frame 51 having a gate shape when viewed from the side, and an X-direction moving block 52 supported by the support frame 51 so as to be movable in the X direction, and is disposed at the X. The Y-direction moving means 53 at the side of the left side of the direction moving block 52, and the movable body 54 which is disposed in the Y-direction moving means 53 so as to be movable in the Y direction, and the movable body 54 are movable toward the upper and lower sides A mounting head 55 that is disposed in a direction to move. At the lower end of the mounting head 55, a mounting tool 56 is provided, which is provided with a holding surface of the semiconductor wafer t below. The mounting tool 56 is configured to be interchangeable in accordance with the type (especially size) of the semiconductor wafer t. The mounting portion 50B may be provided with an automatic exchanger having an attachment tool 56.
在安裝部50之框材料中，一般而言係使用有鋁等之金屬材料。但是，係會有起因於由驅動部之發熱所導致的鋁等之熱膨脹而造成在安裝頭55之移動位置中產生有偏移之虞。為了盡可能地減少此種起因於熱膨脹所造成的位置偏移，係以使用鋁等之金屬材料與陶瓷之間之複合材料為理想。具體而言，較理想，係將X方向移動塊 52和Y方向移動裝置53之本體，藉由鋁和陶瓷之間之複合材料等來構成。作為鋁與陶瓷之間之複合材料，例如係可列舉出鋁和碳化矽(SiC)之間之複合材料。若藉由此種複合材料，則例如係可相較於鋁而將熱膨脹係數減低至60%程度。 In the frame material of the mounting portion 50, a metal material such as aluminum is generally used. However, there is a possibility that an offset occurs in the moving position of the mounting head 55 due to thermal expansion of aluminum or the like due to heat generation of the driving portion. In order to reduce such a positional displacement caused by thermal expansion as much as possible, it is preferable to use a composite material between a metal material such as aluminum and a ceramic. Specifically, it is desirable to move the block in the X direction. The body of the 52 and Y-direction moving device 53 is constituted by a composite material between aluminum and ceramics or the like. As a composite material between aluminum and ceramics, for example, a composite material between aluminum and tantalum carbide (SiC) can be cited. If such a composite material is used, for example, the coefficient of thermal expansion can be reduced to about 60% compared to aluminum.
進而，係亦可預先對於伴隨著裝置之稼動所導致的框材料之熱膨脹量作測定，並構成為在安裝頭55之修正資料中亦對於此熱膨脹量作考慮。由安裝部50之框材料之熱膨脹所致的修正資料，例如係如同下述一般地來取得。首先，在安裝頭55之安裝工具56之近旁處，預先設置對於安裝工具56之位置作確認的靶材(未圖示)，並藉由後述之第3攝像機57，來對於位置在半導體晶片t之接收位置處的靶材之位置作辨識。接著，使安裝頭55一直移動至安裝位置處，並藉由第2攝像機22來對於此時之靶材的位置作辨識。在使安裝頭55從安裝位置而朝向安裝位置作特定次數的移動之後，再度實施此種靶材之位置辨識。藉由此種操作，來取得起因於伴隨著裝置之稼動而導致的框材料之熱膨脹所造成的安裝頭55之位置偏移量。基於安裝頭55之位置偏移量所得到的修正資料，係在後述之安裝頭55的位置修正時會被作考慮。 Further, the amount of thermal expansion of the frame material caused by the movement of the device may be measured in advance, and the amount of thermal expansion may be considered in the correction data of the mounting head 55. The correction data caused by the thermal expansion of the frame material of the mounting portion 50 is generally obtained, for example, as follows. First, a target (not shown) for confirming the position of the mounting tool 56 is provided in the vicinity of the mounting tool 56 of the mounting head 55, and is positioned on the semiconductor wafer by a third camera 57, which will be described later. The position of the target at the receiving location is identified. Next, the mounting head 55 is moved all the way to the mounting position, and the position of the target at this time is recognized by the second camera 22. After the mounting head 55 is moved a certain number of times from the mounting position toward the mounting position, the position recognition of the target is performed again. By such an operation, the amount of positional displacement of the mounting head 55 caused by the thermal expansion of the frame material accompanying the movement of the device is obtained. The correction data obtained based on the positional shift amount of the mounting head 55 is considered in the position correction of the mounting head 55 to be described later.
X方向移動塊52，係經由X方向導引構件52a而被安裝在支持框51上，並成為能夠藉由被馬達所驅動的滾珠螺桿機構(未圖示)來在X方向上移動。Y方向移動裝置53，係具備有將可動體54可在Y方向上自由移動 地來作支持之Y方向導引構件53a、和被馬達所驅動的滾珠螺桿機構(未圖示)，而成為能夠使可動體54在Y軸方向上移動。雖並未圖示，但是，安裝部50B，係具備有使安裝頭55於上下方向(Z方向)上移動之移動裝置。作為上下方向之移動裝置(移動之導引手段)，例如係周知有線性移動導引(LM導引)和交叉滾輪導引等，而可使用此些之任一者。此些之中，當將交叉滾輪導引作為上下方向之導引手段來使用的情況時，相較於使用有LM導引的情況，係有著在反覆地下降至相同之高度之位置時的水平方向之位置的再現性為高、亦即是難以產生水平方向之位置偏移的特徵。又，安裝頭55，係具備有未圖示之旋轉方向(θ方向)之修正機構。左側之安裝部50A，除了各部之配置係作左右反轉以外，係具備有相同之構成。 The X-direction moving block 52 is attached to the support frame 51 via the X-direction guide member 52a, and is movable in the X direction by a ball screw mechanism (not shown) driven by a motor. The Y-direction moving device 53 is provided to move the movable body 54 freely in the Y direction. The Y-direction guide member 53a supported by the ground and the ball screw mechanism (not shown) driven by the motor can move the movable body 54 in the Y-axis direction. Although not shown, the mounting portion 50B is provided with a moving device that moves the mounting head 55 in the vertical direction (Z direction). As the moving means (moving means for moving) in the up and down direction, for example, a linear movement guide (LM guide) and a cross roller guide are known, and any of these may be used. Among them, when the cross roller guide is used as a guide means for the up and down direction, compared with the case where the LM guide is used, there is a level when the ground is lowered to the same height. The reproducibility of the position of the direction is high, that is, it is difficult to cause a positional shift in the horizontal direction. Further, the mounting head 55 is provided with a correction mechanism having a rotation direction (θ direction) not shown. The mounting portion 50A on the left side has the same configuration except that the arrangement of the respective portions is reversed left and right.
安裝部50B，係從吸附噴嘴44而接收藉由移載部40B所從零件供給部10取出了的半導體晶片t，並將所接收了的半導體晶片t安裝於被載置在平台21處之支持基板W上。安裝部50A，亦同樣的，係從吸附噴嘴44而接收藉由移載部40A所從零件供給部10取出了的半導體晶片t，並將所接收了的半導體晶片t安裝於被載置在平台21處之支持基板W上。身為使安裝工具56對於平台21上之支持基板W而將半導體晶片t作安裝的位置之安裝位置，係被設定於定位置處。因此，平台21，係以使支持基板W上之各安裝區域會依序定位於安裝位置處的方式而被作移動控制。於此，所謂定位置，例如係被 設為平台21之可朝向XY方向作移動的範圍之中心。前述之第2攝像機22，例如係被配置在安裝位置之正上方處。另外，圖1，由於係對於平台21為位置在藉由基板搬送部30來進行支持基板W之搬入/搬出的搬入/搬出位置處的狀態作展示，因此，平台21係存在於從可移動範圍之中心起而朝向裝置後方側作了些許的偏移之位置處。 The mounting portion 50B receives the semiconductor wafer t taken out from the component supply unit 10 by the transfer unit 40B from the adsorption nozzle 44, and mounts the received semiconductor wafer t on the support placed on the stage 21. On the substrate W. Similarly, the mounting portion 50A receives the semiconductor wafer t taken out from the component supply unit 10 by the transfer unit 40A from the adsorption nozzle 44, and mounts the received semiconductor wafer t on the platform. 21 on the support substrate W. The mounting position at the position where the mounting tool 56 mounts the semiconductor wafer t with respect to the support substrate W on the stage 21 is set at a fixed position. Therefore, the platform 21 is moved and controlled so that the mounting areas on the support substrate W are sequentially positioned at the mounting position. Here, the so-called position, for example, is It is set as the center of the range in which the platform 21 can move toward the XY direction. The second camera 22 described above is disposed, for example, directly above the mounting position. In addition, in Fig. 1, the position of the stage 21 is displayed at the loading/unloading position where the support substrate W is carried in and out by the substrate transport unit 30. Therefore, the stage 21 exists in the movable range. The center is at a position that is slightly offset toward the rear side of the device.
安裝位置，不僅是將使右側之安裝部50B的安裝工具56對於支持基板W上而安裝半導體晶片t之位置作為定位置，並且亦在左側之安裝部50A以及右側之安裝部50B處而均設為相同之定位置。亦即是，藉由左側之安裝部50A來對於支持基板W上而安裝半導體晶片t之位置，係與藉由右側之安裝部50B來對於支持基板W上而安裝半導體晶片t之位置相同，並在此種相同之安裝位置處而藉由一對之安裝部50A、50B來交互地進行半導體晶片t之安裝。 The mounting position is not limited to the position at which the mounting tool 56 of the mounting portion 50B on the right side mounts the semiconductor wafer t on the support substrate W, and is also disposed at the mounting portion 50A on the left side and the mounting portion 50B on the right side. The same position. In other words, the position at which the semiconductor wafer t is mounted on the support substrate W by the mounting portion 50A on the left side is the same as the position at which the semiconductor wafer t is mounted on the support substrate W by the mounting portion 50B on the right side, and The semiconductor wafer t is alternately mounted by a pair of mounting portions 50A, 50B at the same mounting position.
支持基板W之各安裝區域，由於係藉由平台部20之XY移動機構而依序被定位在一定之安裝位置處，因此，左右之安裝部50A、50B的安裝工具56，係分別從接收位置起而一直移動至一定之安裝位置處，該接收位置，係為從移載部40A、40B之吸附噴嘴44來接收半導體晶片t之位置。在此些之安裝工具56之移動路徑的下方，係分別被配置有從下側來對於被吸附保持在安裝工具56處的半導體晶片t作攝像之第3攝像機57。第3攝 像機57，係被配置在較安裝工具56之移動路徑而更下側並且較晶圓環支持器12更上側的高度處。第3攝像機57，係被設置在左側之安裝部50A之安裝工具56之移動路徑和右側之安裝部50B之安裝工具56之移動路徑的各者處。第3攝像機57，係為作為第2辨識部而起作用者。 The mounting areas of the support substrate W are sequentially positioned at a certain mounting position by the XY moving mechanism of the platform portion 20, so that the mounting tools 56 of the left and right mounting portions 50A, 50B are respectively received from the receiving position. It is moved all the way to a certain mounting position, which is the position at which the semiconductor wafer t is received from the adsorption nozzles 44 of the transfer portions 40A, 40B. Below the moving path of the mounting tool 56, a third camera 57 for imaging the semiconductor wafer t adsorbed and held by the mounting tool 56 from the lower side is disposed. 3rd photo The camera 57 is disposed at a lower level than the moving path of the mounting tool 56 and at a higher level than the wafer ring holder 12. The third camera 57 is provided at each of the moving path of the mounting tool 56 of the mounting portion 50A on the left side and the moving path of the mounting tool 56 of the mounting portion 50B on the right side. The third camera 57 functions as a second recognition unit.
實施形態之安裝裝置1，係如同圖6中所示一般，具備有控制部60。控制部60，係基於被記憶在記憶部61中之資訊，而對於零件供給部10、平台部20、基板搬送部30、移載部40、安裝部50之動作作控制，並將包含半導體晶片t之電子零件依序安裝至支持基板W之各安裝區域處。在記憶部61處，係亦記憶有藉由後述之平台21的移動位置誤差之取得工程所得到的對於平台21之移動位置誤差作修正之資料，基於此修正資料，平台21之移動係被作控制。 The mounting device 1 of the embodiment is provided with a control unit 60 as shown in FIG. The control unit 60 controls the operations of the component supply unit 10, the platform unit 20, the substrate transport unit 30, the transfer unit 40, and the mounting unit 50 based on the information stored in the storage unit 61, and includes the semiconductor wafer. The electronic components of t are sequentially mounted to the respective mounting areas of the support substrate W. At the memory unit 61, the data of the movement position error of the platform 21 obtained by the acquisition of the movement position error of the platform 21 described later is also stored. Based on the correction data, the movement of the platform 21 is made. control.
接著，針對使用有安裝裝置1之半導體晶片t等的電子零件之安裝工程作說明。在將半導體晶片t等之電子零件安裝於支持基板W之各安裝區域處時，在僅適用有全域辨識方式的情況時，由於安裝區域之位置辨識係並不會被進行，因此，對於各安裝區域之半導體晶片t的定位精確度，係成為依存於支持基板W之全域記號等之辨識精確度和平台21之XY移動機構的機械加工精確度等。然 而，在金屬加工的觀點上，想要將對於平台21之移動作導引的導引軌等涵蓋所期望之長度地而以±5μm以下之精確度來完成加工一事，實質上係並不可能。不用說，係更不可能將具有所期望之長度的導引軌以±5μm以下之直線性和起伏程度而組裝在金屬框架等之處。因此，係對於平台21之移動位置誤差進行測定，並取得對於平台21之移動作修正的資料(校正)。 Next, an installation work of an electronic component using a semiconductor wafer t or the like having the mounting device 1 will be described. When the electronic component such as the semiconductor wafer t is mounted on each of the mounting regions of the support substrate W, when only the global identification method is applied, since the position identification system of the mounting region is not performed, for each mounting The positioning accuracy of the semiconductor wafer t in the region is determined by the identification accuracy of the global mark or the like of the support substrate W and the machining accuracy of the XY moving mechanism of the stage 21. Of course However, from the viewpoint of metal working, it is impossible to complete the processing by guiding the guide rail or the like for guiding the movement of the stage 21 to a desired length and with an accuracy of ±5 μm or less. . Needless to say, it is less likely that a guide rail having a desired length is assembled in a metal frame or the like with a linearity and a degree of undulation of ±5 μm or less. Therefore, the movement position error of the stage 21 is measured, and the data (correction) for correcting the movement of the stage 21 is obtained.
對於平台21之移動位置誤差進行修正的資料，係使用如同圖8中所示一般之校正基板71來取得之。校正基板71，例如係為在玻璃製之基板上將位置辨識用之點記號72以預先所設定之間隔來設置為行列狀者。校正基板71之點記號72，例如係在縱300mm×橫300mm之範圍內而以3mm間隔來作設置。點記號72，係藉由金屬薄膜等所形成，並可使用蝕刻或濺鍍等之成膜技術來形成之。點記號之直徑，例如係為0.2mm。將此種校正基板71正確地安置在平台21上。校正基板71之安置方法，係並未特別作限定，但是，例如係藉由以下所示一般之方法來實施。於此，校正基板71係具備有與支持基板W相同之大小，點記號所被設置之範圍係被設為與包含支持基板W上之全部的安裝區域之範圍相同之大小。 The data for correcting the movement position error of the stage 21 is obtained by using the correction substrate 71 as shown in Fig. 8. The correction substrate 71 is, for example, a dot-shaped dot 72 for position recognition on a glass substrate, which is arranged in a matrix at a predetermined interval. The dot mark 72 of the correction substrate 71 is provided, for example, in a range of 300 mm in length × 300 mm in width and at intervals of 3 mm. The dot mark 72 is formed by a metal thin film or the like, and can be formed by a film forming technique such as etching or sputtering. The diameter of the dot mark is, for example, 0.2 mm. This correction substrate 71 is correctly placed on the stage 21. The method of arranging the correction substrate 71 is not particularly limited, but is carried out, for example, by a general method as shown below. Here, the correction substrate 71 is provided in the same size as the support substrate W, and the range in which the dot marks are provided is set to be the same as the range including all the mounting regions on the support substrate W.
將如同上述一般之校正基板71藉由作業者之手動作業來安置在平台21上。校正基板71之安置，係在將校正基板71載置在平台21上之後，藉由進行校正基板71之平行調整(使點記號72之並排方向與XY方向相合致之調整)一事來進行之。平行調整，係利用在支持基板W之全域記號的攝像中所使用之第2攝像機22來進行。首先，在被載置於平台21上之校正基板71上，例如如同圖8中所示一般，以使位置在校正基板71之左前方的角部處之點記號72會成為第2攝像機22之攝像視野22a之中心的方式，來調整平台21之位置。 The calibration substrate 71 as described above is placed on the stage 21 by manual operation by an operator. The arrangement of the correction substrate 71 is performed by placing the correction substrate 71 on the stage 21, and performing parallel adjustment of the correction substrate 71 (adjusting the side-by-side direction of the dot marks 72 in alignment with the XY direction). The parallel adjustment is performed by the second camera 22 used for imaging the entire mark of the support substrate W. First, on the correction substrate 71 placed on the stage 21, for example, as shown in FIG. 8, the dot mark 72 at the corner of the left front side of the correction substrate 71 becomes the second camera 22. The position of the platform 21 is adjusted by the way of capturing the center of the field of view 22a.
從此狀態起，使平台21以低速(使點記號72在攝像機22之視野22a內緩慢地移動而來一般之速度)來朝向X方向左側作移動。此時，作業者係藉由監視器來對於第2攝像機22之攝像畫像作監視，若是藉由第2攝像機22所攝像了的點記號72之位置相對於攝像視野22a而朝向上側或下側作了偏移，則使平台21之移動停止，並藉由手動來將校正基板71之傾斜度朝向使偏移消除的方向作調整。圖8之攝像視野22a，係對於在攝像視野22a內所出現的點記號72之位置伴隨著平台21之移動而逐漸朝向下側偏移的狀態之例作展示。 From this state, the platform 21 is moved toward the left side in the X direction at a low speed (the point mark 72 is slowly moved in the field of view 22a of the camera 22 to a normal speed). At this time, the operator monitors the image of the second camera 22 by the monitor, and the position of the point mark 72 imaged by the second camera 22 is directed toward the upper side or the lower side with respect to the imaging field of view 22a. The offset causes the movement of the stage 21 to be stopped, and the inclination of the correction substrate 71 is manually adjusted to adjust the direction in which the offset is eliminated. The imaging field of view 22a of FIG. 8 is an example of a state in which the position of the dot mark 72 appearing in the imaging field of view 22a is gradually shifted toward the lower side with the movement of the stage 21.
若是對於校正基板71之傾斜度作了調整，則係再度以使位置在左前方之角部處之點記號72會成為第2攝像機22之攝像視野22a之中心的方式，來調整平台 21之位置，並使平台21以低速來朝向X方向左側移動。作業者，係同樣地藉由監視器來對於點記號72之位置是否逐漸偏移一事作監視。之後，若是位置有所偏移，則使平台21之移動停止，並對於校正基板71之傾斜度作調整。反覆進行此種動作，直到連校正基板71之位置在右前方之角部處的點記號72也成為不會被遺漏地而出現在監視器畫面中為止。若是能夠調整為從左前方角部之點記號72起直到右前方角部之點記號72為止均成為能夠在攝像機22之視野22a內而將點記號72導入，則校正基板71之安置係結束。由作業者所致之平台21之移動，係藉由觸控面板和搖桿之操作等來進行。 If the inclination of the correction substrate 71 is adjusted, the platform is adjusted so that the point mark 72 at the corner of the left front portion becomes the center of the imaging field of view 22a of the second camera 22. The position of 21 moves the platform 21 to the left in the X direction at a low speed. The operator also monitors whether the position of the dot mark 72 is gradually shifted by the monitor. Thereafter, if the position is shifted, the movement of the stage 21 is stopped, and the inclination of the correction substrate 71 is adjusted. This operation is repeated until the dot mark 72 at the corner of the right front side of the correction substrate 71 is displayed on the monitor screen without being missed. If it is possible to adjust the dot mark 72 from the dot mark 72 in the left front corner to the dot mark 72 in the right front corner, the dot mark 72 can be introduced in the field of view 22a of the camera 22, and the placement of the correction substrate 71 is completed. The movement of the platform 21 by the operator is performed by the operation of the touch panel and the joystick.
接著，藉由依序檢測出以如同上述一般之方法而安置在平台21上的校正基板71之點記號72之位置，來取得移動位置誤差以及基於其所得到的修正資料。校正基板71上之點記號72的攝像，例如係如同圖9中所示一般，將位置在校正基板71之中央的點記號72作為最初所攝像的點記號(第1個點記號)72a，並從該點記號72a起來以漩渦狀之軌跡而朝向外側依序移動，直到到達最後的點記號72n處為止。 Next, by moving the position of the dot mark 72 of the correction substrate 71 placed on the stage 21 in the same manner as the above-described general method, the movement position error and the correction data obtained based thereon are obtained. The imaging of the dot mark 72 on the correction substrate 71 is, for example, as shown in FIG. 9, and the dot mark 72 positioned at the center of the correction substrate 71 is used as the dot mark (first dot mark) 72a which is initially imaged, and From this point mark 72a, it moves in a spiral shape to the outer side in order to reach the last dot mark 72n.
首先，作業者，係以使第1個點記號72a會成為攝像機22之視野之中心的方式，來一面觀察監視器一面對於平台21進行操作而使校正基板71移動。中央之 點記號72a，係以能夠與其他之點記號72作區分的方式，而與點記號72a相鄰接地來設置有辨識用之記號。在圖9中，係代替對於鄰接記號作展示一事，而將點記號72a以十字圓形作標示。若是將第1個點記號72a以會成為攝像機22之視野之中心的方式來作了定位，則點記號72之檢測動作係開始。從此階段起，首先，係藉由由控制部60所致之自動控制來進行。藉由讓作業者按下(觸碰)被顯示在觸控面板上的檢測動作之開始鍵，檢測動作係開始。 First, the operator moves the correction substrate 71 while operating the stage 21 while observing the monitor so that the first dot symbol 72a becomes the center of the field of view of the camera 22. Central The dot mark 72a is provided so as to be distinguishable from other dot marks 72, and is provided adjacent to the dot mark 72a to be provided with a mark for identification. In Fig. 9, instead of displaying for adjacent symbols, the dot mark 72a is indicated by a cross circle. If the first dot mark 72a is positioned so as to become the center of the field of view of the camera 22, the detection operation of the dot mark 72 is started. From this stage, first, it is performed by automatic control by the control unit 60. The detection operation system starts by causing the operator to press (touch) the start key of the detection operation displayed on the touch panel.
若是點記號72之檢測動作開始，則首先第1個點記號72a係被攝像。被作了攝像的第1個點記號72a之畫像，係使用公知之畫像辨識技術而被進行處理，相對於攝像機22之視野中心的點記號72之位置偏移係被檢測出來。被檢測出的位置偏移，係作為與平台21之移動位置(XY座標)成對的資訊，而被記憶在記憶部61中。若是中央之點記號72a的位置檢測結束，則係依循於導入順序，以將下一個(第2個)的點記號72定位在攝像機之視野內的方式來使平台21移動。在圖9之例中，第2個的點記號72，由於係位置在第1個的點記號72a之左鄰，因此係使平台21朝向X方向右側而作3mm的移動。 When the detection operation of the dot mark 72 is started, the first dot symbol 72a is first imaged. The image of the first dot mark 72a that has been imaged is processed using a known image recognition technique, and the positional deviation of the dot mark 72 with respect to the center of the field of view of the camera 22 is detected. The detected positional shift is stored in the memory unit 61 as information paired with the moving position (XY coordinates) of the stage 21. When the position detection of the center point mark 72a is completed, the platform 21 is moved in such a manner that the next (second) point mark 72 is positioned within the field of view of the camera in accordance with the order of introduction. In the example of Fig. 9, since the second dot symbol 72 is located on the left side of the first dot symbol 72a, the platform 21 is moved 3 mm toward the right side in the X direction.
平台21之移動，係基於被設置在平台21之XY移動機構處的線性編碼器之讀取值來進行。在線性編碼器之尺標處，作為熱對策，係以使用熱膨脹係數為小之玻璃製尺標為理想。若是平台21之移動結束，則係與第 1個的點記號72a同樣地，第2個的點記號72之位置偏移係被檢測出來，並作為與此時之平台21之XY座標成對的資訊，而被記憶在記憶部61中。點記號72之攝像，係在使平台21停止之後，於等待了能夠使在平台21之停止時所產生的震動收斂之時間之後，再進行之。對於校正基板71上之全部的點記號72而進行此種動作，並取得與各別的位置相對應之點記號72之移動位置偏移資料，而作為修正資料來記憶在記憶部61中。 The movement of the platform 21 is based on the read value of the linear encoder disposed at the XY moving mechanism of the platform 21. At the scale of the linear encoder, as a countermeasure against heat, it is preferable to use a glass ruler having a small thermal expansion coefficient. If the movement of the platform 21 is over, then the system and the Similarly to the one dot symbol 72a, the positional shift of the second dot symbol 72 is detected, and is stored in the memory unit 61 as information paired with the XY coordinates of the platform 21 at this time. The imaging of the dot mark 72 is performed after waiting for the time when the vibration generated by the stop of the platform 21 is converged after the platform 21 is stopped. This operation is performed on all the dot marks 72 on the correction substrate 71, and the movement position shift data of the dot marks 72 corresponding to the respective positions are acquired, and are stored in the memory unit 61 as correction data.
為了使在半導體晶片t之接合中所使用的黏晶薄膜之接合性提昇，係會有在平台21上設置加熱器並對支持基板進行加熱的情形。於此種情況中，由於在載置於平台21處之前和之後，支持基板W之溫度係會改變(上升)，因此，支持基板W係會產生與此相應之熱膨脹。若是支持基板W產生熱膨脹，則就算是使平台21和安裝頭55以良好精確度來作了移動，安裝位置也會產生與支持基板W之延展量相對應之量的偏移。 In order to improve the bondability of the die-bonding film used in the bonding of the semiconductor wafer t, there is a case where a heater is provided on the stage 21 and the support substrate is heated. In this case, since the temperature of the support substrate W changes (rises) before and after being placed on the stage 21, the support substrate W is thermally expanded corresponding thereto. If the support substrate W is thermally expanded, even if the stage 21 and the mounting head 55 are moved with good precision, the mounting position is offset by an amount corresponding to the amount of extension of the support substrate W.
因此，較理想，係預先藉由測定等來對起因於加熱器之加熱所產生的支持基板W之熱膨脹量作掌握，並當將半導體晶片t安裝在支持基板W處時，在修正資料上乘上與預先所掌握到的熱膨脹量相對應之係數(%)，而對於平台21之移動作控制。此時，起因於加熱器之形狀和配置、平台21之構造等的因素，支持基板 W全體係並不一定會均勻地熱膨脹，因此，係亦可構成為亦對於熱膨脹之分布一併作掌握。例如，係亦可構成為：將支持基板W上之區域分割成10行×10列等的格子狀之複數之區域，並針對所分割出的各區域之每一者而測定熱膨脹量(各測定點之起因於熱膨脹所致的位移)。之後，針對各區域之每一者，而分別對於在平台21之修正資料上所乘上的係數作切換。 Therefore, it is preferable to grasp the amount of thermal expansion of the support substrate W caused by the heating of the heater by measurement or the like in advance, and multiply the correction data when the semiconductor wafer t is mounted on the support substrate W. The coefficient (%) corresponding to the amount of thermal expansion previously grasped is controlled for the movement of the stage 21. At this time, the support substrate is caused by factors such as the shape and arrangement of the heater, the configuration of the stage 21, and the like. The W system does not necessarily uniformly expand thermally, and therefore, it can be configured to also grasp the distribution of thermal expansion. For example, the region on the support substrate W may be divided into a plurality of lattice-shaped regions of 10 rows×10 columns, and the amount of thermal expansion may be measured for each of the divided regions (each measurement) The point is caused by the displacement due to thermal expansion). Thereafter, for each of the regions, the coefficients multiplied by the correction data on the platform 21 are switched.
又，係亦可構成為：先將支持基板W載置在平台21上，之後，在直到支持基板W之熱膨脹相對於平台21之溫度而成為飽和為止的期間中，於每特定之經過時間處而對於支持基板W之熱膨脹量作計測，並預先求取出與每特定之經過時間處的熱膨脹量相對應的係數。此時，係亦可針對將支持基板W上分割成複數的區域後之各區域的每一者，而分別求取出與熱膨脹量相對應的係數。之後，在進行半導體晶片t之安裝時，在從將支持基板W載置在平台21上起的每特定之經過時間處，而切換為與該經過時間相對應的係數，並在修正資料上乘上該係數，而使平台21移動。藉由設為此種構成，係能夠並不等待相對於平台21之溫度而支持基板W之熱膨脹成為飽和狀態地，來對於該支持基板W而開始半導體晶片t之安裝，而能夠有效率地實施半導體晶片t之安裝。 Further, the support substrate W may be placed on the stage 21 first, and then, during a period until the thermal expansion of the support substrate W is saturated with respect to the temperature of the stage 21, at each specific elapsed time On the other hand, the amount of thermal expansion of the support substrate W is measured, and a coefficient corresponding to the amount of thermal expansion at each specific elapsed time is extracted in advance. At this time, it is also possible to extract a coefficient corresponding to the amount of thermal expansion for each of the regions after the support substrate W is divided into a plurality of regions. Thereafter, at the time of mounting the semiconductor wafer t, the coefficient corresponding to the elapsed time is switched from the elapsed time from the mounting of the support substrate W on the stage 21, and the correction data is multiplied. This coefficient causes the platform 21 to move. With such a configuration, it is possible to efficiently mount the semiconductor wafer t with respect to the support substrate W without waiting for the thermal expansion of the substrate W to be saturated with respect to the temperature of the stage 21. Installation of semiconductor wafer t.
在使平台21移動時，係參照藉由平台21的移動位置 誤差之取得工程所求取出的修正資料，來對於平台21之移動位置作修正。首先，為了將在支持基板W上而最初被安裝半導體晶片t之安裝區域定位於安裝位置處，而使平台21移動。此時，控制部60，係參照被記憶在記憶部61中之最初的安裝區域之位置資訊(XY座標)和上述之修正資料，而選擇在將最初之安裝區域定位在安裝位置處時所需要的修正值。將使最初的安裝區域定位在安裝位置處時的平台21之移動量，作與所選擇了的修正值相對應之量之修正。在平台21為具備有加熱器的情況時，較理想，係構成為將上述之基於支持基板W之熱膨脹量所得到的係數，與平台21之修正資料相乘。 When moving the platform 21, reference is made to the moving position by the platform 21. The correction data obtained by the engineering acquisition is used to correct the moving position of the platform 21. First, in order to position the mounting region where the semiconductor wafer t is initially mounted on the support substrate W at the mounting position, the stage 21 is moved. At this time, the control unit 60 selects the position information (XY coordinates) of the first mounting area stored in the storage unit 61 and the above-described correction data, and selects the need to position the initial mounting area at the mounting position. Corrected value. The amount of movement of the platform 21 when the initial mounting area is positioned at the mounting position is corrected for the amount corresponding to the selected correction value. In the case where the stage 21 is provided with a heater, it is preferable to multiply the coefficient obtained by the above-described thermal expansion amount of the support substrate W by the correction data of the stage 21.
在圖10中，針對使安裝區域(xi，yi)MA移動至安裝位置P處的例子作展示。若是使安裝區域MA直接移動至安裝位置P處，則在基於機械加工精確度等而產生有位置偏移(△ni，△mi)的情況時，係根據修正資料來求取出位置偏移量(△ni，△mi)，並在平台21之移動量上，加上將位置偏移抵消之修正值(-△ni，-△mi)，而使平台21移動。如此這般地，來將支持基板W上之各安裝區域依序定位於安裝位置P處。在上述之例中，由於係以3mm間隔來取得修正資料，因此，安裝區域係並不一定絕對會與取得了修正資料的位置剛好一致。因此，當安裝區域為位置在取得了點記號72的位置偏移之位置之間時，係對於相鄰接之2個的位置偏移之資料進行線性內插，並將符合於該安裝區域的位置偏移之資料近似性地算 出，而作為修正值來使用。 In Fig. 10, an example is shown for moving the mounting area (xi, yi) MA to the mounting position P. If the mounting area MA is directly moved to the mounting position P, when a positional shift (Δni, Δmi) is generated based on the machining accuracy or the like, the positional offset is obtained based on the correction data ( Δni, Δmi), and the table 21 is moved by adding a correction value (-Δni, -Δmi) which offsets the positional offset to the amount of movement of the stage 21. In this manner, the mounting areas on the support substrate W are sequentially positioned at the mounting position P. In the above example, since the correction data is acquired at intervals of 3 mm, the installation area does not necessarily coincide with the position at which the correction data is obtained. Therefore, when the mounting area is between the positions where the position offset of the dot mark 72 is obtained, linearly interpolating the data of the adjacent two position offsets and conforming to the mounting area is performed. The information of the positional offset is approximately calculated It is used as a correction value.
上述之平台21的移動位置誤差(修正資料)之取得工程，基本上係只要在使安裝裝置1開始動作時而實施，並基於該測定結果而對於平台21之移動作控制即可。但是，在平台21或安裝頭55處，係會有被組入有對於半導體晶片t之安裝作輔助的加熱器等的情形，而會有裝置各部之溫度上升並起因於熱膨脹而導致機械精確度降低之虞。又，伴隨著由安裝裝置1所致之半導體晶片t的安裝工程之進行，起因於使安裝頭55移動之馬達等的發熱，也會有導致裝置各部之機械精確度降低之虞。在對於此種由溫度上升所致之移動誤差作考慮的情況時，係亦可並不僅侷限於裝置開始動作時之1次，而是定期性地實施移動位置誤差(修正資料)之取得工程。藉由此，係能夠使半導體晶片t等之定位精確度更進一步的提升。 The acquisition of the movement position error (correction data) of the above-described stage 21 is basically performed as long as the installation apparatus 1 starts to operate, and the movement of the stage 21 may be controlled based on the measurement result. However, at the stage 21 or the mounting head 55, there is a case where a heater or the like which assists in mounting the semiconductor wafer t is incorporated, and the temperature of each part of the apparatus rises and causes mechanical precision due to thermal expansion. Reduce the embarrassment. Further, with the progress of the mounting process of the semiconductor wafer t by the mounting device 1, the heat generated by the motor or the like that moves the mounting head 55 may cause a decrease in the mechanical accuracy of each part of the device. In the case where such a movement error due to an increase in temperature is taken into consideration, it is not limited to one time when the apparatus starts to operate, but the acquisition of the movement position error (correction data) is periodically performed. Thereby, the positioning accuracy of the semiconductor wafer t or the like can be further improved.
在取得上述之平台21之移動位置誤差(修正資料)並將修正資料記憶在記憶部61中之後，實施半導體晶片t等之電子零件的對於支持基板W之安裝工程。 After the movement position error (correction data) of the above-described platform 21 is obtained and the correction data is stored in the memory unit 61, the mounting process of the support substrate W of the electronic component such as the semiconductor wafer t is performed.
首先，從未圖示之收容部來將未使用之晶圓環11搬入至晶圓環支持器12處，並將晶圓環11固定在晶圓環支持器12上。 First, the unused wafer ring 11 is carried into the wafer ring holder 12 from a housing portion (not shown), and the wafer ring 11 is fixed to the wafer ring holder 12.
將被搬入至了搬入輸送帶31上的支持基板W藉由第1遞交部33來作吸附保持，並載置在被定位於搬入/搬出位置處的平台21上。將支持基板W遞交至平台21處之第1遞交部33，係移動至搬入輸送帶31之位置處並待機。在此動作中，第2遞交部34係在搬出輸送帶32之位置處而待機。工程(2)，係可與工程(1)並行地進行，亦可個別地進行。 The support substrate W that has been carried into the transporting belt 31 is sucked and held by the first delivery unit 33, and placed on the stage 21 positioned at the loading/unloading position. The support substrate W is delivered to the first delivery unit 33 at the stage 21, and is moved to the position where the transport belt 31 is carried in and stands by. In this operation, the second delivery unit 34 stands by at the position where the conveyor belt 32 is carried out. The project (2) can be carried out in parallel with the project (1) or can be carried out individually.
在搬入輸送帶31處，係從未圖示之裝載器而被搬入有支持基板W。裝載器，係與晶圓環供給部同樣的，為可升降地設置有能夠將支持基板W於上下方向空出有空隙地來作收容之艙匣者，並藉由以推送器來將被定位在與搬入輸送帶31之搬送高度相同高度處的支持基板W推出或者是以夾具來抽出等，而供給至搬入輸送帶31上。在搬出輸送帶32側處，係被配置有具備與裝載器相同的構成之卸載器，並從搬出輸送帶32來將支持基板W(被安裝了半導體晶片t之支持基板W)依序收容至艙匣中。 At the loading conveyor 31, the support substrate W is carried in a loader (not shown). In the same manner as the wafer ring supply unit, the loader is provided with a cabin that can accommodate the support substrate W with a gap in the vertical direction, and is positioned by a pusher. The support substrate W at the same height as the transport height of the carry-in conveyor 31 is pushed out or extracted by a jig, and is supplied to the carry-in belt 31. An unloader having the same configuration as that of the loader is disposed on the side of the carry-out conveyor 32, and the support substrate W (the support substrate W on which the semiconductor wafer t is mounted) is sequentially stored from the carry-out conveyor 32. In the cabin.
將被載置在平台21上的支持基板W之全域記號檢測出來，而辨識出支持基板W之位置。例如，如同在圖11 中所示一般，對於被設置在支持基板W之四角隅中的3個的角部處之全域記號A、B、C，而依序使第2攝像機22朝向下方移動並作攝像。支持基板W之移動，係藉由平台21來進行。基於藉由第2攝像機22所攝像了的各攝像畫像，來檢測出3個的全域記號A、B、C之位置，並基於所檢測出之3個的全域記號A、B、C之位置，來求取出支持基板W之XY方向的位置偏移和θ方向的位置偏移。支持基板W之位置偏移，係可藉由各種公知之方法來求取之，關於其方法係並未特別作限定。以下，對於位置偏移之檢測方法的其中一例作記載。 The global mark of the support substrate W placed on the stage 21 is detected, and the position of the support substrate W is recognized. For example, as in Figure 11 As shown in the above, in general, the second camera 22 is sequentially moved downward and imaged for the global symbols A, B, and C at the corners of the three corners of the support substrate W. The movement of the support substrate W is performed by the platform 21. Based on each of the imaging images captured by the second camera 22, the positions of the three global symbols A, B, and C are detected, and based on the positions of the three global symbols A, B, and C detected. The positional shift in the XY direction of the support substrate W and the positional shift in the θ direction are taken out. The positional deviation of the support substrate W can be obtained by various well-known methods, and the method is not particularly limited. Hereinafter, an example of the method of detecting the positional shift will be described.
在圖11中，實線係代表實際被放置在平台21上之支持基板W，二點鍊線係代表在平台21上並未發生有位置偏移地而被作了放置的狀態之支持基板W。以二點鍊線所記載的支持基板W，係為理想之位置狀態，此時，支持基板W之中心，係與平台21之中心位置O(x0，y0)相互一致。 In Fig. 11, the solid line represents the support substrate W actually placed on the stage 21, and the two-point chain line represents the support substrate W in a state where the positional deviation has not occurred on the stage 21. . The support substrate W described by the two-dot chain line is in an ideal position state. At this time, the center of the support substrate W coincides with the center position O (x0, y0) of the stage 21.
首先，使用公知之畫像辨識技術來檢測出被設置在支持基板W處之3個的記號A、B、C之位置，並根據將記號A、B作連結的線段AB之相對於X方向之傾斜θ1和將記號B、C作連結的線段BC之相對於Y方向之傾斜θ2之兩者的平均值，來求取出支持基板W之傾斜θ(=(θ1+θ2)/2)。接著，以平台21之中心位置O作為旋轉中心，而以使傾斜θ消失的方式來使支持基板W作假想性的旋轉。將該狀態在圖11中以點線來作展示。求取出 此時之位置在對角處的記號A、C之中點M1(x1，y1)的移動量(△x1，△y1)。之後，將使所求取出之移動量(△x1，△y1)和移動後之中點M2(x2，y2)與座標O之間之差(△x2，△y2)相加後的值(△x1+△x2，△y1+△y2)，作為支持基板W之XY方向之位置偏移而求取出來。 First, the position of the three symbols A, B, and C provided at the support substrate W is detected using a known image recognition technique, and the inclination of the line segment AB connecting the marks A and B with respect to the X direction is used. The average value of both θ1 and the inclination θ2 of the line segment BC connecting the marks B and C with respect to the Y direction is used to obtain the inclination θ (= (θ1 + θ2)/2) of the support substrate W. Next, the center position O of the stage 21 is used as the center of rotation, and the support substrate W is imaginarily rotated so that the inclination θ disappears. This state is shown by a dotted line in FIG. Ask for removal At this time, the movement amount (Δx1, Δy1) of the point M1 (x1, y1) among the marks A and C at the opposite corners. After that, the value of the movement amount (Δx1, Δy1) taken out and the difference (Δx2, Δy2) between the point M2 (x2, y2) and the coordinate O after the movement (Δ) is added. X1 + Δx2, Δy1 + Δy2) is taken out as a positional shift in the XY direction of the support substrate W.
若是算出了在平台21上之支持基板W的位置偏移，則係一面對於此位置偏移作修正，一面以將支持基板W上之最初被安裝半導體晶片t之安裝區域定位於安裝位置處的方式而使平台21移動。此時，用以將各安裝區域定位在安裝位置處的平台21之移動，係藉由基於對於支持基板W的位置偏移作修正之資料和上述之平台21之移動位置誤差所得到的修正資料，而被作修正。在如同本實施形態一般之平台21之移動機構並未具備有θ桌台的情況時支持基板W之傾斜，係藉由以安裝頭55所具備的θ調整機構來對於所安裝的半導體晶片t之傾斜作調整一事，而被作修正。 If the positional deviation of the support substrate W on the stage 21 is calculated, the mounting position of the semiconductor wafer t on which the semiconductor wafer t is initially mounted on the support substrate W is positioned at the mounting position while correcting the positional deviation. The platform 21 is moved in a manner. At this time, the movement of the stage 21 for positioning the respective mounting areas at the mounting position is based on the correction data based on the correction of the positional deviation of the support substrate W and the movement position error of the above-mentioned platform 21. And was corrected. When the moving mechanism of the stage 21 as in the present embodiment does not have the θ table, the tilt of the support substrate W is supported by the θ adjusting mechanism provided in the mounting head 55 for the mounted semiconductor wafer t. The tilt is adjusted and corrected.
若是晶圓環11被固定在晶圓環支持器12處，則係使在晶圓環11上而最初被取出的半導體晶片t被定位在取出位置處。將晶圓環11上之半導體晶片t取出的順序，由於係預先被記憶在記憶部61中，因此，控制部60係依 據此順序來對於晶圓環支持器12之移動作控制。故而，在最初的半導體晶片t被取出之後，係基於被記憶在記憶部16中之順序來進行晶圓環支持器12之節距移動。一般而言，如同在圖7A中以箭頭所示一般，係以在每一行處而對於移動方向作切換的軌跡來進行移動。 If the wafer ring 11 is fixed to the wafer ring holder 12, the semiconductor wafer t initially taken out on the wafer ring 11 is positioned at the take-out position. The order in which the semiconductor wafer t on the wafer ring 11 is taken out is stored in the memory unit 61 in advance, so that the control unit 60 is The movement of the wafer ring holder 12 is controlled in this order. Therefore, after the first semiconductor wafer t is taken out, the pitch movement of the wafer ring holder 12 is performed based on the order stored in the memory unit 16. In general, as shown by the arrows in Fig. 7A, the movement is performed with a trajectory that switches at each line for the moving direction.
若是半導體晶片t被定位在取出位置處，則藉由第1攝像機13來對於此半導體晶片t之2個的對位記號進行攝像。2個的對位記號之攝像，只要是能夠將2個的對位記號同時導入至第1攝像機13之攝像視野內，則係能夠以1次來進行，又，亦可分成2次來進行。基於根據此攝像畫像所求取出之2個的對位記號之位置，來檢測出半導體晶片t之位置。當半導體晶片t之位置相對於取出位置而有所偏移的情況時，係以對於其之位置作修正的方式來使晶圓環支持器12移動。半導體晶片t之移載工程(3)，係可與支持基板W之安置工程(2)並行地進行，亦可個別地進行。 When the semiconductor wafer t is positioned at the take-out position, the first camera 13 captures two alignment marks of the semiconductor wafer t. The imaging of the two alignment marks can be performed once or twice, as long as the two alignment marks can be simultaneously introduced into the imaging field of view of the first camera 13. The position of the semiconductor wafer t is detected based on the position of the alignment mark obtained by the image pickup image. When the position of the semiconductor wafer t is shifted with respect to the take-out position, the wafer ring holder 12 is moved in such a manner as to correct the position thereof. The transfer process (3) of the semiconductor wafer t can be performed in parallel with the placement process (2) of the support substrate W, or can be performed individually.
被定位在取出位置處的半導體晶片t之位置偏移之檢測，係並未特別作限定，而可依據各種公知之方法來實施。例如，係可根據被設置在半導體晶片t上的對角位置處之2個的對位記號之攝像畫像，來使用公知之畫像辨識技術而檢測出各對位記號的位置。根據所求取出的記號之位置，來求出將2個的記號作連結之線段的傾斜，並將該傾斜與預先被記憶在記憶部61中的當並不存在有位置偏移的情況時之半導體晶片t處的將記號間作連結的線 段之傾斜作比較，並將兩者之差作為半導體晶片t之傾斜偏差而檢測出來。又，係將實際的對位記號間之中點的位置、和被記憶在記憶部61中的不存在有位置偏移之半導體晶片t之對位記號間之中點的位置，此兩者間之差，作為半導體晶片t之XY方向之位置偏移而求取出來。 The detection of the positional deviation of the semiconductor wafer t positioned at the take-out position is not particularly limited, and can be carried out according to various known methods. For example, the position of each registration mark can be detected using a known image recognition technique based on an image of the alignment mark of two alignment marks provided at diagonal positions on the semiconductor wafer t. Based on the position of the symbol to be extracted, the inclination of the line segment connecting the two symbols is obtained, and the inclination is compared with the case where the position is not stored in the memory unit 61 in advance. a line connecting the marks at the semiconductor wafer t The inclination of the segments is compared, and the difference between the two is detected as the tilt deviation of the semiconductor wafer t. Further, the position of the midpoint between the actual alignment marks and the position of the dot between the alignment marks of the semiconductor wafer t which is stored in the memory unit 61 and which are not positionally displaced are between The difference is obtained as the positional shift of the semiconductor wafer t in the XY direction.
驅動其中一方(例如左側)之移載部40A的反轉機構43，而使待機狀態之吸附噴嘴44反轉移動至取出位置處。接著，驅動升降裝置41而使吸附噴嘴44與臂體42一同下降，並使吸附噴嘴44之吸附面與半導體晶片t之上面(電極形成面)相抵接。若是吸附噴嘴44與半導體晶片t相抵接，則係將半導體晶片t吸附保持於吸附噴嘴44處。在吸附噴嘴44處而使吸附力作用的時序，可為在使吸附噴嘴44與半導體晶片t相抵接之前，亦可為與抵接同時，亦可為在抵接之後，只要設定為適宜之時序即可。 The reversing mechanism 43 of the transfer unit 40A of one of the (for example, the left side) is driven, and the adsorption nozzle 44 in the standby state is reversely moved to the take-out position. Next, the lifting device 41 is driven to lower the adsorption nozzle 44 together with the arm body 42, and the adsorption surface of the adsorption nozzle 44 is brought into contact with the upper surface (electrode forming surface) of the semiconductor wafer t. When the adsorption nozzle 44 is in contact with the semiconductor wafer t, the semiconductor wafer t is adsorbed and held by the adsorption nozzle 44. The timing at which the adsorption force is applied to the adsorption nozzle 44 may be before or after the adsorption nozzle 44 is brought into contact with the semiconductor wafer t, or may be set to an appropriate timing after the contact. Just fine.
若是吸附噴嘴44將半導體晶片t作了吸附保持，則係使吸附噴嘴44一直上升至原本的高度處。此時，配合於吸附噴嘴44之上升，使未圖示之上突機構動作，而對於半導體晶片t之從樹脂薄片S的剝離作輔助。若是將半導體晶片t作了吸附保持的吸附噴嘴44一直上升至了原本的高度處，則係使反轉臂47反轉並使吸附噴嘴44回到待機狀態。在此狀態下，半導體晶片t係以使 下面(與電極形成面相反側之面)朝向上方的狀態而待機。 If the adsorption nozzle 44 adsorbs and holds the semiconductor wafer t, the adsorption nozzle 44 is raised all the way to the original height. At this time, in conjunction with the rise of the adsorption nozzle 44, the overhanging mechanism (not shown) is operated to assist the peeling of the semiconductor wafer t from the resin sheet S. When the adsorption nozzle 44 that adsorbs and holds the semiconductor wafer t is raised to the original height, the reverse arm 47 is reversed and the adsorption nozzle 44 is returned to the standby state. In this state, the semiconductor wafer t is The lower side (the surface on the opposite side to the electrode forming surface) is placed on the upper side and stands by.
使其中一方(左側)之安裝工具56，移動至保持半導體晶片t並身為待機狀態的吸附噴嘴44之正上方的位置、亦即是接收位置處。若是安裝工具56被定位在接收位置處，則係驅動升降裝置41而使臂體42上升，並將被保持於吸附噴嘴44處的半導體晶片t遞交至安裝工具56之保持面處。吸附噴嘴44，係在將半導體晶片t遞交至安裝工具56處之後，一直下降至原本的高度處，並成為待機狀態。在此遞交時，在安裝工具56處而使吸引吸附力作用的時序，可為在使半導體晶片t與安裝工具56相抵接之前，亦可為與抵接同時，亦可為在抵接之後(但是，係為吸附噴嘴44開始下降之前)，只要設定為適宜之時序即可。吸附噴嘴44之吸引吸附力，在從將半導體晶片t遞交至安裝工具56處之後起直到吸附噴嘴44開始下降為止的期間中，係被解除。 One of the mounting tools 56 on the left side is moved to a position directly above the adsorption nozzle 44 that holds the semiconductor wafer t and is in a standby state, that is, at a receiving position. If the mounting tool 56 is positioned at the receiving position, the lifting device 41 is driven to raise the arm body 42 and the semiconductor wafer t held at the suction nozzle 44 is delivered to the holding surface of the mounting tool 56. The adsorption nozzle 44 is lowered to the original height after the semiconductor wafer t is delivered to the mounting tool 56, and is in a standby state. At the time of the delivery, the timing at which the suction force is applied to the mounting tool 56 may be before or after the semiconductor wafer t is brought into contact with the mounting tool 56, or may be after the abutment ( However, it is only necessary to set the timing to be suitable before the adsorption nozzle 44 starts to descend. The suction adsorption force of the adsorption nozzle 44 is released from the time when the semiconductor wafer t is delivered to the mounting tool 56 until the adsorption nozzle 44 starts to descend.
接收了半導體晶片t之安裝工具56，係朝向安裝位置而以在記憶部61處所預先設定了的移動軌跡來移動。半導體晶片t，係以使電極形成面(晶片上面)朝向下方的 狀態而被保持於安裝工具56處。在使將半導體晶片t作了保持的安裝工具56朝向安裝位置而移動的途中，使其通過第3攝像機57之上方。此時，係在第3攝像機57之上方而使安裝工具56之移動暫時停止，並藉由第3攝像機57來對於半導體晶片t之2個的對位記號進行攝像。根據此攝像畫像來檢測出各對位記號之位置，並基於所檢測出的位置來求取出相對於安裝工具57之半導體晶片t之位置偏移。若是攝像結束，則再度開始安裝工具56之移動。 The mounting tool 56 that has received the semiconductor wafer t is moved toward the mounting position by a movement trajectory preset at the memory unit 61. The semiconductor wafer t is such that the electrode forming surface (upper wafer surface) faces downward The state is maintained at the installation tool 56. In the middle of moving the mounting tool 56 holding the semiconductor wafer t toward the mounting position, it passes over the third camera 57. At this time, the movement of the attachment tool 56 is temporarily stopped above the third camera 57, and the alignment marks of the semiconductor wafer t are imaged by the third camera 57. The position of each registration mark is detected based on the captured image, and the positional deviation of the semiconductor wafer t with respect to the mounting tool 57 is extracted based on the detected position. If the imaging is finished, the movement of the installation tool 56 is started again.
在對於被保持在安裝工具56處之半導體晶片t作了攝像之後，使安裝工具56移動至安裝位置處，並對於被定位在安裝位置處之支持基板W上的安裝區域而安裝半導體晶片t。此時，當由第3攝像機57所致之半導體晶片t之位置檢測的結果，半導體晶片t係相對於安裝工具56而產生有位置偏移的情況時，係以對於所檢測出的位置偏移作修正的方式，來對於安裝工具56之移動進行修正，並將安裝工具56定位在安裝位置處。又，當在工程(2-2)中而檢測出了支持基板W之傾斜θ的情況時，係亦藉由安裝工具56而對於此傾斜θ作修正。之後，使安裝工具56下降，並將半導體晶片t對於支持基板W之特定之安裝區域作加壓而進行安裝。 After imaging the semiconductor wafer t held at the mounting tool 56, the mounting tool 56 is moved to the mounting position, and the semiconductor wafer t is mounted for the mounting area on the support substrate W positioned at the mounting position. At this time, when the semiconductor wafer t is displaced with respect to the mounting tool 56 as a result of the position detection of the semiconductor wafer t by the third camera 57, it is offset with respect to the detected position. The correction is made to correct the movement of the installation tool 56 and to position the installation tool 56 at the installation location. Further, when the inclination θ of the support substrate W is detected in the item (2-2), the inclination θ is also corrected by the attachment tool 56. Thereafter, the mounting tool 56 is lowered, and the semiconductor wafer t is pressed against a specific mounting region of the support substrate W to be mounted.
對於支持基板W之半導體晶片t的接合，係 利用預先被貼附在支持基板W之表面或者是半導體晶片t之下面的黏晶薄膜(Die Attach Film：DAF)之黏著力來進行。半導體晶片t之接合，係亦可預先在平台21處設置加熱器，並將半導體晶片t對於被加熱了的支持基板W作加壓而實施之。加熱器，係亦可被內藏於安裝工具56中。若是將半導體晶片t作了預先所設定的時間之加壓，則係將半導體晶片t之吸附解除，並使安裝工具56一直上升至原本的高度處。結束了安裝的安裝工具56，係朝向接收位置而移動。 For the bonding of the semiconductor wafer t supporting the substrate W, The adhesion is performed by a bonding force of a die attach film (DAF) which is previously attached to the surface of the support substrate W or under the semiconductor wafer t. The bonding of the semiconductor wafer t may be performed by previously providing a heater on the stage 21 and pressurizing the semiconductor wafer t against the heated support substrate W. The heater can also be built into the installation tool 56. When the semiconductor wafer t is pressurized for a predetermined time, the adsorption of the semiconductor wafer t is released, and the mounting tool 56 is raised to the original height. The installed installation tool 56 is moved toward the receiving position.
與上述之半導體晶片t之安裝工程的動作並行地，而實行被保持在晶圓環支持器12處之晶圓環11上的半導體晶片t之節距進送(將下一個被取出的半導體晶片定位於取出位置處之動作)、和半導體晶片t之位置檢測(與在工程(3)中之(3-1)同樣的動作)、和由另外一方(右側)之移載部40B之吸附噴嘴44所致的半導體晶片t之取出(與在工程(3)中之(3-2)同樣的動作)、以及由另外一方(右側)之安裝部50B的安裝工具56所致之半導體晶片t之接收(與在工程(3)中之(3-3)同樣的動作)。 In parallel with the operation of the above-described mounting process of the semiconductor wafer t, the pitch feeding of the semiconductor wafer t held on the wafer ring 11 at the wafer ring holder 12 is performed (the next taken semiconductor wafer is taken out) Positioning detection at the take-out position), position detection of the semiconductor wafer t (the same operation as (3-1) in the item (3)), and adsorption nozzle of the transfer unit 40B by the other (right side) The semiconductor wafer t is removed by 44 (the same operation as (3-2) in the item (3)), and the semiconductor wafer t is caused by the mounting tool 56 of the other (right) mounting portion 50B. Receive (the same action as (3-3) in project (3)).
與使結束了安裝的安裝部50A之安裝工具56朝向接收位置移動一事同時並行地，使在接收位置處而接收了半導體晶片t的另外一方之安裝部50B之安裝工具56的朝向安裝位置之移動開始。平台21，係為了將下一個安裝區域定位在安裝位置處，而開始節距移動。被定位 在安裝位置處的安裝部50B之安裝工具56，係藉由進行與安裝部50A同樣的動作(與在工程(4)中之(4-1)以及(4-2)同樣的動作)，而將半導體晶片t對於支持基板W之特定之安裝區域作加壓而進行安裝。結束了安裝的安裝工具56，係朝向接收位置而移動。 In parallel with the movement of the mounting tool 56 of the mounting portion 50A that has finished mounting toward the receiving position, the mounting position of the mounting tool 56 of the other mounting portion 50B that receives the semiconductor wafer t at the receiving position is moved toward the mounting position. Start. The platform 21 starts the pitch movement in order to position the next mounting area at the mounting position. Being positioned The mounting tool 56 of the mounting portion 50B at the mounting position performs the same operation as the mounting portion 50A (the same operation as (4-1) and (4-2) in the engineering (4)). The semiconductor wafer t is mounted by pressurizing a specific mounting region of the support substrate W. The installed installation tool 56 is moved toward the receiving position.
將上述之由安裝部50A之安裝工具56所致的半導體晶片t之接收動作以及安裝動作、和由安裝部50B之安裝工具56所致的半導體晶片t之接收動作以及安裝動作，交互地反覆進行，直到晶圓環11之半導體晶片t耗盡為止。亦即是，左右之移載部40A、40B之吸附噴嘴44，係交互進行半導體晶片t之取出，左右之安裝部50A、50B之安裝工具56，係交互進行半導體晶片t之接收和安裝。如此這般，藉由2個的安裝部50A、50B來交互進行半導體晶片t之安裝，直到晶圓環11之半導體晶片t耗盡為止。 The above-described receiving operation and mounting operation of the semiconductor wafer t by the mounting tool 56 of the mounting portion 50A, and the receiving operation and mounting operation of the semiconductor wafer t by the mounting tool 56 of the mounting portion 50B are alternately repeated. Until the semiconductor wafer t of the wafer ring 11 is exhausted. That is, the adsorption nozzles 44 of the left and right transfer portions 40A and 40B alternately take out the semiconductor wafer t, and the mounting tools 56 of the left and right mounting portions 50A and 50B exchange and mount the semiconductor wafer t. In this manner, the mounting of the semiconductor wafer t is alternately performed by the two mounting portions 50A and 50B until the semiconductor wafer t of the wafer ring 11 is exhausted.
另外，如同在後述之圖12中所示一般，當在1個的安裝區域MA中安裝複數之半導體晶片t1~t3的情況時，係在如同上述一般地而結束了第1個的半導體晶片t1之安裝之後，在零件供給部10處安置被搭載有第2個的半導體晶片t2之晶圓環11，並在基板搬送部30之裝載器處，安置被安裝了第1個的半導體晶片t1之支持基板W。之後，藉由實行與上述之動作同樣的動作，係對於被安裝了第1個的半導體晶片t1之各安裝區域MA而依序進行第2個的半導體晶片t2之安裝。如此這般，若是第2 個的半導體晶片t2被安裝於所有的被安裝有t1之安裝區域MA處，則係在零件供給部10處安置被搭載有第3個的半導體晶片t3之晶圓環11，並在基板搬送部30之裝載器處，安置被安裝了半導體晶片t1、t2之支持基板W，再藉由同樣的動作來進行第3個的半導體晶片t3之安裝。如此這般，在支持基板W之各安裝區域MA處安裝複數之半導體晶片t1~t3。 In addition, as shown in FIG. 12 which will be described later, when a plurality of semiconductor wafers t1 to t3 are mounted in one mounting region MA, the first semiconductor wafer t1 is ended as described above. After the mounting, the wafer ring 11 on which the second semiconductor wafer t2 is mounted is placed in the component supply unit 10, and the semiconductor wafer t1 to which the first semiconductor wafer is mounted is placed at the loader of the substrate transfer unit 30. Support substrate W. Then, by performing the same operation as the above-described operation, the second semiconductor wafer t2 is sequentially mounted on each of the mounting regions MA on which the first semiconductor wafer t1 is mounted. So, if it is the second The semiconductor wafers t2 are mounted on all of the mounting areas MA to which t1 is mounted, and the wafer ring 11 on which the third semiconductor wafer t3 is mounted is placed in the component supply unit 10, and is placed in the substrate transfer unit. At the loader of 30, the support substrate W on which the semiconductor wafers t1 and t2 are mounted is placed, and the third semiconductor wafer t3 is mounted by the same operation. In this manner, a plurality of semiconductor wafers t1 to t3 are mounted at the respective mounting regions MA of the support substrate W.
當在1個的安裝區域MA中安裝複數之半導體晶片t1~t3的情況時，係並不被限定於如同上述一般之在結束了第1個的半導體晶片t1之對於所有的支持基板W之安裝之後再切換為第2個的半導體晶片t2之安裝方法。例如，係亦可構成為若是對於1枚的支持基板W而結束了第1個的半導體晶片t1之安裝，則切換為第2個的半導體晶片t2。關於第3個的半導體晶片t3，亦為相同，係可構成為若是對於1枚的支持基板W而結束了第2個的半導體晶片t2之安裝，則切換為第3個的半導體晶片t3。亦即是，係亦可構成為以支持基板W之單位來進行複數品種之半導體晶片t之安裝。於此情況，由於直到對於1個的支持基板W而結束的所有的品種之半導體晶片t之安裝為止，均不會將支持基板W從平台21上而卸下，因此，係能夠使複數品種之半導體晶片t的安裝精確度更進一步提昇。 When a plurality of semiconductor wafers t1 to t3 are mounted in one mounting area MA, it is not limited to the mounting of all the supporting substrates W of the first semiconductor wafer t1 as described above. Then, the method of mounting the second semiconductor wafer t2 is switched. For example, if the mounting of the first semiconductor wafer t1 is completed for one support substrate W, the second semiconductor wafer t2 may be switched. In the case of the semiconductor wafer t3 of the third semiconductor wafer t3, the semiconductor wafer t2 of the third semiconductor wafer t2 is replaced by the mounting of the second semiconductor wafer t2. In other words, it is also possible to configure a plurality of semiconductor wafers t to be mounted in units of the support substrate W. In this case, since the support substrate W is not detached from the stage 21 until the mounting of the semiconductor wafer t of all the types of the support substrate W is completed, it is possible to make a plurality of types. The mounting accuracy of the semiconductor wafer t is further improved.
在上述之將各品種之半導體晶片1安裝於所有的支持基板W處的方法中，結束了第1品種的半導體 晶片t1之安裝之支持基板W，係從平台21上而暫時被搬出，並在安裝第2品種之半導體晶片t2時，再度被載置於平台21上。因此，在安裝第1品種之半導體晶片t1時、和在安裝第2品種之半導體晶片t2時，於平台21上的支持基板W之位置中，係會產生有偏移，亦即是產生有位置偏移。就算是偶爾會有在平台21上而成為相同之位置的情況，大致上的情況中也均會成為有所偏移。雖然是藉由全域辨識來對於支持基板W之位置作了辨識，但是，仍會有起因於辨識誤差等之因素而導致在支持基板W之辨識位置中產生有偏移的可能性。故而，可以推測到，相應於此，第1品種與第2品種之間的相對位置精確度係會降低。相對於此，在並不從平台21而將支持基板W卸下地來將第1品種之半導體晶片t1和第2品種之半導體晶片t2接續作了安裝的情況時，係能夠防止起因於辨識誤差所導致的位置偏移。故而，係能夠使第1品種與第2品種之間的相對位置精確度提昇。 In the above method of mounting the semiconductor wafer 1 of each type on all the support substrates W, the semiconductor of the first type is terminated. The support substrate W to which the wafer t1 is mounted is temporarily carried out from the stage 21, and is again placed on the stage 21 when the semiconductor wafer t2 of the second type is mounted. Therefore, when the semiconductor wafer t1 of the first type is mounted and when the semiconductor wafer t2 of the second type is mounted, an offset occurs in the position of the support substrate W on the stage 21, that is, a position is generated. Offset. Even in the case where there are occasional positions on the platform 21, the situation will be offset in the general case. Although the position of the support substrate W is identified by global identification, there is still a possibility that an offset occurs in the identification position of the support substrate W due to a factor of identification error or the like. Therefore, it can be inferred that, correspondingly, the relative positional accuracy between the first variety and the second variety is lowered. On the other hand, when the semiconductor wafer t1 of the first type and the semiconductor wafer t2 of the second type are successively attached without removing the support substrate W from the stage 21, it is possible to prevent the occurrence of the identification error. The resulting positional offset. Therefore, the relative positional accuracy between the first type and the second type can be improved.
被安裝在支持基板W之複數之安裝區域的各者處之半導體晶片t，係並不被限定於1個品種。亦可將1個的支持基板W區分成複數之區域，並在各區域中而安裝相異品種之半導體晶片t。例如，係亦可構成為在支持基板W之一半的第1區域中安裝A品種之半導體晶片ta，並在剩餘之一半的第2區域中安裝B品種之半導體晶片tb。從被安裝有A品種之半導體晶片ta的第1區域，係製造出A品種的半導體封裝。從被安裝有B品種之半 導體晶片tb的區域，係製造出B品種的半導體封裝。 The semiconductor wafer t attached to each of the plurality of mounting regions supporting the substrate W is not limited to one type. It is also possible to divide one support substrate W into a plurality of regions, and to mount semiconductor wafers t of different types in each region. For example, the semiconductor wafer ta of the A type may be mounted in the first region of one half of the support substrate W, and the semiconductor wafer tb of the B type may be mounted in the second region of the remaining half. A semiconductor package of the A type is manufactured from the first region of the semiconductor wafer ta to which the A type is mounted. From being installed with half of the B variety In the region of the conductor wafer tb, a B-type semiconductor package is manufactured.
於此情況，在A品種之半導體晶片ta和B品種之半導體晶片tb處，由於在後續工程中所形成的再配線層之電路圖案係為相異，因此再配線形成用之曝光圖案也會成為相異。故而，可以推測到，對於半導體晶片ta、tb之安裝誤差而藉由曝光工程來進行修正一事，係會變得更加困難。在適用了實施形態之安裝裝置以及安裝方法的情況時，就算是在A品種之半導體晶片ta與B品種之半導體晶片tb之間，亦能夠以高的相對位置精確度來進行安裝。故而，係成為亦能夠將對於被安裝有A品種之半導體晶片ta的區域所進行之曝光處理和對於被安裝有B品種之半導體晶片tb的區域所進行之曝光處理統籌性地進行，而能夠使生產效率提昇。 In this case, in the semiconductor wafer tb of the semiconductor wafer of the A type and the semiconductor wafer tb of the B type, since the circuit pattern of the rewiring layer formed in the subsequent process is different, the exposure pattern for rewiring formation becomes Different. Therefore, it can be inferred that it is more difficult to correct the mounting errors of the semiconductor wafers ta and tb by exposure engineering. In the case where the mounting device and the mounting method of the embodiment are applied, it is possible to mount the semiconductor wafer ta of the A type and the semiconductor wafer tb of the B type with high relative positional accuracy. Therefore, it is possible to collectively perform the exposure processing for the region in which the semiconductor wafer ta of the A type is mounted and the exposure processing for the region in which the semiconductor wafer tb of the B type is mounted. Increased production efficiency.
當在第1區域中安裝A品種之半導體晶片ta，並在第2區域中安裝B品種之半導體晶片tb時，也會有像是A品種之半導體晶片ta與B品種之半導體晶片tb間的尺寸為相異的情況等之A品種之安裝節距與B品種之安裝節距有所相異的情形。在此種情況時，於安裝A品種之半導體晶片ta時、和於安裝B品種之半導體晶片tb時，藉由對於平台21之進送量作切換，係能夠將複數品種之半導體晶片ta、tb良好地安裝在支持基板W之複數之區域處。同樣的，係亦可構成為在支持基板W之第1區域中安裝構成第1多晶片封裝的C品種與D品種之半導體晶片之組合，並在第2區域中安裝構成第2多晶片封 裝的E品種與F品種之半導體晶片之組合。不論是在此些之何者的安裝中，均同樣的，係可構成為一次安裝1個品種之半導體晶片t地來在複數之支持基板W處進行安裝，亦可構成為以支持基板W之單位來進行複數品種之半導體晶片之安裝。此些之具體性的安裝工程，係如同前述一般。 When the semiconductor wafer ta of the A type is mounted in the first region and the semiconductor wafer tb of the B type is mounted in the second region, there is also a size between the semiconductor wafer ta of the A type and the semiconductor wafer tb of the B type. The installation pitch of the A variety and the installation pitch of the B type are different for different situations. In this case, when the semiconductor wafer ta of the A type is mounted, and when the semiconductor wafer tb of the B type is mounted, by switching the amount of feed to the stage 21, it is possible to convert a plurality of semiconductor wafers ta, tb. It is well mounted at a plurality of areas of the support substrate W. Similarly, a combination of a C-type and a D-type semiconductor wafer constituting the first multi-chip package may be mounted in the first region of the support substrate W, and the second multi-chip package may be mounted in the second region. A combination of a packaged E-type and a F-type semiconductor wafer. In any of these installations, the semiconductor wafers of one type can be mounted at a time to be mounted on a plurality of support substrates W, or can be configured as a unit supporting the substrate W. To install a variety of semiconductor wafers. The specific installation works of these are as described above.
另外，在此種情況時，亦同樣的，支持基板W之全域記號的辨識，係只要在最初而進行1次即可，而能夠成為當安裝半導體晶片t之區域從第1區域而移動至第2區域時並不需要重新對於支持基板W之全域記號作辨識。又，當在平台21處設置有加熱器等而對於支持基板W作加熱的情況時，係亦可構成為能夠在半導體晶片t會先被安裝之第1區域和之後再被安裝之第2區域處，而對於平台21之修正資料作切換。藉由設為此種構成，由於就算是當正在對於第1區域而安裝A品種之半導體晶片ta的期間中而在支持基板W處之與第2區域相對應的部份之熱膨脹量有所擴大，亦成為能夠對此採取對策，因此，係能夠將半導體晶片t(tb)之安裝精確度維持於高精確度。在如同上述一般之以支持基板W之單位來進行複數品種之半導體晶片t之安裝的情況時，若是作為零件供給部10而使用由帶饋送機所致之晶片供給機構，並裝備與複數之品種相對應的複數之帶饋送機，則為理想。 In this case as well, the identification of the global mark of the support substrate W may be performed once in the first place, and the area in which the semiconductor wafer t is mounted may be moved from the first region to the first region. In the case of the 2 area, it is not necessary to re-identify the global mark of the support substrate W. Further, when a heater or the like is provided on the stage 21 and the support substrate W is heated, it may be configured as a second region that can be mounted first and after the semiconductor wafer t is first mounted. At the same time, the correction data of the platform 21 is switched. With this configuration, even when the semiconductor wafer ta of the A type is being mounted for the first region, the amount of thermal expansion of the portion corresponding to the second region at the support substrate W is enlarged. It is also possible to take countermeasures against this, and therefore, it is possible to maintain the mounting accuracy of the semiconductor wafer t(tb) with high accuracy. In the case where a plurality of types of semiconductor wafers t are mounted in units of the support substrate W as described above, the wafer supply mechanism by the tape feeder is used as the component supply unit 10, and is equipped with a plurality of varieties. It is ideal for a corresponding multi-feeder.
結束了上述之1個品種的半導體晶片t或是複數品種之半導體晶片t1、t2、t3或者是半導體晶片ta、tb 等之安裝的支持基板W，係被送至以下所述之後續工程中，並藉由其而製作出如同半導體封裝一般之封裝零件。亦即是，結束了半導體晶片之安裝的支持基板W，係依序被送至密封工程以及再配線層之形成工程處。在密封工程中，係於被安裝在支持基板W上的半導體晶片間之空隙中填充樹脂，並藉由此而形成擬似晶圓。擬似晶圓，係被送至再配線層之形成工程處。在再配線層之形成工程中，係實施有在半導體晶圓之製造製程中的電路之形成工程，亦即是實施有光阻材料等之感光材料的塗布工程、感光材料的曝光以及顯像工程、蝕刻工程、離子植入工程、光阻之剝離工程等，藉由此些之工程，在擬似晶圓之半導體晶片上係被形成有再配線層。被形成有再配線層之擬似晶圓，係被送至切割工程處，並於該處而將擬似晶圓個片化，藉由此，而製造出如同半導體封裝一般之封裝零件。 Finishing one of the above-mentioned semiconductor wafers t or a plurality of types of semiconductor wafers t1, t2, t3 or semiconductor wafers ta, tb The mounted support substrate W is sent to a subsequent process as described below, and a packaged component such as a semiconductor package is fabricated therefrom. That is, the support substrate W that has finished the mounting of the semiconductor wafer is sequentially sent to the sealing engineering and the formation of the rewiring layer. In the sealing process, a resin is filled in a space between semiconductor wafers mounted on a support substrate W, thereby forming a pseudo wafer. The pseudo-wafer is sent to the formation of the rewiring layer. In the formation of the rewiring layer, the formation of a circuit in the manufacturing process of the semiconductor wafer, that is, the coating process of the photosensitive material such as a photoresist material, the exposure of the photosensitive material, and the development project are performed. The etching process, the ion implantation process, the stripping process of the photoresist, and the like, by which the rewiring layer is formed on the wafer-like semiconductor wafer. The pseudo-wafer formed with the rewiring layer is sent to the cutting engineering office where the pseudo-wafer is sliced, thereby producing a packaged component like a semiconductor package.
如此這般，實施形態之封裝零件之安裝方法，係如同圖14中所示一般，具備有：將電子零件安裝於支持基板W之複數之安裝區域的各者處之安裝工程S1；和藉由將被安裝於複數之安裝區域處的電子零件整批地作密封，來形成擬似晶圓之密封工程S2；和在擬似晶圓之電子零件上形成再配線層之再配線工程S3、以及對於擬似晶圓進行切割而製造封裝零件之切割工程S4。再配線層之形成工程S3，係如同上述一般地，而具備有感光材料的塗布工程S31、感光材料的曝光以及顯像工程S32、蝕刻工程S33、離子植入工程S34、光阻之剝離工程 S35等。在實施形態之封裝零件之製造方法中的電子零件之安裝工程，係基於實施形態之電子零件之安裝方法來實施。在實施形態之封裝零件之製造方法中，被安裝於支持基板W之各安裝區域處的電子零件，係如同上述一般，可身為1個的半導體晶片t，亦可身為複數種類之半導體晶片或者是相同品種之複數之半導體晶片。電子零件之品種和數量，係並不被特別作限定。 As described above, the mounting method of the packaged component of the embodiment is as shown in FIG. 14 and includes: an installation process S1 in which the electronic component is mounted on each of the plurality of mounting areas of the support substrate W; The electronic components mounted at the plurality of mounting areas are sealed in batches to form a wafer-like sealing process S2; and a rewiring process S3 for forming a rewiring layer on the electronic components of the pseudo-wafer, and The wafer is cut to produce a cutting part S4 of the packaged part. The re-wiring layer forming process S3 is as follows, and is provided with a coating process S31 of a photosensitive material, exposure and development of a photosensitive material S32, etching process S33, ion implantation engineering S34, and stripping work of a photoresist. S35 and so on. The mounting process of the electronic component in the method of manufacturing a package component according to the embodiment is carried out based on the mounting method of the electronic component according to the embodiment. In the method of manufacturing a package component according to the embodiment, the electronic component mounted on each mounting region of the support substrate W may be one semiconductor wafer t as described above, or may be a plurality of semiconductor wafers. Or a plurality of semiconductor wafers of the same variety. The variety and quantity of electronic parts are not specifically limited.
在實施形態之安裝裝置1中，係將2個的安裝部50A、50B之安裝工具56之移動，設為從半導體晶片t之接收位置起直到安裝位置為止的一定之路徑，並且將由2個的安裝部50A、50B之安裝工具56所致的安裝位置設定為一定之位置。進而，支持基板W之各安裝區域，係藉由平台部20之XY移動機構而被依序定位在安裝位置處。此時，由平台部20之XY移動機構所致之平台21的移動，係使用基於預先所取得了的平台21之移動位置誤差所得到的修正資料，而被作修正。故而，係能夠盡可能地降低基於2個的安裝部50A、50B之移動誤差和平台21之移動位置誤差所導致的半導體晶片t之安裝誤差。如此這般，係能夠同時達成將起因於使用2個的安裝部50A、50B所導致的半導體晶片t之安裝時間(作為安裝裝置1之在1個的半導體晶片t之安裝中所需要的節拍時間(tact time))降低以及使半導體晶片t之安裝精確度提昇的目的。 In the mounting device 1 of the embodiment, the movement of the mounting tool 56 of the two mounting portions 50A and 50B is a fixed path from the receiving position of the semiconductor wafer t to the mounting position, and two paths are provided. The mounting position by the mounting tool 56 of the mounting portions 50A, 50B is set to a fixed position. Further, each of the mounting regions of the support substrate W is sequentially positioned at the mounting position by the XY moving mechanism of the platform portion 20. At this time, the movement of the stage 21 by the XY moving mechanism of the platform unit 20 is corrected by using the correction data obtained based on the movement position error of the platform 21 obtained in advance. Therefore, it is possible to reduce the mounting error of the semiconductor wafer t due to the movement error of the two mounting portions 50A, 50B and the movement position error of the stage 21 as much as possible. In this way, it is possible to simultaneously achieve the mounting time of the semiconductor wafer t due to the use of the two mounting portions 50A, 50B (the tact time required for mounting the semiconductor wafer t as one of the mounting devices 1) (tact time)) The purpose of lowering and improving the mounting accuracy of the semiconductor wafer t.
亦即是，2個的安裝部50A、50B之安裝工具 56，由於係分別僅為在從半導體晶片t之接收位置起直到安裝位置為止的一定之路徑上移動，因此，就算是產生了移動誤差，也能夠藉由1次的調整(校正)來針對對於安裝位置之定位作修正。進而，由於2個的安裝部50A、50B係在同一之安裝位置處而進行安裝動作，因此，相較於在各別之安裝位置處而進行安裝的情況，係能夠使安裝精確度提昇，並且係能夠在短時間內來進行安裝頭之移動位置的調整(校正)。 That is, the installation tools of the two mounting portions 50A, 50B 56, since the movement is only on a certain path from the receiving position of the semiconductor wafer t to the mounting position, even if a movement error occurs, the adjustment can be performed by one adjustment (correction). The position of the installation location is corrected. Further, since the two mounting portions 50A and 50B are attached to the same mounting position and the mounting operation is performed, the mounting accuracy can be improved as compared with the case where the mounting is performed at the respective mounting positions. The adjustment (correction) of the movement position of the mounting head can be performed in a short time.
並且，由於係使用修正資料來對於平台21之移動位置誤差作修正，因此，係能夠以預先所設定了的節距來以良好精確度進行移動，藉由此，係能夠將支持基板W的各安裝區域的對於安裝位置之定位精確度提高。因此，係能夠同時達成±5μm以下之安裝精確度和0.6秒以下的節拍時間。其結果，係能夠對於並未在各安裝區域之每一者處而設置位置檢測用之記號之支持基板W，而將包含有半導體晶片t之電子零件，以使相互之間隔會成為預先所設定之間隔的方式來以良好精確度進行安裝，並且，係能夠在支持基板W上，而將包含有半導體晶片t之電子零件以良好之生產性來進行安裝。亦即是，藉由由2個的安裝部50A、50B所致之交互安裝，係能夠謀求在半導體晶片t之安裝中所需要的節拍時間之縮短，並且，藉由在共通之一定位置處所進行的安裝和平台21之移動誤差之修正，係能夠得到安裝精確度之提昇效果和防止生產性之降低的效果。 Further, since the correction data is used to correct the movement position error of the stage 21, it is possible to move with good precision with a pitch set in advance, whereby each of the support substrates W can be supported. The positioning accuracy of the mounting area for the mounting position is increased. Therefore, the mounting accuracy of ±5 μm or less and the tact time of 0.6 second or less can be achieved at the same time. As a result, it is possible to set the electronic component including the semiconductor wafer t to the support substrate W in which the mark for position detection is not provided in each of the mounting regions, so that the mutual intervals are set in advance. The interval is mounted with good precision, and the electronic component including the semiconductor wafer t can be mounted on the support substrate W with good productivity. In other words, by the mutual mounting by the two mounting portions 50A and 50B, it is possible to shorten the tact time required for mounting the semiconductor wafer t, and by performing at a certain common position. The installation and the correction of the movement error of the platform 21 can achieve the effect of improving the installation accuracy and preventing the decrease in productivity.
例如，針對使2個的安裝頭在相異之一定位置處而安裝半導體晶片的情況作考慮。於此情況，係有必要進行2個的安裝頭之個別的朝向一定位置之移動位置的調整(校正)。通常，此種調整，係使用被配置在各別之一定位置處的攝像機來進行。若是在使此攝像機間之座標相互一致時而產生有誤差，則該誤差會作為2個的安裝頭之間之安裝誤差而顯現出來。 For example, a case in which two semiconductor mounting heads are mounted at different positions at different positions is considered. In this case, it is necessary to perform adjustment (correction) of the movement position of the two mounting heads toward the fixed position. Usually, such adjustment is performed using a camera that is disposed at a certain position. If there is an error in making the coordinates between the cameras coincide with each other, the error will appear as an installation error between the two mounting heads.
又，當使2個的安裝頭在相異之一定位置處而安裝半導體晶片的情況時，於支持基板上之安裝半導體晶片的位置係成為2個場所。由於移動誤差係會依存於場所而有所相異，因此移動誤差係有必要在2個場所處而分別進行測定。在1個場所的移動誤差之測定中，例如係需要3個小時左右。具體而言，針對300mm×300mm之支持基板，在對於以3mm間隔而設定為行列狀的測定點而對於移動誤差進行測定的情況時，基板上之測定點的數量，係成為縱方向：300mm/3mm=100點、橫方向：300mm/3mm=100點，而總共成為100點×100點=10000點。若是在1點的測定中需要2秒，則係成為10000點×2秒=20000秒=約5小時33分鐘。另外，在1點的測定中需要2秒的原因，係在於可以估計到為了使在使平台作了停止時所發生的震動收斂，係需要1秒多的等待時間之故。因此，當使2個的安裝頭在相異之一定位置處而安裝半導體晶片的情況時，相較於實施形態之安裝裝置1，係會耗費約5小時30分鐘的多餘的準備時間。生產量係會 產生與此時間之量相對應的減少。 Further, when the semiconductor wafer is mounted at a predetermined position by the two mounting heads, the position at which the semiconductor wafer is mounted on the supporting substrate is two places. Since the movement error varies depending on the location, it is necessary to measure the movement error at two locations. In the measurement of the movement error of one place, for example, it takes about 3 hours. Specifically, in the case of measuring a movement error with respect to a measurement substrate set to a matrix shape at intervals of 3 mm for a support substrate of 300 mm × 300 mm, the number of measurement points on the substrate is a longitudinal direction: 300 mm / 3mm = 100 points, horizontal direction: 300mm / 3mm = 100 points, and a total of 100 points × 100 points = 10000 points. If it takes 2 seconds to measure at one point, it is 10000 points × 2 seconds = 20,000 seconds = about 5 hours and 33 minutes. In addition, the reason why it takes 2 seconds to measure at one point is that it is estimated that a waiting time of more than one second is required in order to converge the vibration generated when the platform is stopped. Therefore, when the mounting heads of the two mounting heads are mounted at different positions, the mounting apparatus 1 of the embodiment consumes an unnecessary preparation time of about 5 hours and 30 minutes. Production volume A reduction corresponding to the amount of this time is produced.
另外，若是使用2個的攝像機來同時並行性地在2個場所處進行測定，則係能夠使測定時間成為與1個場所的情況時略同等。但是，係有必要進行用以使2個的攝像機之座標系相互合致的校正，此時，係會有產生誤差之虞。此係會成為使位置精確度降低的重要原因。又，由於係需要2個攝像機，因此成本也會增加。 In addition, when two cameras are used to simultaneously measure in two places in parallel, it is possible to make the measurement time slightly equal to that in one place. However, it is necessary to perform correction for making the coordinates of the two cameras match each other. In this case, there is a possibility of error. This is an important reason for reducing positional accuracy. Also, since two cameras are required, the cost is also increased.
進而，若是對於並不使支持基板W之平台21移動，而採用使安裝頭移動至各安裝區域處之構成，並在安裝頭側而作成修正資料的情況作考慮，則相較於在基板平台側處而作成修正資料的情況，係會成為需要龐大的修正資料，在校正中所需要的時間係會增長化。亦即是，安裝頭，係與基板平台相異，由於係在基板上安裝半導體晶片，因此係成為需要具有上下移動機構。故而，在作成修正資料時，除了起因於安裝頭之XY移動裝置之波動所導致的移動誤差以外，也需要針對起因於安裝頭之上下移動所導致的XY方向之位置偏移作考慮。 Further, in consideration of a configuration in which the mounting head is moved to the respective mounting regions without moving the platform 21 of the support substrate W, and the correction data is created on the mounting head side, it is compared with the substrate platform. In the case of making corrections on the side, it will become a huge amount of correction data, and the time required for correction will increase. That is, the mounting head is different from the substrate platform, and since the semiconductor wafer is mounted on the substrate, it is necessary to have a vertical movement mechanism. Therefore, in addition to the movement error caused by the fluctuation of the XY moving device of the mounting head, it is necessary to consider the positional shift in the XY direction caused by the movement of the mounting head up and down.
具體而言，就算是支持安裝頭之框架(例如Y軸移動裝置)為在左右方向上而位於相同之位置，當支持安裝頭之可動體為朝向右側而搖動的情況時和朝向左側而搖動的情況時，在一直下降至了對於平台21上之支持基板W而安裝半導體晶片t的高度之位置處時的安裝頭之前端的水平方向位置上，也會產生大幅度的差異。因此，係成為不僅是需要考慮安裝頭之X方向移動時或者是Y 方向移動時之蛇行，也需要將支持安裝頭之可動體的搖動作為安裝位置之偏移的重要因素而有所考慮。故而，就算是在平台21側處係身為並未產生有大的移動誤差之未滿上述之身為校正基板71之點記號72的節距之3mm的移動，在安裝頭側處，也會有於安裝工具處而產生大的移動誤差(例如，5μm以上)之虞。 Specifically, even if the frame supporting the mounting head (for example, the Y-axis moving device) is located at the same position in the left-right direction, when the movable body supporting the mounting head is rocked toward the right side and shaken toward the left side, In this case, a large difference occurs in the horizontal position of the front end of the mounting head when it is lowered to the position where the height of the semiconductor wafer t is mounted on the support substrate W on the stage 21. Therefore, it is not only necessary to consider the X-direction movement of the mounting head or Y Snakes in the direction of movement also need to consider the rocking action of the movable body supporting the mounting head as an important factor in the displacement of the mounting position. Therefore, even if it is a side of the platform 21 that does not have a large movement error, the movement of the pitch of the point mark 72 of the correction substrate 71 that is less than the above is 3 mm, and at the mounting head side, There is a large movement error (for example, 5 μm or more) at the installation tool.
因此，當在安裝頭側處而作成修正資料時，可以想見，係會有需要以較3mm而更短之間隔、例如於每1mm節距等之短間隔來對於移動位置偏移作測定。假設或是針對300mm×300mm之移動範圍而以1mm節距來對於移動位置偏移作測定，則係成為需要進行300點×300點=90000點之測定，相較於以3mm節距來進行測定的情況(在3mm節距的情況時，係為10000點)，測定場所係成為9倍的數量。故而，測定時間也會成為9倍，而成為需要耗費5小時33分鐘×9=49小時30分鐘。如此一來，係欠缺實用性。 Therefore, when the correction data is created at the mounting head side, it is conceivable that the movement position shift needs to be measured at a shorter interval of 3 mm, for example, every 1 mm pitch. Assuming that the displacement of the moving position is measured at a pitch of 300 mm × 300 mm with a pitch of 300 mm × 300 mm, it is necessary to measure 300 points × 300 points = 90000 points, compared to the measurement with a pitch of 3 mm. In the case of the case of a 3 mm pitch, it is 10,000 points, and the measurement location is nine times the number. Therefore, the measurement time is also 9 times, and it takes 5 hours and 33 minutes × 9 = 49 hours and 30 minutes. As a result, there is a lack of practicality.
並且，當除了可動體的搖動之外而更進而在基板平台側存在有上下方向之起伏的情況時，在將半導體晶片安裝於支持基板處時，高度位置係會成為依存於支持基板上之場所而有所相異。若是安裝頭之可動體有所傾斜，而安裝頭之上下移動的方向相對於垂直方向而有所傾斜，則起因於安裝面(基板表面)之高度的差異，安裝位置係會成為在水平方向上而有所偏移。若是亦對於此種事態作考慮，則修正資料之測定係會變得更加複雜化，在修 正資料之作成中係會需要耗費更多的時間。又，也會有導致修正精確度自身的降低之虞。 Further, when there is a undulation in the vertical direction on the substrate platform side in addition to the shaking of the movable body, when the semiconductor wafer is mounted on the support substrate, the height position becomes a place depending on the support substrate. And it is different. If the movable body of the mounting head is inclined, and the direction in which the mounting head moves up and down is inclined with respect to the vertical direction, the mounting position is in the horizontal direction due to the difference in the height of the mounting surface (substrate surface). There is some offset. If this situation is also considered, the measurement of the revised data will become more complicated. It will take more time to work on the middle of the data. Also, there is a flaw in the accuracy of the correction itself.
根據以上觀點，可以得知，具備有將由2個的安裝部50A、50B所致之安裝位置設定於相同之一定位置處並使被載置有支持基板W之平台21移動而將各安裝區域依序定位在安裝位置處並且使用修正資料來對於平台21之移動誤差作修正的構成之安裝裝置1，係能夠同時達成安裝精確度之提昇和節拍時間的縮短，並且在得到高生產性一事上而言係為有效。 From the above viewpoints, it can be seen that the mounting position of the two mounting portions 50A and 50B is set at the same predetermined position, and the platform 21 on which the support substrate W is placed is moved, and each mounting region is placed. The mounting device 1 which is positioned at the mounting position and which uses the correction data to correct the movement error of the platform 21 is capable of achieving both the improvement of the mounting accuracy and the shortening of the tact time, and is highly productive. The language is valid.
實施形態之安裝裝置1，係如同圖12中所示一般，對於當在1個的安裝區域MA處安裝複數種類之半導體晶片t1、t2、t3等的情況時、或者是當將1種類或複數種類之半導體晶片t和二極體或電容器等作安裝的情況時，係為有效。如同前述一般，當在1個的安裝區域中安裝複數種類之電子零件的情況時，由於係會有產生在1個的安裝區域(封裝)內的複數之電子零件之相對性之位置偏移之虞，因此，係並無法適用在對於1個的安裝區域(封裝)而組入1個的半導體晶片之單晶封裝中所能夠適用的「在曝光時對於安裝誤差作修正」之技術。因此，係有必要將複數之電子零件的安裝時之位置精確度自身作提高。針對此點，實施形態之安裝裝置1，由於係能夠將包含半導體晶片t之電子零件之個別的安裝精確度提高，因此，就算是當在1個的安裝區域內而安裝複數之電子零件的情況時，亦成為能夠將在1個的安裝區域內之複數之電 子零件的相對性之位置精確度提高。 The mounting device 1 of the embodiment is as shown in FIG. 12, when a plurality of types of semiconductor wafers t1, t2, t3, etc. are mounted in one mounting area MA, or when one type or plural is used. It is effective when a semiconductor wafer t of a type and a diode or a capacitor are mounted. As in the case of the above, when a plurality of types of electronic components are mounted in one mounting area, there is a positional shift of the relative position of the plurality of electronic components generated in one mounting area (package). In other words, it is not possible to apply a technique of "correcting the mounting error at the time of exposure" which can be applied to a single crystal package in which one semiconductor wafer is incorporated in one mounting region (package). Therefore, it is necessary to improve the positional accuracy of the mounting of a plurality of electronic components. In this regard, in the mounting device 1 of the embodiment, since the individual mounting accuracy of the electronic component including the semiconductor wafer t can be improved, even when a plurality of electronic components are mounted in one mounting region, At the same time, it becomes a plurality of electricity that can be placed in one installation area. The relative positional accuracy of the sub-parts is increased.
在使用2個的安裝部50A、50B的情況時，係會有在該些安裝部50A、50B之安裝工具56之間而產生相對性之位置偏移之虞。針對此點，在安裝位置之下方配置攝像機，並將被定位於安裝位置處之安裝工具56的位置分別檢測出來，再檢測出該些之安裝工具56之相對位置之偏移並進行修正的方法，係為有效。在2個的安裝工具56之間之相對性之位置偏移的檢測中，係使用有圖4中所示之第4攝像機。第4攝像機23，係在平台21之前方側端部處而被朝向上方地作安裝。第4攝像機23，係從下方來對於被定位在安裝位置處之安裝工具56進行攝像。在由第4攝像機23所致之攝像時，係藉由平台21之移動來使第4攝像機23移動至安裝位置之正下方。第4攝像機23，係為作為第3辨識部而起作用者。 When two mounting portions 50A and 50B are used, there is a possibility of a relative positional shift between the mounting tools 56 of the mounting portions 50A and 50B. In response to this, the camera is disposed below the mounting position, and the positions of the mounting tools 56 positioned at the mounting position are respectively detected, and the offset of the relative positions of the mounting tools 56 is detected and corrected. , is valid. In the detection of the relative positional deviation between the two mounting tools 56, the fourth camera shown in Fig. 4 is used. The fourth camera 23 is attached to the front side of the platform 21 and is mounted upward. The fourth camera 23 images the mounting tool 56 positioned at the mounting position from below. At the time of imaging by the fourth camera 23, the fourth camera 23 is moved right below the mounting position by the movement of the stage 21. The fourth camera 23 is a member that functions as a third recognition unit.
2個的安裝工具56之移動位置偏移的檢測，係在將半導體晶片t保持於安裝工具56處的狀態下來進行。另外，位置偏移之檢測，係亦可使用為了校正用所製作之假的半導體晶片。進而，係亦可並不使用半導體晶片地，而使用安裝工具56之吸附孔或者是被形成在安裝工具56之保持面上的記號，來檢測出安裝工具56之位置偏移。首先，藉由前述之工程(3)之動作來將半導體晶片t保持於安裝工具56處，並進行工程(4)之(4-1)的動 作，來檢測出半導體晶片t之位置偏移，並且對於所檢測出的位置偏移作修正，而將安裝工具56定位在安裝位置處(4-2)。藉由第4攝像機23，來對於被保持於被定位在安裝位置處之安裝工具56處的半導體晶片t進行攝像。控制部60，係基於第4攝像機23之攝像畫像而檢測出半導體晶片t之位置，並將此位置資料與預先所記憶在記憶部61中之正確之位置作比較，而檢測出半導體晶片t之位置偏移。若是在安裝工具56處並不存在有位置偏移，則半導體晶片t係並不會產生位置偏移地而被定位在安裝位置處。在產生有位置偏移的情況時，該位置偏移係成為安裝頭55之移動位置偏移。 The detection of the movement positional deviation of the two mounting tools 56 is performed while holding the semiconductor wafer t at the mounting tool 56. In addition, for the detection of the positional deviation, it is also possible to use a dummy semiconductor wafer which is fabricated for correction. Further, the positional deviation of the mounting tool 56 can be detected by using the suction hole of the mounting tool 56 or the mark formed on the holding surface of the mounting tool 56 without using the semiconductor wafer. First, the semiconductor wafer t is held at the mounting tool 56 by the operation of the above-mentioned work (3), and the movement of (4-1) of the engineering (4) is performed. To detect the positional shift of the semiconductor wafer t, and to correct the detected positional offset, the mounting tool 56 is positioned at the mounting position (4-2). The semiconductor wafer t held by the mounting tool 56 positioned at the mounting position is imaged by the fourth camera 23. The control unit 60 detects the position of the semiconductor wafer t based on the imaged image of the fourth camera 23, and compares the position data with the correct position previously stored in the memory unit 61 to detect the semiconductor wafer t. Position offset. If there is no positional offset at the mounting tool 56, the semiconductor wafer t is positioned at the mounting position without a positional offset. When a positional shift occurs, the positional shift becomes the shifting position of the mounting head 55.
將上述之被定位在安裝位置處之半導體晶片t的攝像以及位置偏移之檢測，對於左右之安裝部50A、50B之安裝工具56而分別進行之。對於雙方之安裝工具56之移動位置偏移作比較，當產生有差距的情況時，係以其中一方之安裝部50A的安裝工具56作為基準，並對於另外一方之安裝部50B的安裝工具56之移動位置，而進行會使所求取出之差距消失的量之修正。藉由設為此種構成，係能夠消除起因於使用有2個的安裝部50A、50B一事所導致的安裝誤差之發生。 The detection of the imaging and positional shift of the semiconductor wafer t positioned at the mounting position described above is performed for the mounting tools 56 of the left and right mounting portions 50A, 50B, respectively. When the difference in the movement position of the mounting tools 56 is compared between the two, the mounting tool 56 of one of the mounting portions 50A is used as a reference, and the mounting tool 56 of the other mounting portion 50B is used. Move the position and make a correction for the amount that will cause the gap to be taken out to disappear. With such a configuration, it is possible to eliminate the occurrence of mounting errors caused by the use of the two mounting portions 50A and 50B.
安裝工具56之位置偏移的修正，係並不被限定於上述之使另外一方之安裝部50B的安裝工具56之移動位置與其中一方之安裝部50A的安裝工具56之移動位置相配合的方法。例如，係亦可針對左右之安裝工具 56，而均以相對於預先所決定了的基準之安裝位置來使移動位置相配合的方式來進行修正。在採用此種構成的情況時，係更能夠將對位精確度提高。此係因為，在使另外一方之安裝工具56之移動位置與其中一方之安裝工具56之移動位置相配合的情況時，在成為基準之其中一方之安裝工具56的移動位置自身處，係會成為包含有一定之量的偏差。就算是看起來好像是移動至相同的位置處，起因於機械性之誤差等，也會產生1μm或2μm之類的偏移。在使另外一方之安裝工具56對於此種包含有偏差之位置而進行對位的情況時，係成為難以以其中一方之安裝工具56的移動位置之偏差以上的精確度來將另外一方之安裝工具56之移動位置作對位。相對於安裝位置之另外一方之安裝工具56的定位精確度，係會成為較其中一方之安裝工具56而更差。相對於此，在使雙方之安裝工具56的移動位置相對於基準之安裝位置來進行對位的情況時，由於在基準之安裝位置自身中係並不會有包含位置之偏差的情形，因此，係能夠將雙方之安裝工具56相對於安裝位置而以同等程度之精確度來進行對位。 The correction of the positional deviation of the mounting tool 56 is not limited to the above-described method of matching the moving position of the mounting tool 56 of the other mounting portion 50B with the moving position of the mounting tool 56 of one of the mounting portions 50A. . For example, it can also be used for left and right installation tools. 56, and both are corrected in such a manner that the moving positions are matched with respect to the mounting position of the reference base determined in advance. In the case of adopting such a configuration, it is more able to improve the alignment accuracy. In this case, when the moving position of the other mounting tool 56 is matched with the moving position of one of the mounting tools 56, the moving position of the mounting tool 56 which is one of the reference points becomes Contains a certain amount of deviation. Even if it seems to move to the same position, due to mechanical errors or the like, an offset such as 1 μm or 2 μm is generated. When the other mounting tool 56 is aligned with such a position including the deviation, it is difficult to adjust the mounting tool of the other one by more than the deviation of the moving position of the mounting tool 56. The moving position of 56 is aligned. The positioning accuracy of the mounting tool 56 with respect to the other of the mounting positions may be worse than the mounting tool 56 of one of the other. On the other hand, when the moving position of the mounting tool 56 is aligned with respect to the reference mounting position, there is no possibility of including the positional deviation in the reference mounting position itself. It is possible to align the mounting tools 56 of both sides with the same degree of precision with respect to the mounting position.
安裝頭55(安裝工具56)之移動位置偏移的檢測，例如當會有起因於馬達之發熱等而導致發生安裝頭55之姿勢變形之虞的情況時，係亦可構成為在安裝動作開始之後，於每次之設定時序(所設定之時間、或者是所設定之安裝次數)處而檢測出安裝頭55之移動位置偏移之有無。藉由此，係能夠使半導體晶片t之安裝精確度更 進一步的提升。如同前述一般，在使用有對於半導體晶片t之安裝(接合)作輔助之加熱器的情況時，起因於由加熱器之加熱所導致的熱膨脹(熱變形)，係會有在安裝頭55處產生移動位置誤差的情形。針對此點，亦同樣的，在每次之預先所設定之時序處而進行藉由第4攝像機23來對於被保持於安裝工具56處的半導體晶片t進行攝像並檢測出位置偏移之工程一事，係為有效。 The detection of the displacement of the movement position of the mounting head 55 (the mounting tool 56) may be performed, for example, when the posture of the mounting head 55 is deformed due to heat generation of the motor or the like. Thereafter, the presence or absence of the shift of the movement position of the mounting head 55 is detected at each set timing (the set time or the set number of installations). Thereby, the mounting accuracy of the semiconductor wafer t can be made more Further improvement. As in the foregoing, in the case of using a heater having an auxiliary for mounting (joining) of the semiconductor wafer t, thermal expansion (thermal deformation) due to heating by the heater is generated at the mounting head 55. The case of moving position error. In this regard, similarly, the project of imaging the semiconductor wafer t held by the mounting tool 56 and detecting the positional deviation by the fourth camera 23 is performed at each predetermined timing. , is valid.
在上述之實施形態中，係針對將支持基板W之各安裝區域以及左右之安裝部50A、50B的安裝工具56定位在身為一定之安裝位置之一定的安裝位置處的情況，而作了說明。所謂此一定之安裝位置，係可為在安裝裝置1中而恆常不會改變之相同的位置，亦可為可因應於例如支持基板W之大小等的條件來進行設定變更之位置，只要是身為至少在從成為安裝對象之電子零件的安裝開始起直到安裝結束為止的期間中而會被保持於一定的位置即可。另外，在將一定之安裝位置構成為可進行設定變更之位置的情況時，若是構成為針對每一設定位置而分別預先取得對於平台21之移動誤差作修正的修正資料，並在對於安裝位置進行設定變更時，將在平台21之移動誤差之修正中所使用的修正資料切換為與進行了設定變更後的安裝位置相對應之修正資料，則為理想。 In the above-described embodiment, the mounting tool 56 of each of the mounting regions of the support substrate W and the mounting portions 50A and 50B of the left and right sides is positioned at a certain mounting position at a certain mounting position, and is described. . The predetermined mounting position may be the same position that does not change constantly in the mounting device 1, or may be a position that can be changed according to conditions such as the size of the support substrate W, as long as it is It may be held at a constant position at least until the installation is completed from the start of mounting of the electronic component to be mounted. In addition, when a certain mounting position is configured to be a position at which the setting can be changed, the correction data for correcting the movement error of the stage 21 is separately acquired for each set position, and is performed for the mounting position. When the setting is changed, it is preferable to switch the correction data used for the correction of the movement error of the stage 21 to the correction data corresponding to the installation position after the setting change.
又，對於平台21之移動誤差作修正的修正資料，係可在平台21之可移動之範圍的全區域中而進行取得，只要構成為至少在當將支持基板W上之各安裝區域 定位在安裝位置處時的平台21所移動之範圍內來進行取得即可。進而，對於平台21的移動位置誤差作修正之修正資料，係可使用平台21之移動誤差位置的實測值本身，亦可使用像是將移動位置誤差抵消的修正值等之對於實測值進行了加工者，只要是用以對於平台21之移動誤差作修正的資料即可。 Moreover, the correction data for correcting the movement error of the platform 21 can be obtained in the entire area of the movable range of the platform 21 as long as it is configured at least when the mounting areas on the support substrate W are to be mounted. The positioning may be performed within a range in which the platform 21 is positioned at the installation position. Further, for the correction data for correcting the movement position error of the platform 21, the measured value itself of the movement error position of the platform 21 may be used, or the measured value may be processed using a correction value such as offsetting the movement position error. As long as it is used to correct the movement error of the platform 21, it is sufficient.
在上述之實施形態中，雖係針對使半導體晶片t之電極形成面(上面)朝向下方的狀態、亦即是以與支持基板W之上面相對向的狀態來進行安裝之所謂面朝下接合之例來作了說明，但是，實施形態之安裝裝置以及安裝方法係並不被限定於此。關於實施形態之封裝零件的製造方法，亦為相同。實施形態之安裝裝置以及安裝方法還有封裝零件之製造方法，係亦可對於以使半導體晶片t之電極形成面朝向上方的狀態、亦即是將半導體晶片t之下面(與電極形成面相反側之面)安裝於支持基板W之上面的面朝上接合作適用。進而，實施形態之安裝裝置，係亦可設為面朝上接合與面朝下接合之兼用裝置。 In the above-described embodiment, the electrode forming surface (upper surface) of the semiconductor wafer t is directed downward, that is, the so-called face-down bonding is performed in a state of being opposed to the upper surface of the support substrate W. Although the example is described, the mounting device and the mounting method of the embodiment are not limited thereto. The manufacturing method of the package component of the embodiment is also the same. The mounting device and the mounting method of the embodiment, and the method of manufacturing the package component, may be such that the electrode forming surface of the semiconductor wafer t faces upward, that is, the lower surface of the semiconductor wafer t (opposite to the electrode forming surface) The side surface) is mounted on the upper surface of the support substrate W and is applied upwards. Further, the mounting device of the embodiment may be a combined device that is joined face up and face down.
在適用面朝上接合的情況時，在移載部40和安裝部50之間，係設置用以將半導體晶片t暫時作載置之遞交用平台。此係因為，在晶圓環11上，半導體晶片t係以使電極形成面朝向上方的狀態而被作支撐。將半導體晶片t作了吸附保持的移載部40之移載噴嘴44，係必須要在使電極形成面朝向上方的狀態下而將半導體晶片t遞交至安裝部50處，但是，由於移載噴嘴44係將半導體晶 片t之電極形成面作吸附保持，因此，係並無法將半導體晶片t直接遞交至安裝部50之安裝工具56處。 When the application surface is joined upward, a transfer platform for temporarily mounting the semiconductor wafer t is provided between the transfer unit 40 and the mounting portion 50. This is because the semiconductor wafer t is supported on the wafer ring 11 in a state in which the electrode forming surface faces upward. The transfer nozzle 44 of the transfer unit 40 that adsorbs and holds the semiconductor wafer t is required to deliver the semiconductor wafer t to the mounting portion 50 with the electrode forming surface facing upward, but due to the transfer Nozzle 44 is a semiconductor crystal The electrode forming surface of the sheet t is adsorbed and held, and therefore, the semiconductor wafer t cannot be directly delivered to the mounting tool 56 of the mounting portion 50.
在適用面朝上接合的情況時，移載部40之反轉機構43係成為不必要，代替此，係設置使移載噴嘴44成為能夠在XY方向上移動的XY移動機構，並使移載噴嘴44成為能夠在取出位置和遞交用平台之間作移動。遞交用平台，係對應於左右之移載部40A、40B而分別作設置。在適用面朝上接合和面朝下接合之兼用裝置的情況時，係設為維持有移載部40之反轉機構43的設置並且設置有遞交用平台和使移載噴嘴44成為能夠在XY方向上移動的XY移動機構之構成。在進行面朝下接合的情況時，係並不使用遞交用平台地，而藉由與實施形態同樣的動作來安裝半導體晶片t。 When the application surface is joined upward, the reversing mechanism 43 of the transfer unit 40 is unnecessary. Instead of this, the transfer nozzle 44 is provided as an XY moving mechanism that can move in the XY direction, and the transfer is performed. The nozzle 44 is configured to be movable between the take-out position and the delivery platform. The delivery platform is provided separately for the left and right transfer units 40A and 40B. In the case of a combination device in which the face-up engagement and the face-down engagement are applied, it is assumed that the reversing mechanism 43 of the transfer unit 40 is maintained and the delivery platform is provided and the transfer nozzle 44 is enabled in the XY. The composition of the XY moving mechanism that moves in the direction. When the face-down bonding is performed, the semiconductor wafer t is mounted by the same operation as the embodiment without using the landing platform.
在進行面朝上接合的情況時，係在藉由移載噴嘴44而將半導體晶片t取出之後，並不藉由反轉機構43來使移載噴嘴44反轉地而藉由XY移動機構來使移載噴嘴44移動至遞交用平台上。藉由被作了移動的移載噴嘴44，來將半導體晶片t載置在遞交用平台上。之後，使安裝部50之安裝工具56移動至遞交用平台上，並將遞交用平台上之半導體晶片t作吸附保持。半導體晶片t，由於係以將電極形成面朝向上方的狀態而被載置於遞交用平台上，因此，安裝部50之安裝工具56係將半導體晶片t之上面(電極形成面)作吸附，並將半導體晶片t之下面(與電極形成面相反側之面)安裝於支持基板W之上 面。半導體晶片t之具體性的安裝工程，係與上述之實施形態相同。 In the case of face-up bonding, after the semiconductor wafer t is taken out by the transfer nozzle 44, the transfer nozzle 44 is not reversed by the reversing mechanism 43 and is moved by the XY moving mechanism. The transfer nozzle 44 is moved to the delivery platform. The semiconductor wafer t is placed on the delivery platform by the moving transfer nozzle 44. Thereafter, the mounting tool 56 of the mounting portion 50 is moved to the delivery platform, and the semiconductor wafer t on the delivery platform is adsorbed and held. Since the semiconductor wafer t is placed on the delivery platform with the electrode formation surface facing upward, the mounting tool 56 of the attachment portion 50 adsorbs the upper surface (electrode formation surface) of the semiconductor wafer t. And mounting the lower surface of the semiconductor wafer t (the surface opposite to the surface on which the electrode is formed) on the support substrate W surface. The specific mounting process of the semiconductor wafer t is the same as that of the above embodiment.
接著，針對本發明之實施例及其評價結果作敘述。 Next, an embodiment of the present invention and evaluation results thereof will be described.
使用上述之實施形態之安裝裝置1，來藉由以下之條件而在支持基板上實際進行了半導體晶片之安裝。於圖13中，對於在支持基板W上安裝了半導體晶片t的狀態作展示。另外，目標安裝精確度係設為±5μm以內，目標節拍時間係設為0.6秒以內。 With the mounting device 1 of the above-described embodiment, the mounting of the semiconductor wafer was actually performed on the support substrate by the following conditions. In FIG. 13, a state in which the semiconductor wafer t is mounted on the support substrate W is shown. In addition, the target mounting accuracy is set to within ±5 μm, and the target tact time is set to within 0.6 seconds.
‧半導體晶片t之尺寸：4mm×4mm ‧Semiconductor wafer t size: 4mm × 4mm
‧安裝節距(縱×橫)：36mm×36mm ‧Installation pitch (vertical × horizontal): 36mm × 36mm
‧安裝數量(縱×橫)：5個×5個(總計25個) ‧Installation quantity (vertical × horizontal): 5 × 5 (total 25)
如同圖13中所示一般，將左上作為開始點，並以附加於半導體晶片t處之號碼的順序，來將第奇數個的半導體晶片t藉由左側之安裝部50A來進行安裝，並將第偶數個的半導體晶片t藉由右側之安裝部50B來進行安裝，而交互地進行了安裝。在從零件供給部10而將第1個的半導體晶片t取出起直到最後(第25個)的半導體晶片t之安裝結束為止的經過時間，係為14.5秒。如此這 般，使用檢查裝置來對於安裝在支持基板W處之25個的半導體晶片t之安裝位置偏移作了測定。將其結果展示於表1中。在表1中，安裝區域號碼，係與圖13之半導體晶片t之號碼相對應。使用安裝頭之欄的○記號，係代表在安裝中所使用了的安裝頭。例如，在安裝區域號碼"1"處，係代表使用左側之安裝頭55來進行了安裝。位置偏移之欄，係代表在各安裝區域處的半導體晶片t之朝向X方向以及Y方向之位置偏移量。另外，單位係為微米〔μm〕。 As shown in FIG. 13, the upper left is used as the starting point, and the odd-numbered semiconductor wafers t are mounted by the mounting portion 50A on the left side in the order of the numbers attached to the semiconductor wafer t, and will be mounted. An even number of semiconductor wafers t are mounted by the mounting portion 50B on the right side, and are mounted interactively. The elapsed time from the time when the first semiconductor wafer t is taken out from the component supply unit 10 until the last (25th) semiconductor wafer t is completed is 14.5 seconds. So this In general, the mounting position of the semiconductor wafer t mounted on the support substrate W was measured using an inspection device. The results are shown in Table 1. In Table 1, the mounting area number corresponds to the number of the semiconductor wafer t of FIG. The ○ mark in the column of the installation head is used to represent the mounting head used in the installation. For example, at the installation area number "1", the installation is performed using the mounting head 55 on the left side. The column of the positional shift represents the positional shift amount of the semiconductor wafer t in the X direction and the Y direction at each mounting region. Further, the unit is micrometer [μm].
如同表1中所示一般，半導體晶片t之在X方向上的位置偏移之最大值，係為在安裝區域號碼15之位置處的3.0μm，最小值係為在安裝區域號碼10之位置處的-1.8μm。又，在Y方向上的位置偏移之最大值，係為在安裝區域號碼7之位置處的2.0μm，最小值係為在安裝區域號碼19之位置處的-0.8μm。係確認到了：25個的半導體晶片t之安裝精確度，係均為落於目標之±5μm以內。在安裝中所需要的時間，由於係為14.5秒，因此，在1個的半導體晶片t之安裝中所需要的時間，係為14.5秒/25個=0.58秒。故而，節拍時間係為0.58秒，而能夠達成目標之0.6秒以內。另外，所謂在安裝中所需要的時間，係指從「使從由零件供給部10來將第1個的半導體晶片t作了拾取的左側之移載部40A之吸附噴嘴44而接收了第1個的半導體晶片t之左側之安裝部50A之安裝工具56移動至安裝位置之正上方並開始下降」的時間點起，直到「使左側之安裝部50A的安裝工具56將最後(第25個)的半導體晶片t安裝至支持基板W上並一直上升至原本之高度處而結束動作」的時間點為止之時間。藉由將此時間除以在此期間中所安裝了的半導體晶片之數量(25個)，係能夠求取出節拍時間。 As shown in Table 1, the maximum value of the positional shift of the semiconductor wafer t in the X direction is 3.0 μm at the position of the mounting area number 15, and the minimum value is at the position of the mounting area number 10. -1.8μm. Further, the maximum value of the positional shift in the Y direction is 2.0 μm at the position of the mounting area number 7, and the minimum value is -0.8 μm at the position of the mounting area number 19. It was confirmed that the mounting accuracy of the 25 semiconductor wafers t was within ±5 μm of the target. The time required for the mounting was 14.5 seconds, so the time required for mounting one semiconductor wafer t was 14.5 seconds / 25 = 0.58 seconds. Therefore, the beat time is 0.58 seconds, and the target can be achieved within 0.6 seconds. In addition, the time required for the mounting is the first to receive the first adsorption nozzle 44 from the left transfer unit 40A that has been picked up by the component supply unit 10 from the first semiconductor wafer t. The mounting tool 56 of the mounting portion 50A on the left side of the semiconductor wafer t moves to the position immediately above the mounting position and starts to descend, until "the mounting tool 56 of the mounting portion 50A on the left side will be the last (25th) The time until the semiconductor wafer t is mounted on the support substrate W and continues to rise to the original height to complete the operation. By dividing this time by the number (25) of semiconductor wafers mounted during this period, it is possible to extract the tact time.
除了並不使用載置支持基板W之平台的移動修正資料一事以外，係藉由與實施例1相同之條件來將半導體晶 片t安裝在支持基板W上。使用檢查裝置來對於安裝在支持基板W處之25個的半導體晶片t之安裝位置偏移作了測定。將其結果展示於表2中。 The semiconductor crystal was subjected to the same conditions as in Example 1 except that the movement correction data of the stage on which the support substrate W was placed was not used. The sheet t is mounted on the support substrate W. The mounting position of the semiconductor wafer t mounted on the support substrate W was measured using an inspection device. The results are shown in Table 2.
如同表2中所示一般，半導體晶片t之在X方向上的位置偏移之最大值，係為在安裝區域號碼21之位置處的19.5μm，最小值係為在安裝區域號碼10之位置處的-24.4μm。又，在Y方向上的位置偏移之最大值，係為在安裝區域號碼3之位置處的11.8μm，最小值係為在安裝區域號碼16之位置處的-11.7μm。故而，係確認到了：半導體晶片t之安裝精確度，係並無法滿足目標之±5μm以內。另外，在1個的半導體晶片t之安裝中所需要的時間，係為0.58秒，而與實施例1相同。 As shown in Table 2, the maximum value of the positional shift of the semiconductor wafer t in the X direction is 19.5 μm at the position of the mounting area number 21, and the minimum value is at the position of the mounting area number 10. -24.4μm. Further, the maximum value of the positional shift in the Y direction is 11.8 μm at the position of the mounting area number 3, and the minimum value is -11.7 μm at the position of the mounting area number 16. Therefore, it was confirmed that the mounting accuracy of the semiconductor wafer t was not within ±5 μm of the target. In addition, the time required for mounting one semiconductor wafer t was 0.58 seconds, which was the same as in the first embodiment.
使用上述之實施形態之安裝裝置1，來藉由以下之條件而在支持基板上實際進行了半導體晶片之安裝。另外，目標安裝精確度係設為±5μm以內。 With the mounting device 1 of the above-described embodiment, the mounting of the semiconductor wafer was actually performed on the support substrate by the following conditions. In addition, the target mounting accuracy is set to within ±5 μm.
‧半導體晶片t之尺寸：4mm×4mm ‧Semiconductor wafer t size: 4mm × 4mm
‧安裝數量(縱×橫)：20個×20個(總計400個) ‧Installation quantity (vertical × horizontal): 20 × 20 (total 400)
‧安裝節距(縱、橫)：6mm ‧Installation pitch (vertical and horizontal): 6mm
與實施例1同樣的，將左上之安裝區域作為開始點，並以半導體晶片t之號碼的順序，來將第奇數個的半導體晶片t藉由左側之安裝部50A來進行安裝，並將第偶數個的半導體晶片t藉由右側之安裝部50B來進行安裝，而交互地進行了安裝。如此這般，從安裝在支持基板 W處之400個的半導體晶片t中而抽出48個的半導體晶片t，並使用檢查裝置來對於該些之安裝位置偏移作了測定。將其結果，與實施例1同樣的而展示於表3中。 In the same manner as in the first embodiment, the upper left mounting region is used as the starting point, and the odd-numbered semiconductor wafers t are mounted by the left mounting portion 50A in the order of the number of the semiconductor wafer t, and the even number is added. The semiconductor wafers t are mounted by the mounting portion 50B on the right side and are alternately mounted. So in this way, from mounting on the support substrate 48 semiconductor wafers t were taken out from 400 semiconductor wafers t at W, and the mounting position offsets were measured using an inspection device. The results are shown in Table 3 in the same manner as in Example 1.
使用上述之實施形態之安裝裝置1，來藉由以下之條件而在支持基板上實際進行了半導體晶片之安裝。另外，目標安裝精確度係設為±5μm以內。 With the mounting device 1 of the above-described embodiment, the mounting of the semiconductor wafer was actually performed on the support substrate by the following conditions. In addition, the target mounting accuracy is set to within ±5 μm.
‧半導體晶片t之尺寸：1mm×1mm ‧Semiconductor wafer t size: 1mm × 1mm
‧安裝數量(縱×橫)：40個×51個(總計2040個) ‧Installation quantity (vertical × horizontal): 40 × 51 (total 2040)
‧安裝節距(縱、橫)：3mm ‧Installation pitch (vertical and horizontal): 3mm
與實施例1同樣的，將左上之安裝區域作為開始點，並以半導體晶片t之號碼的順序，來將第奇數個的半導體晶片t藉由左側之安裝部50A來進行安裝，並將第偶數個的半導體晶片t藉由右側之安裝部50B來進行安裝，而交互地進行了安裝。如此這般，從安裝在支持基板W處之2040個的半導體晶片t中而抽出48個的半導體晶片t，並使用檢查裝置來對於該些之安裝位置偏移作了測定。將其結果，與實施例1同樣的而展示於表4中。 In the same manner as in the first embodiment, the upper left mounting region is used as the starting point, and the odd-numbered semiconductor wafers t are mounted by the left mounting portion 50A in the order of the number of the semiconductor wafer t, and the even number is added. The semiconductor wafers t are mounted by the mounting portion 50B on the right side and are alternately mounted. In this manner, 48 semiconductor wafers t were taken out from 2040 semiconductor wafers t mounted on the support substrate W, and the mounting positional deviations were measured using an inspection apparatus. The results are shown in Table 4 in the same manner as in Example 1.
使用上述之實施形態之安裝裝置1，來藉由以下之條件而在支持基板之各安裝區域上實際進行了第1半導體晶片和第2半導體晶片之安裝。另外，目標安裝精確度係設為±5μm以內。 With the mounting device 1 of the above-described embodiment, the first semiconductor wafer and the second semiconductor wafer are actually mounted on the respective mounting regions of the support substrate by the following conditions. In addition, the target mounting accuracy is set to within ±5 μm.
‧第1半導體晶片t之尺寸：4mm×4mm ‧ Size of the first semiconductor wafer t: 4mm × 4mm
‧第2半導體晶片t之尺寸：1mm×1mm ‧ Size of the second semiconductor wafer t: 1mm × 1mm
‧第1半導體晶片t之安裝數量(縱×橫)：5個×5個(總計25個) ‧ The number of installations of the first semiconductor wafer t (vertical × horizontal): 5 × 5 (total 25)
‧第2半導體晶片t之安裝數量(縱×橫)：5個×5個(總計25個) ‧The number of installations of the second semiconductor wafer t (vertical × horizontal): 5 × 5 (total 25)
‧第1半導體晶片之安裝節距(縱、橫)：36mm ‧Installation pitch of the first semiconductor wafer (vertical and horizontal): 36mm
‧第1半導體晶片與第2半導體晶片之間之間隔：0.5mm ‧ Interval between the first semiconductor wafer and the second semiconductor wafer: 0.5 mm
與實施例1同樣的，將左上之安裝區域作為開始點，並以第1半導體晶片(晶片A)t之號碼的順序，來將第奇數個的半導體晶片t藉由左側之安裝部50A來進行安裝，並將第偶數個的半導體晶片t藉由右側之安裝部50B來進行安裝，而交互地進行了安裝。接著，以第2半導體晶片(晶片B)t之號碼的順序，來將第奇數個的半導體晶片t藉由左側之安裝部50A來進行安裝，並將 第偶數個的半導體晶片t藉由右側之安裝部50B來進行安裝，而交互地進行了安裝。如此這般，使用檢查裝置來對於安裝在支持基板W處之合計50個(第1半導體晶片：25個、第2半導體晶片：25個)之安裝位置偏移作了測定。安裝位置偏移，係對於第1以及第2半導體晶片(晶片A、B)之各別的位置偏移和第1以及第2半導體晶片(晶片A、B)之相對位置作了測定。將此些之結果展示於表5中。 In the same manner as in the first embodiment, the upper left mounting region is used as the starting point, and the odd-numbered semiconductor wafers t are carried out by the left mounting portion 50A in the order of the number of the first semiconductor wafer (wafer A) t. The mounting and the even number of semiconductor wafers t are mounted by the mounting portion 50B on the right side, and are alternately mounted. Next, in the order of the number of the second semiconductor wafer (wafer B) t, the odd-numbered semiconductor wafers t are mounted by the mounting portion 50A on the left side, and The even-numbered semiconductor wafers t are mounted by the mounting portion 50B on the right side and are alternately mounted. In this manner, the mounting position of the total of 50 (first semiconductor wafer: 25, second semiconductor wafer: 25) mounted on the support substrate W was measured using an inspection device. The mounting position shift is measured for the respective positional shifts of the first and second semiconductor wafers (wafers A, B) and the relative positions of the first and second semiconductor wafers (wafers A, B). The results of these are shown in Table 5.
在上述之實施形態中，雖係針對支持基板W係並未在每一者之安裝區域處設置有位置檢測用之記號，並且係為在封裝零件之製造工程的過程中而被作除去者，來作了說明，但是，係並不被限定於此。若依據實施形態之安裝裝置以及安裝方法，則當然的，就算是對於例如在各安裝區域之每一者處而存在有位置檢測用之記號並且係會被作為封裝零件之一部分而作使用的基板，也能夠並不依賴位置檢測用之記號地來以良好精確度以及良好的效率來安裝半導體晶片(電子零件)。 In the above-described embodiment, the support substrate W is not provided with a mark for position detection in each of the mounting regions, and is removed during the manufacturing process of the package component. It is explained, but it is not limited to this. According to the mounting apparatus and the mounting method of the embodiment, it is a matter of course that, for example, there is a mark for position detection in each of the mounting regions, and the substrate is used as a part of the package component. It is also possible to mount a semiconductor wafer (electronic component) with good precision and good efficiency without relying on the mark for position detection.
另外，雖係針對本發明之數種實施形態作了說明，但是，該些實施形態，係僅為作為例子所提示者，而並非為對於本發明之範圍作限定者。此些之新穎的實施形態，係可藉由其他之各種形態來實施，在不脫離本發明之要旨的範圍內，係可進行各種之省略、置換、變更。此些之實施形態或其之變形，係被包含於發明之範圍或要旨內，並且亦被包含在申請專利範圍中所記載之發明及其均等範圍內。 In addition, although the embodiments of the present invention have been described, the embodiments are not intended to limit the scope of the present invention. The present invention may be embodied in various other forms, and various omissions, substitutions and changes may be made without departing from the scope of the invention. The invention or its modifications are intended to be included within the scope of the invention and the scope of the invention.
1‧‧‧安裝裝置 1‧‧‧Installation device
10‧‧‧零件供給部 10‧‧‧Parts Supply Department
11‧‧‧晶圓環 11‧‧‧ wafer ring
12‧‧‧晶圓環支持器 12‧‧‧ wafer ring holder
13‧‧‧第1攝像機 13‧‧‧1st camera
20‧‧‧平台部 20‧‧‧ Platform Department
21‧‧‧平台 21‧‧‧ platform
22‧‧‧第2攝像機 22‧‧‧2nd camera
30‧‧‧基板搬送部 30‧‧‧Substrate transport department
31‧‧‧搬入輸送帶 31‧‧‧ moving into the conveyor belt
33‧‧‧第1遞交部 33‧‧‧1st submission
33a、33b‧‧‧可動部 33a, 33b‧‧‧ movable department
35‧‧‧導引部 35‧‧‧Guidance
40、40A、40B‧‧‧移載部 40, 40A, 40B‧‧‧Transportation Department
41‧‧‧升降裝置 41‧‧‧ lifting device
42‧‧‧臂體 42‧‧‧Body
43‧‧‧反轉機構 43‧‧‧Reversal mechanism
45‧‧‧旋轉馬達 45‧‧‧Rotary motor
46‧‧‧旋轉驅動部 46‧‧‧Rotary drive department
47‧‧‧反轉臂 47‧‧‧Reverse arm
50、50A、50B‧‧‧安裝部 50, 50A, 50B‧‧‧ Installation Department
51‧‧‧支持框 51‧‧‧Support box
52‧‧‧X方向移動塊 52‧‧‧X direction moving block
52a‧‧‧X方向導引構件 52a‧‧‧X direction guiding member
53‧‧‧Y方向移動裝置 53‧‧‧Y direction mobile device
53a‧‧‧Y方向導引構件 53a‧‧‧Y direction guiding member
54‧‧‧可動體 54‧‧‧ movable body
55‧‧‧安裝頭 55‧‧‧Installation head
W‧‧‧支持基板 W‧‧‧Support substrate
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| JP7112274B2 (en) * | 2018-07-25 | 2022-08-03 | 芝浦メカトロニクス株式会社 | Mounting equipment and calibration substrates used for mounting equipment |
| JP7202176B2 (en) * | 2018-12-21 | 2023-01-11 | キヤノン株式会社 | Conveyor, Substrate Processing Apparatus, and Article Manufacturing Method |
| CN112447555B (en) * | 2019-08-29 | 2024-05-14 | 芝浦机械电子装置株式会社 | Electronic component mounting apparatus |
| JP7350696B2 (en) * | 2019-08-29 | 2023-09-26 | 芝浦メカトロニクス株式会社 | Electronic component mounting equipment |
| US11723154B1 (en) * | 2020-02-17 | 2023-08-08 | Nicholas J. Chiolino | Multiwire plate-enclosed ball-isolated single-substrate silicon-carbide-die package |
| JP7436251B2 (en) * | 2020-03-16 | 2024-02-21 | ファスフォードテクノロジ株式会社 | Die bonding equipment and semiconductor device manufacturing method |
| WO2022172373A1 (en) * | 2021-02-10 | 2022-08-18 | ヤマハ発動機株式会社 | Processing device |
| KR102292225B1 (en) * | 2021-03-31 | 2021-08-23 | 주식회사 톱텍 | Die bonding head structure |
| CN114039569B (en) * | 2021-11-09 | 2022-09-30 | 安徽聚强晶体有限公司 | Packaging structure and packaging method for resonator |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2917117B2 (en) * | 1995-12-29 | 1999-07-12 | 名古屋電機工業株式会社 | Method and apparatus for calculating work position coordinates on printed circuit board |
| US6348728B1 (en) * | 2000-01-28 | 2002-02-19 | Fujitsu Limited | Semiconductor device having a plurality of semiconductor elements interconnected by a redistribution layer |
| JP4381568B2 (en) * | 2000-06-19 | 2009-12-09 | ヤマハ発動機株式会社 | Board recognition method and apparatus for component mounting system |
| WO2007072714A1 (en) * | 2005-12-22 | 2007-06-28 | Shibaura Mechatronics Corporation | Apparatus and method for mounting electronic component |
| JP4665863B2 (en) | 2006-08-08 | 2011-04-06 | パナソニック株式会社 | Electronic component mounting method |
| JP2008166410A (en) * | 2006-12-27 | 2008-07-17 | Toray Eng Co Ltd | Positioning calibration method, and mounting device applying the same |
| CH698334B1 (en) * | 2007-10-09 | 2011-07-29 | Esec Ag | A process for the removal and installation of a wafer table provided on the semiconductor chip on a substrate. |
| JP5030843B2 (en) | 2008-04-14 | 2012-09-19 | 芝浦メカトロニクス株式会社 | Electronic component mounting apparatus and mounting method |
| WO2012050178A1 (en) * | 2010-10-14 | 2012-04-19 | シャープ株式会社 | Liquid crystal display device |
| JP2013058520A (en) | 2011-09-07 | 2013-03-28 | Dainippon Screen Mfg Co Ltd | Lithography apparatus, data correction apparatus, method for forming re-wiring layer, and method for correcting data |
| JP6227224B2 (en) | 2012-03-30 | 2017-11-08 | ヤマハ発動機株式会社 | Electronic component mounting line management device and electronic component mounting device |
| JP2013222740A (en) * | 2012-04-13 | 2013-10-28 | Panasonic Corp | Visual inspection device and visual inspection method |
| JP6340580B2 (en) * | 2014-01-08 | 2018-06-13 | パナソニックＩｐマネジメント株式会社 | Component mounting equipment |
| JP2015185546A (en) | 2014-03-20 | 2015-10-22 | パナソニックＩｐマネジメント株式会社 | Electronic part mounting system and electronic part mounting method |
-
2017
- 2017-01-31 KR KR1020197024243A patent/KR102196105B1/en active IP Right Grant
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| JP2020102637A (en) | 2020-07-02 |
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| KR20180081772A (en) | 2018-07-17 |
| JP2021114630A (en) | 2021-08-05 |
| JP6692376B2 (en) | 2020-05-13 |
| JPWO2017135257A1 (en) | 2018-11-29 |
| JP7108739B2 (en) | 2022-07-28 |
| KR102196105B1 (en) | 2020-12-30 |
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