TW201513532A - Power circuit - Google Patents
Power circuit Download PDFInfo
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- TW201513532A TW201513532A TW102121036A TW102121036A TW201513532A TW 201513532 A TW201513532 A TW 201513532A TW 102121036 A TW102121036 A TW 102121036A TW 102121036 A TW102121036 A TW 102121036A TW 201513532 A TW201513532 A TW 201513532A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/30—Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S20/00—Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
- Y04S20/20—End-user application control systems
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- Direct Current Feeding And Distribution (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
本發明係關於一種電源電路。The present invention relates to a power supply circuit.
電源是電子設備(如臺式電腦,筆記型電腦,伺服器等)的功率部件,電子設備中每個部件的電能都來自於電源。通常,主機板上包括一電壓輸出端P5V_AUX,它的作用是讓系統實現掛起模式,在部分元件停止工作之時提供較小的電流以讓這些元件能夠迅速恢復工作狀態。但是,主機板上的P5V_AUX通常要給多個負載供電,如何使電壓輸出端P5V_AUX無論在開機之前或開機之後都可以向所連接的負載輸出穩定、可靠地電壓,以增強電壓輸出端P5V_AUX的帶負載能力,是當下亟待要解決的問題。A power source is a power component of an electronic device (such as a desktop computer, a notebook computer, a server, etc.), and each component of the electronic device is powered by a power source. Usually, the motherboard includes a voltage output terminal P5V_AUX, which is used to allow the system to implement a suspend mode, providing less current when some components are stopped to allow these components to quickly resume operation. However, the P5V_AUX on the motherboard usually supplies power to multiple loads. How to make the voltage output P5V_AUX output a stable and reliable voltage to the connected load before or after power-on to enhance the voltage output P5V_AUX Load capacity is a problem that needs to be solved now.
鑒於上述內容,有必要提供一種能輸出可靠穩定的輔助電壓,以滿足更多負載的需求的電源電路。In view of the above, it is necessary to provide a power supply circuit capable of outputting a reliable and stable auxiliary voltage to meet the needs of more loads.
一種電源電路,包括第一至第三電子開關及一開關晶片,該第一電子開關的第一端接收一電源準備好訊號,該第一電子開關的第二端接地,該第一電子開關的第三端透過一第一電阻連接一第一電壓第一電壓備用電源,該第二電子開關的第一端與第一電子開關的第二端相連,該第二電子開關的第二端接地,該第二電子開關的第三端透過一第二電阻連接一工作電源,該第三電子開關的第一端與第二電子開關的第一端相連,該第三電子開關的第二端接地,該第三電子開關的第三端透過一第三電阻連接該工作電源,該開關晶片的第一引腳與一第一電壓源相連,該開關晶片的第二引腳與該第二電子開關的第三端相連,該開關晶片的第三引腳與該第一電壓第一電壓備用電源相連,該開關晶片的第四引腳與該第三電子開關的第三端相連,該開關晶片的第五至第八引腳與一電壓輸出端相連,當該電源控制端發出一高電平訊號時,該第一電子開關導通,該第二及第三電子開關截止,該開關晶片的第一引腳接收該第一電壓源的電壓,並輸出至與開關晶片的第七及第八引腳相連的電壓輸出端;當該電源控制端發出一低電平訊號時,該第一電子開關截止,該第二及第三電子開關導通,該開關晶片的第三引腳接收該第一電壓備用電源的電壓並輸出至與開關晶片的第五及第六引腳相連的電壓輸出端。A power supply circuit includes first to third electronic switches and a switch chip, the first end of the first electronic switch receives a power supply ready signal, the second end of the first electronic switch is grounded, and the first electronic switch The third end is connected to a first voltage first voltage backup power supply through a first resistor, the first end of the second electronic switch is connected to the second end of the first electronic switch, and the second end of the second electronic switch is grounded. The third end of the second electronic switch is connected to a working power supply through a second resistor. The first end of the third electronic switch is connected to the first end of the second electronic switch, and the second end of the third electronic switch is grounded. The third end of the third electronic switch is connected to the working power supply through a third resistor. The first pin of the switch chip is connected to a first voltage source, and the second pin of the switch chip and the second electronic switch The third end is connected, the third pin of the switch chip is connected to the first voltage first voltage backup power source, and the fourth pin of the switch chip is connected to the third end of the third electronic switch, the switch chip Five to eight The pin is connected to a voltage output end. When the power control terminal sends a high level signal, the first electronic switch is turned on, the second and third electronic switches are turned off, and the first pin of the switch chip receives the first The voltage of the voltage source is output to a voltage output terminal connected to the seventh and eighth pins of the switch chip; when the power control terminal sends a low level signal, the first electronic switch is turned off, the second and the second The three electronic switches are turned on, and the third pin of the switch chip receives the voltage of the first voltage standby power supply and outputs the voltage output terminal connected to the fifth and sixth pins of the switch chip.
本發明電源電路能夠透過一第一電壓備用電源及第一電壓源交替為電壓輸出端供電,使電壓輸出端無論在開機前還是開機後均可以輸出穩定、可靠地輔助電壓,從而滿足更多負載的需求。The power supply circuit of the invention can supply power to the voltage output terminal alternately through a first voltage backup power source and the first voltage source, so that the voltage output terminal can output a stable and reliable auxiliary voltage before and after the power-on, thereby satisfying more loads. Demand.
10‧‧‧電源電路10‧‧‧Power circuit
Q1‧‧‧第一電子開關Q1‧‧‧First electronic switch
Q2‧‧‧第二電子開關Q2‧‧‧Second electronic switch
Q3‧‧‧第三電子開關Q3‧‧‧ Third electronic switch
U1‧‧‧開關晶片U1‧‧‧ switch chip
R0-R3‧‧‧電阻R0-R3‧‧‧ resistance
C1-C3‧‧‧電容C1-C3‧‧‧ capacitor
Q4‧‧‧第四電子開關Q4‧‧‧fourth electronic switch
Q5‧‧‧第五電子開關Q5‧‧‧ fifth electronic switch
圖1係本發明電源電路的較佳實施方式的電路圖。1 is a circuit diagram of a preferred embodiment of a power supply circuit of the present invention.
圖2係本發明電源電路的開關晶片的示意圖。2 is a schematic view of a switch wafer of the power supply circuit of the present invention.
請參考圖1,本發明電源電路10的較佳實施方式包括第一至第三電子開關Q1-Q3及一開關晶片U1。該電源電路10接收一電源準備好訊號PWRGD_PS,該開關晶片U1連接在一第一電壓源P5V及一第一電壓備用電源P5V_STBY與一電壓輸出端P5V_AUX之間,並根據電源準備好訊號POWGD_PS的狀態選擇將第一電壓備用電源P5V_STBY或第一電壓源P5V的電壓分別切換至該電壓輸出端P5V_AUX。該電壓輸出端P5V_AUX用以向相應的電子元件提供輔助電壓5V。Referring to FIG. 1, a preferred embodiment of the power supply circuit 10 of the present invention includes first to third electronic switches Q1-Q3 and a switch wafer U1. The power supply circuit 10 receives a power supply ready signal PWRGD_PS, and the switch chip U1 is connected between a first voltage source P5V and a first voltage backup power source P5V_STBY and a voltage output terminal P5V_AUX, and according to the state of the power supply ready signal POWGD_PS The voltage of the first voltage standby power P5V_STBY or the first voltage source P5V is selected to be switched to the voltage output terminal P5V_AUX, respectively. The voltage output terminal P5V_AUX is used to supply an auxiliary voltage of 5V to the corresponding electronic component.
該第一電子開關Q1的第一端透過一電阻R0接收一電源準備好訊號PWRGD_PS,該第一電子開關Q1的第二端接地,該第一電子開關Q1的第三端透過一電阻R1連接該第一電壓備用電源P5V_STBY。該第二電子開關Q2的第一端與第一電子開關Q1的第三端相連,該第二電子開關Q2的第二端接地,該第二電子開關Q2的第三端透過一電阻R2連接一工作電源P12V。該第三電子開關Q3的第一端與第二電子開關Q2的第一端相連,該第三電子開關Q3的第二端接地,該第三電子開關Q3的第三端透過一電阻R3連接至該工作電源P12V。該開關晶片U1的第一引腳S1與該第一電壓源P5V相連,該開關晶片U1的第二引腳G1與該第二電子開關Q2的第三端相連,該開關晶片U1的第三引腳S2與該第一電壓備用電源P5V_STBY相連,該開關晶片U1的第四引腳G2與該第三電子開關Q3的第三端相連,該開關晶片U1的第五至第八引腳D2_2、D2_1、D1_2及D1_1均與該電壓輸出端P5V_AUX相連。該開關晶片U1的第一引腳S1透過一電容C1接地,該開關晶片U1的第三引腳S3透過一電容C2接地,該開關晶片U1的第五至第八引腳D2_2、D2_1、D1_2及D1_1均透過一電容C3接地。The first end of the first electronic switch Q1 receives a power supply ready signal PWRGD_PS through a resistor R0. The second end of the first electronic switch Q1 is grounded, and the third end of the first electronic switch Q1 is connected through a resistor R1. The first voltage backup power supply P5V_STBY. The first end of the second electronic switch Q2 is connected to the third end of the first electronic switch Q1, the second end of the second electronic switch Q2 is grounded, and the third end of the second electronic switch Q2 is connected through a resistor R2. Working power supply P12V. The first end of the third electronic switch Q3 is connected to the first end of the second electronic switch Q3, the second end of the third electronic switch Q3 is grounded, and the third end of the third electronic switch Q3 is connected to the resistor R3. The working power supply is P12V. The first pin S1 of the switch chip U1 is connected to the first voltage source P5V, the second pin G1 of the switch chip U1 is connected to the third end of the second electronic switch Q2, and the third lead of the switch chip U1 The pin S2 is connected to the first voltage backup power source P5V_STBY. The fourth pin G2 of the switch chip U1 is connected to the third end of the third electronic switch Q3. The fifth to eighth pins D2_2 and D2_1 of the switch chip U1 are connected. D1_2 and D1_1 are connected to the voltage output terminal P5V_AUX. The first pin S1 of the switch chip U1 is grounded through a capacitor C1, and the third pin S3 of the switch chip U1 is grounded through a capacitor C2. The fifth to eighth pins D2_2, D2_1, D1_2 of the switch chip U1 and D1_1 is grounded through a capacitor C3.
參照圖2,該開關晶片U1包括一第四電子開關Q4及一第五電子開關Q5,該第四電子開關Q4的第一端與開關晶片U1的第二引腳G1相連,該第四電子開關Q4的第二端與開關晶片U1的第一引腳S1相連,該第四電子開關Q4的第三端與開關晶片U1的第七及第八引腳D1_2及D1_1相連。該第五電子開關Q5的第一端與開關晶片U1的第四引腳G2相連,該第五電子開關Q5的第二端與開關晶片U1的第三引腳S2相連,該第五電子開關Q5的第三端與開關晶片U1的第五及第六引腳D2_2及D2_1相連。Referring to FIG. 2, the switch chip U1 includes a fourth electronic switch Q4 and a fifth electronic switch Q5. The first end of the fourth electronic switch Q4 is connected to the second pin G1 of the switch wafer U1. The fourth electronic switch is connected. The second end of the Q4 is connected to the first pin S1 of the switch chip U1, and the third end of the fourth electronic switch Q4 is connected to the seventh and eighth pins D1_2 and D1_1 of the switch chip U1. The first end of the fifth electronic switch Q5 is connected to the fourth pin G2 of the switch chip U1, and the second end of the fifth electronic switch Q5 is connected to the third pin S2 of the switch chip U1, the fifth electronic switch Q5 The third end is connected to the fifth and sixth pins D2_2 and D2_1 of the switch wafer U1.
在本實施例中,該第一至第四電子開關Q1-Q4均為NMOS場效應晶體管,該第五電子開關為PMOS場效應晶體管,該第一至第五電子開關的第一端、第二端及第三端分別對應於場效應晶體管的閘極、源極及汲極。In this embodiment, the first to fourth electronic switches Q1-Q4 are all NMOS field effect transistors, the fifth electronic switch is a PMOS field effect transistor, and the first end and the second end of the first to fifth electronic switches are The terminal and the third terminal respectively correspond to the gate, the source and the drain of the field effect transistor.
當開機之後,該電源準備好訊號PWRGD_PS為高電平時,該第一電子開關Q1導通,該第二及第三電子開關Q2及Q3截止,該開關晶片U1的第四電子開關Q4導通,且第五電子開關Q5截止,該開關晶片U1的第一引腳S1接收該第一電壓源P5V的電壓,並輸出至與開關晶片U1的第七引腳D1_2及第八引腳D1_1相連的電壓輸出端P5V_AUX,使電壓輸出端P5V_AUX輸出一輔助電壓5V。When the power supply ready signal PWRGD_PS is high, the first electronic switch Q1 is turned on, the second and third electronic switches Q2 and Q3 are turned off, and the fourth electronic switch Q4 of the switch chip U1 is turned on, and the first The fifth electronic switch Q5 is turned off, the first pin S1 of the switch chip U1 receives the voltage of the first voltage source P5V, and is output to the voltage output terminal connected to the seventh pin D1_2 and the eighth pin D1_1 of the switch wafer U1. P5V_AUX causes the voltage output terminal P5V_AUX to output an auxiliary voltage of 5V.
待機時,該電源準備好訊號PWRGD_PS為低電平時,該第一電子開關Q1截止,該第二及第三電子開關Q2及Q3導通,該開關晶片U1的第四電子開關Q4截止,且第五電子開關Q5導通,該開關晶片U1的第三引腳S2接收該第一電壓備用電源P5V_STBY的電壓,並輸出至與開關晶片U1的第五引腳D2_2及第六引腳D2_1相連的電壓輸出端P5V_AUX,使電壓輸出端P5V_AUX輸出輔助電壓5V。During standby, when the power supply ready signal PWRGD_PS is low, the first electronic switch Q1 is turned off, the second and third electronic switches Q2 and Q3 are turned on, the fourth electronic switch Q4 of the switch wafer U1 is turned off, and the fifth The electronic switch Q5 is turned on, and the third pin S2 of the switch chip U1 receives the voltage of the first voltage standby power P5V_STBY, and outputs the voltage to the voltage output terminal connected to the fifth pin D2_2 and the sixth pin D2_1 of the switch wafer U1. P5V_AUX causes the voltage output terminal P5V_AUX to output an auxiliary voltage of 5V.
綜上,在電源準備好訊號PWRGD_PS為低電平時,由第一電壓備用電源P5V_STBY向電壓輸出端P5V_AUX提供電壓;在電源準備好訊號PWRGD_PS為高電平時,由第一電壓源P5V向電壓輸出端P5V_AUX提供電壓。如此,無論在主機待機時還是開機之後電壓輸出端P5V_AUX都有穩定的輔助電壓5V輸出,從而滿足更多負載的需求。In summary, when the power supply ready signal PWRGD_PS is low, the voltage is supplied from the first voltage standby power supply P5V_STBY to the voltage output terminal P5V_AUX; when the power supply ready signal PWRGD_PS is high, the first voltage source P5V is turned to the voltage output terminal. P5V_AUX provides voltage. In this way, the voltage output terminal P5V_AUX has a stable auxiliary voltage 5V output regardless of whether the host is in standby or after power-on, thereby meeting the demand of more loads.
綜上所述,本發明確已符合發明專利的要件,爰依法提出專利申請。惟,以上所述者僅為本發明的較佳實施方式,本發明的範圍並不以上述實施方式為限,舉凡熟悉本案技藝的人士爰依本發明的精神所作的等效修飾或變化,皆應涵蓋於以下申請專利範圍內。In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiments, and equivalent modifications or variations made by those skilled in the art in accordance with the spirit of the present invention are It should be covered by the following patent application.
無no
10‧‧‧電源電路 10‧‧‧Power circuit
Q1‧‧‧第一電子開關 Q1‧‧‧First electronic switch
Q2‧‧‧第二電子開關 Q2‧‧‧Second electronic switch
Q3‧‧‧第三電子開關 Q3‧‧‧ Third electronic switch
U1‧‧‧開關晶片 U1‧‧‧ switch chip
R0-R3‧‧‧電阻 R0-R3‧‧‧ resistance
C1-C3‧‧‧電容 C1-C3‧‧‧ capacitor
Claims (4)
Priority Applications (1)
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TW102121036A TW201513532A (en) | 2013-06-14 | 2013-06-14 | Power circuit |
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TW102121036A TW201513532A (en) | 2013-06-14 | 2013-06-14 | Power circuit |
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TW201513532A true TW201513532A (en) | 2015-04-01 |
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TW102121036A TW201513532A (en) | 2013-06-14 | 2013-06-14 | Power circuit |
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2013
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