TW201327733A - 半導體結構及其製造方法 - Google Patents

半導體結構及其製造方法 Download PDF

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TW201327733A
TW201327733A TW100149018A TW100149018A TW201327733A TW 201327733 A TW201327733 A TW 201327733A TW 100149018 A TW100149018 A TW 100149018A TW 100149018 A TW100149018 A TW 100149018A TW 201327733 A TW201327733 A TW 201327733A
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Taiwan
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die
substrate
semiconductor structure
recess
width
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TW100149018A
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Ming-Tsan Peng
Shih-Tung Cheng
Edward-Yi Chang
Bo-Cheng Chou
Shyr-Long Jeng
Chia-Hua Chang
Tsung-Lin Chen
Jian-Feng Tsai
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Ind Tech Res Inst
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Priority to TW100149018A priority Critical patent/TW201327733A/zh
Priority to CN2012102045421A priority patent/CN103187371A/zh
Priority to US13/606,447 priority patent/US20130161708A1/en
Publication of TW201327733A publication Critical patent/TW201327733A/zh

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Abstract

半導體結構及其製造方法。半導體結構包括基板、晶粒與介質。基板具有基板上表面。基板具有凹槽。凹槽係從基板上表面向下延伸。凹槽具有凹槽側表面。晶粒位於凹槽中。晶粒具有晶粒下表面與晶粒側表面。晶粒下表面係低於基板上表面。介質係填充凹槽位該凹槽側表面與晶粒側表面之間的部份。

Description

半導體結構及其製造方法
本發明係有關於半導體結構及其製造方法，特別係有關於封裝結構及其製造方法。
在半導體結構的技術中，III-V族電晶體例如氮化鎵高電子遷移率電晶體(GaN HEMT)結合高傳導電子密度、高電子遷移率和較寬的能隙，使其可在指定的反向耐壓下，顯著降低元件的導通電阻RDS(on)。適合於製作高頻率、大功率和高效率的電子器件。因此III-V族電晶體特別係GaN HEMT逐漸成為技術研究發展的重點。然而，目前的封裝方式容易有散熱不佳的問題。
本發明係有關於一種半導體結構及其製造方法。半導體結構係具有高的散熱效果。
根據本發明之一方面，提供一種半導體結構。半導體結構包括基板、晶粒與介質。基板具有基板上表面。基板具有凹槽。凹槽係從基板上表面向下延伸。凹槽具有凹槽側表面。晶粒位於凹槽中。晶粒具有晶粒下表面與晶粒側表面。晶粒下表面係低於基板上表面。介質係填充凹槽位該凹槽側表面與晶粒側表面之間的部份。
根據本發明之另一方面，提供一種半導體結構的製造方法。方法包括以下步驟。提供基板。基板具有基板上表面。從基板上表面向下於基板中形成凹槽。凹槽具有凹槽側表面。配置晶粒於凹槽中。晶粒具有晶粒下表面與晶粒側表面。晶粒下表面係低於基板上表面。填充介質於凹槽位於凹槽側表面與晶粒側表面之間的部份。
為讓本發明之上述目的、特徵、和優點能更明顯易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說明如下：
第1圖繪示一實施例中半導體結構的剖面圖。請參照第1圖，基板102具有凹槽104。於實施例中，凹槽104係從基板102的基板上表面106向下延伸形成於基板102中。舉例來說，基板102係為陶瓷基板或金屬基板例如鋁基板。凹槽104可利用蝕刻製程或壓印製程形成。
晶粒108配置於凹槽104中。晶粒108具有晶粒下表面110與晶粒側表面114。晶粒下表面110係低於基板上表面106。於實施例中晶粒108係具有III-V族電晶體，例如氮化鎵電晶體，如磊晶型式的氮化鎵高電子遷移率電晶體(GaN HEMT)。凹槽104具有凹槽側表面112。
於一實施例中，凹槽104的寬度C1實質上係為固定。晶粒108的寬度D1實質上係為固定。凹槽104的寬度C1係大於晶粒108的寬度D1。舉例來說，凹槽104的寬度C1減掉晶粒108的寬度D1的值，實質上係為晶粒108的寬度D1的百分之十。於其他實施例中，凹槽104的寬度C1實質上係等於晶粒108的寬度D1，換句話說，凹槽側表面112與晶粒側表面114之間的間距實質上係為零。
介質116係填充凹槽104位於凹槽側表面112與晶粒側表面114之間的部份。更詳細地來說，介質116係與凹槽側表面112及晶粒側表面114接觸。於實施例中，介質116係為氣體例如空氣，或是高導熱材料例如金屬，舉例來說，銀膠。因此晶粒108操作過程中產生的熱能可以橫向地直接往介質116傳送，達到良好的散熱效果。
基板102具有凹槽104的設計使得晶粒108的對位更為簡單、精確。舉例來說，可利用機械手臂將晶粒108稍微對到凹槽104的位置，晶粒108便能直接嵌入凹槽104中。如此可以提高單一基板102配置晶粒108的數目，亦即提高裝置元件的密度。此外，係提升產品良率，並降低製造成本。
第2圖繪示一實施例中半導體結構的剖面圖。第2圖繪示的半導體結構與第1圖繪示的半導體結構的差異在於，凹槽204具有互相連通的上開口部份204A與下開口部份204B。上開口部份204A的寬度C21係大於下開口部份204B的寬度C22。上開口部份204A的寬度C21與下開口部份204B的寬度C22實質上係分別為固定。下開口部份204B的寬度C22係實質上等於晶粒208的寬度D2。
介質216係填充凹槽204位於凹槽側表面212與晶粒側表面214之間的部份。更詳細地來說，介質216係與凹槽側表面212及晶粒側表面214接觸。因此晶粒208操作過程中產生的熱能可以橫向地直接往介質216傳送，達到良好的散熱效果。基板202具有凹槽204的設計使得晶粒208的對位更為簡單、精確，並能提升產品良率、降低製造成本。
第3圖繪示一實施例中半導體結構的剖面圖。第3圖繪示的半導體結構與第1圖繪示的半導體結構的差異在於，凹槽304的寬度係由上至下逐漸變小。凹槽304係具有凹槽側表面312與凹槽底表面330。於實施例中，凹槽側表面312與凹槽底表面330之間的夾角θ實質上係為110°至140°。於此實施例中，凹槽側表面312實質上係為一平坦的表面。
第4圖繪示一實施例中半導體結構的剖面圖。第4圖繪示的半導體結構與第3圖繪示的半導體結構的差異在於，凹槽側表面412實質上係為一曲表面，並具有曲率半徑R4。晶粒408係具有晶粒高度H4。於實施例中，晶粒408的晶粒高度H4係小於凹槽側表面412之曲率半徑R4的兩倍，亦即H4<2*R4。在第3圖繪示的實施例中，平坦的凹槽側表面312其曲率半徑可視為無限大，因此亦可符合上述晶粒高度與曲率半徑之間的關係。
第5圖繪示一實施例中半導體結構的剖面圖。第5圖繪示的半導體結構與第3圖繪示的半導體結構的差異在於，晶粒508係藉由錫球518黏著至位於凹槽504中的接觸墊520，以與基板502電性連接。
第6圖繪示一實施例中半導體結構的剖面圖。第6圖繪示的半導體結構與第3圖繪示的半導體結構的差異在於，位於凹槽604中的晶粒608係藉由打線622電性連接於位於基板602中的閘極624、汲極626與源極628。
根據上述實施例，係在基板中形成凹槽，並將晶粒配置在凹槽中。因此晶粒操作過程中產生的熱能可有效率地導散掉。舉例來說，從熱流模擬實驗(聚焦平面熱像分析)的結果可發現，晶粒配置在基板之凹槽中的實施例，其散熱效果比起晶粒配置在基板上表面上的比較例係提高了約67%，這樣散熱的提升結果係來自於熱能從晶粒側表面往橫向傳出。此外，可精確控制晶粒的對位情況。適用於各種電子元件，例如高功率、小尺寸的高功率電子元件。
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何熟悉此項技藝者，在不脫離本發明之精神和範圍內，當可做些許更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
102、202、502、602．．．基板
104、204、304、504、604．．．凹槽
204A．．．上開口部份
204B．．．下開口部份
106．．．基板上表面
108、208、408、508、608．．．晶粒
110．．．晶粒下表面
112、212、312、412．．．凹槽側表面
114、214．．．晶粒側表面
116、216．．．介質
330．．．凹槽底表面
518．．．錫球
520．．．接觸墊
622．．．打線
624．．．閘極
626．．．汲極
628．．．源極
C1、C21、C22、D1、D2．．．寬度
H4．．．晶粒高度
R4．．．曲率半徑
θ．．．夾角
第1圖繪示一實施例中半導體結構的剖面圖。
第2圖繪示一實施例中半導體結構的剖面圖。
第3圖繪示一實施例中半導體結構的剖面圖。
第4圖繪示一實施例中半導體結構的剖面圖。
第5圖繪示一實施例中半導體結構的剖面圖。
第6圖繪示一實施例中半導體結構的剖面圖。
202．．．基板
204．．．凹槽
204A．．．上開口部份
204B．．．下開口部份
208．．．晶粒
212．．．凹槽側表面
214．．．晶粒側表面
216．．．介質
C21、C22、D2．．．寬度

Claims (12)

  1. 一種半導體結構，包括：一基板，具有一基板上表面，其中該基板具有一凹槽，該凹槽係從該基板上表面向下延伸，該凹槽具有一凹槽側表面；一晶粒，位於該凹槽中，其中該晶粒具有一晶粒下表面與一晶粒側表面，該晶粒下表面係低於該基板上表面；以及一介質，其中該介質係填充該凹槽位於該凹槽側表面與該晶粒側表面之間的部份。
  2. 如申請專利範圍第1項所述之半導體結構，其中該凹槽側表面具有一曲率半徑，該晶粒係具有一晶粒高度，該晶粒高度係小於該曲率半徑的兩倍。
  3. 如申請專利範圍第1項所述之半導體結構，其中該介質係與該凹槽側表面及該晶粒側表面接觸。
  4. 如申請專利範圍第1項所述之半導體結構，其中該凹槽具有互相連通的一上開口部份與一下開口部份，其中該上開口部份的寬度係大於該下開口部份的寬度。
  5. 如申請專利範圍第4項所述之半導體結構，其中該上開口部份的寬度與該下開口部份的寬度實質上係分別為固定。
  6. 如申請專利範圍第4項所述之半導體結構，其中該下開口部份的寬度係實質上等於該晶粒的寬度。
  7. 如申請專利範圍第1項所述之半導體結構，其中該凹槽的寬度係由上至下逐漸變小。
  8. 如申請專利範圍第1項所述之半導體結構，其中該凹槽的寬度實質上係為固定。
  9. 如申請專利範圍第1項所述之半導體結構，其中該凹槽的寬度係大於或實質上等於該晶粒的寬度。
  10. 如申請專利範圍第1項所述之半導體結構，更包括一錫球與一接觸墊，其中該接觸墊位於該凹槽中，該晶粒係藉由該錫球黏著至該接觸墊，以電性連接至該基板。
  11. 如申請專利範圍第1項所述之半導體結構，更包括：位於該基板中的一閘極、一汲極及一源極；以及多數個打線，分別電性連接於該晶粒與該閘極、該汲極及該源極之間。
  12. 一種半導體結構的製造方法，包括：提供一基板，其中該基板具有一基板上表面；從該基板上表面向下於該基板中形成一凹槽，其中該凹槽具有一凹槽側表面；配置一晶粒於該凹槽中，其中該晶粒具有一晶粒下表面與一晶粒側表面，該晶粒下表面係低於該基板上表面；以及填充一介質於該凹槽位於該凹槽側表面與該晶粒側表面之間的部份。
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