TW201312686A - Anti-etching layer, semiconductor processing device and manufacturing method thereof - Google Patents

Anti-etching layer, semiconductor processing device and manufacturing method thereof Download PDF

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TW201312686A
TW201312686A TW101126971A TW101126971A TW201312686A TW 201312686 A TW201312686 A TW 201312686A TW 101126971 A TW101126971 A TW 101126971A TW 101126971 A TW101126971 A TW 101126971A TW 201312686 A TW201312686 A TW 201312686A
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processing
plasma
processing chamber
etching
etching layer
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TW101126971A
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賀小明
倪圖強
萬磊
楊平
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中微半導體設備(上海)有限公司
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Abstract

An embodiment of the present invention provides an anti-etching layer, semiconductor processing device and its manufacturing method. The semiconductor processing device includes a processing chamber. The processing chamber is configured to introduce with source gas to perform corresponding processes for substrates placed in the processing chamber. The processing chamber is further configured to contain plasma. The processing chamber includes a plurality of processing parts therein. The semiconductor processing device further includes an anti-etching layer covering surfaces of the processing chamber and/or the processing parts exposed to the plasma. The anti-etching layer is configured to resist the etching from plasma etching and protect the processing chamber and/or the processing parts. The present invention utilizes the anti-etching layer to protect the processing chamber and the processing parts, preventing the processing chamber and the processing parts from being damaged by the plasma, and further increasing service life of the processing chamber and the processing parts.

Description

抗刻蝕層、半導體處理裝置及製作方法 Anti-etching layer, semiconductor processing device and manufacturing method

本發明涉及半導體技術領域,特別涉及抗刻蝕層、半導體處理裝置及其製作方法。 The present invention relates to the field of semiconductor technology, and in particular, to an anti-etching layer, a semiconductor processing apparatus, and a method of fabricating the same.

MOCVD是金屬有機化合物化學氣相沉積(Metal-organic Chemical Vapor Deposition)的英文縮寫。MOCVD是在氣相外延生長(VPE)的基礎上發展起來的一種新型氣相外延生長技術。它以Ⅲ族、Ⅱ族元素的有機化合物和V、Ⅵ族元素的氫化物等作為晶體生長源材料,以熱分解反應方式在襯底上進行氣相外延,生長各種Ⅲ-V族、Ⅱ-Ⅵ族化合物半導體以及它們的多元固溶體的薄層單晶材料。通常MOCVD系統中的晶體生長都是在常壓或低壓(10-100Torr)的冷壁石英(不銹鋼)反應室中進行,並採用H2作為載氣(Carrier Gas),襯底溫度為500-1200℃,用射頻感應加熱石墨基座(襯底基片在石墨基座上方),H2通過溫度可控的液體源鼓泡方式攜帶金屬有機物到生長區。 MOCVD is an abbreviation for Metal-organic Chemical Vapor Deposition. MOCVD is a new type of vapor phase epitaxy technology developed on the basis of vapor phase epitaxy (VPE). It uses organic compounds of group III and II elements and hydrides of group V and VI as crystal growth source materials, and performs vapor phase epitaxy on the substrate by thermal decomposition reaction to grow various III-V groups and II- A thin layer single crystal material of a Group VI compound semiconductor and their multiple solid solution. Generally, the crystal growth in the MOCVD system is carried out in a cold-wall quartz (stainless steel) reaction chamber at normal pressure or low pressure (10-100 Torr), and H2 is used as a carrier gas (Carrier Gas) at a substrate temperature of 500-1200 ° C. The graphite base is heated by radio frequency induction (the substrate is above the graphite base), and the H2 carries the metal organic matter to the growth zone by a temperature controlled liquid source bubbling method.

具體請結合圖1所示的習知的MOCVD內部結構示意圖。處理腔室40內具有加熱石墨基座20,所述加熱石墨基座20上放置若干待處理基片30,噴淋頭(shower head,SH)10與所述加熱石墨基座20和待處理基片30相對放置,所述噴淋頭10的材質為不銹鋼等材質,所述噴淋頭10中具有多個孔洞,該噴淋頭10通過所述空洞將氣態物質噴灑於待處理基片30上方,在所述待處理基片30上方發生化學反應,形成的反應物質沉積在所述待處理基片30上,形成外延層。 Specifically, please refer to the conventional MOCVD internal structure diagram shown in FIG. The processing chamber 40 has a heated graphite base 20 on which a plurality of substrates 30 to be processed, a shower head (SH) 10 and the heated graphite base 20 and a substrate to be treated are placed. The shower head 10 is made of a material such as stainless steel, and the shower head 10 has a plurality of holes therein, and the shower head 10 sprays a gaseous substance on the substrate 30 to be processed through the cavity. A chemical reaction occurs above the substrate 30 to be processed, and a formed reaction substance is deposited on the substrate 30 to be processed to form an epitaxial layer.

在申請號為US20050136188的美國專利申請中可以發現更多關於習知的MOCVD設備的資訊。 Further information on conventional MOCVD equipment can be found in U.S. Patent Application Serial No. US20050136188.

在實際中發現,在MOCVD設備的工藝過程中,由於源物質堆積、源物質之間發生化學反應生成的反應物質堆積等原因,引起MOCVD設備腔室內部以及MOCVD設備內的處理部件被上述源物質或反應物質沾汙,習知技術採用原位化學清潔方法定期對MOCVD設備的處理腔室進行清潔。其中所述原位化學清潔方法為在MOCVD設備的處理腔室內形成含有酸性離子或鹼性離子的等離子體,利用所述等離子體對MOCVD設備的處理腔室以及可能會受到污染的處理部件的表面進行清潔,通過所述等離子體與源物質或反應物質發生反應將所述源物質或反應物質去除。 In practice, it has been found that during the process of the MOCVD apparatus, the processing components in the chamber of the MOCVD apparatus and in the MOCVD apparatus are caused by the source materials due to accumulation of source materials, accumulation of reaction substances generated by chemical reactions between the source materials, and the like. Or the reaction material is contaminated. The prior art uses an in-situ chemical cleaning method to periodically clean the processing chamber of the MOCVD equipment. Wherein the in-situ chemical cleaning method is to form a plasma containing acidic ions or alkaline ions in a processing chamber of an MOCVD apparatus, using the plasma to treat a processing chamber of the MOCVD apparatus and a surface of a processing component that may be contaminated Cleaning is performed, and the source material or the reaction material is removed by the plasma reacting with the source material or the reaction material.

在實際中發現,上述原位化學清潔方法中使用的等離子體在去除所述源物質或反應物質的同時,會損傷MOCVD設備腔室的內部以及處理部件暴露於等離子體下的表面,從而會降低MOCVD設備腔室和處理部件的使用壽命,增加用戶的使用成本。 It has been found in practice that the plasma used in the above-described in-situ chemical cleaning method may damage the inside of the MOCVD device chamber and the surface of the processing member exposed to the plasma while removing the source material or the reaction material, thereby reducing The service life of the MOCVD equipment chamber and processing components increases the user's cost of use.

本發明解決的問題是提供了一種抗刻蝕層、半導體處理裝置及其製作方法,在MOCVD設備的反應腔室的表面和處理部件暴露於等離子體的表面形成抗刻蝕層,消除或降低習知的MOCVD設備的反應腔室和處理部件受到的等離子體損傷的影響,提高MOCVD設備腔室和處理部件的使用壽命,從而降低用戶的使用成本。 The problem to be solved by the present invention is to provide an anti-etching layer, a semiconductor processing apparatus and a manufacturing method thereof, which form an anti-etching layer on the surface of the reaction chamber of the MOCVD apparatus and the surface of the processing component exposed to the plasma, eliminating or reducing the habit The influence of plasma damage on the reaction chamber and processing components of the known MOCVD equipment increases the service life of the MOCVD equipment chamber and the processing components, thereby reducing the user's cost of use.

為解決上述問題,本發明實施例提供一種半導體處理裝置,包括一處理腔室,所述處理腔室用於通入源氣體,對放置於處理腔室內的基片進行相應處理,且所 述處理腔室還用於容納等離子體,所述處理腔室內具有多個處理部件,還包括:一抗刻蝕層,覆蓋於所述處理腔室和/或處理部件的暴露於等離子體的表面,所述抗刻蝕層用於抵抗等離子體的刻蝕和保護所述處理腔室和/或處理部件,所述抗刻蝕層的材質為陶瓷材質。 In order to solve the above problems, an embodiment of the present invention provides a semiconductor processing apparatus including a processing chamber for introducing a source gas, and correspondingly processing a substrate placed in the processing chamber, and The processing chamber is also for containing a plasma, the processing chamber having a plurality of processing components, and further comprising: an anti-etching layer covering the plasma-exposed surface of the processing chamber and/or the processing component The anti-etching layer is used for resisting etching and protecting the processing chamber and/or the processing component, and the anti-etching layer is made of a ceramic material.

可選地,所述陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RhO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的組合。 Optionally, the ceramic material is one of Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, RhO2, Ir2O3, ZrO2, AlN, SiC, Si3N4 or a combination thereof.

可選地,所述處理腔室和/或所述處理部件的材質與所述抗刻蝕層的材質相同或者不相同。 Optionally, the material of the processing chamber and/or the processing component is the same as or different from the material of the anti-etching layer.

可選地,所述半導體處理裝置為MOCVD設備、等離子體刻蝕設備或等離子體增強化學氣相沉積設備。 Optionally, the semiconductor processing device is an MOCVD device, a plasma etching device, or a plasma enhanced chemical vapor deposition device.

一種半導體處理裝置的製作方法,包括:提供一處理腔室或一處理部件,所述處理腔室用於通入源氣體,對放置於處理腔室內的基片進行相應處理,所述處理腔室還用於容納等離子體和所述處理部件;在所述處理腔室和/或所述處理部件的暴露於等離子體的表面形成一抗刻蝕層,所述抗刻蝕層用於抵抗等離子體刻蝕和保護所述處理腔室和/或處理部件,所述抗刻蝕層的材質為陶瓷材質。 A method of fabricating a semiconductor processing apparatus, comprising: providing a processing chamber or a processing component, wherein the processing chamber is configured to pass a source gas, and correspondingly process a substrate placed in the processing chamber, the processing chamber Also for accommodating a plasma and the processing component; forming an anti-etching layer on the plasma-exposed surface of the processing chamber and/or the processing component, the anti-etching layer being used to resist plasma The processing chamber and/or the processing component are etched and protected, and the material of the anti-etching layer is made of ceramic material.

可選地,所述陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RuO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的組合。 Optionally, the ceramic material is one or a combination of Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, RuO2, Ir2O3, ZrO2, AlN, SiC, Si3N4.

可選地,所述處理腔室和/或所述處理部件的材質與所述抗刻蝕層的材質相同或者不相同。 Optionally, the material of the processing chamber and/or the processing component is the same as or different from the material of the anti-etching layer.

可選地,所述半導體處理裝置為MOCVD設備、等離子體刻蝕設備或等離子體增強化學氣相沉積設備。 Optionally, the semiconductor processing device is an MOCVD device, a plasma etching device, or a plasma enhanced chemical vapor deposition device.

可選地,所述抗刻蝕層的製作方法為等離子體噴 塗工藝、化學氣相沉積工藝、等離子體增強化學氣相沉積工藝、物理氣相沉積工藝、化學溶膠凝膠工藝、化學濕法塗層工藝或者其中的組合。 Optionally, the anti-etching layer is formed by plasma spraying A coating process, a chemical vapor deposition process, a plasma enhanced chemical vapor deposition process, a physical vapor deposition process, a chemical sol gel process, a chemical wet coating process, or a combination thereof.

相應地,本發明還提供一種抗刻蝕層,用於抵抗等離子體刻蝕,所述抗刻蝕層的材質為陶瓷材質,所述陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RuO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的組合。 Correspondingly, the present invention further provides an anti-etching layer for resisting plasma etching. The anti-etching layer is made of ceramic material, and the ceramic material is Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, One or a combination of RuO2, Ir2O3, ZrO2, AlN, SiC, Si3N4.

可選地,所述抗刻蝕層製作方法為等離子體噴塗工藝、化學氣相沉積工藝、等離子體增強化學氣相沉積工藝、物理氣相沉積工藝、化學溶膠凝膠工藝、化學濕法塗層工藝或者其中的組合。 Optionally, the anti-etching layer is formed by a plasma spraying process, a chemical vapor deposition process, a plasma enhanced chemical vapor deposition process, a physical vapor deposition process, a chemical sol gel process, a chemical wet coating process. Process or a combination thereof.

與習知技術相比,本發明實施例具有以下優點:本發明實施例在半導體處理裝置的處理腔室和/或處理部件的暴露於等離子體的表面形成抗刻蝕層,從而在進行原位化學清潔時,該抗刻蝕層能抵抗等離子體的刻蝕,並且能夠保護處理腔室和/或處理部件,減小等離子體對所述處理腔室和/或處理部件的表面損傷,提高所述處理腔室和/或處理部件的使用壽命,降低用戶的使用成本;進一步地,在本發明的可選實施例中,所述處理腔室和/或所述處理部件的材質與所述抗刻蝕層的材質相同,從而所述處理腔室和/或所述處理部件能夠更好地抵抗等離子體的刻蝕;進一步地,在本發明的可選實施例中所述處理腔室和/或所述處理部件的材質與所述抗刻蝕層的材質也可以不相同,從而在所述抗刻蝕層使用一段時間後,可以利用化學機械研磨、清洗、刻蝕或者機械的方法將抗 刻蝕層去除,然後重新在所述處理腔室和/或所述處理部件的表面形成新的抗刻蝕層,以更好地保護處理腔室和/或處理部件,延長所述處理腔室和/或處理部件的使用壽命,從而進一步降低用戶的使用成本。 Compared with the prior art, the embodiments of the present invention have the following advantages: the embodiment of the present invention forms an anti-etching layer on the plasma-exposed surface of the processing chamber of the semiconductor processing apparatus and/or the processing component, thereby performing the in-situ The chemically resistant layer resists plasma etching during chemical cleaning and is capable of protecting the processing chamber and/or processing components, reducing surface damage to the processing chamber and/or processing components by the plasma, and improving the surface. Determining the service life of the processing chamber and/or the processing component, reducing the user's cost of use; further, in an alternative embodiment of the invention, the material of the processing chamber and/or the processing component and the resistance The material of the etch layer is the same, so that the processing chamber and/or the processing component are better able to resist plasma etching; further, in an alternative embodiment of the invention, the processing chamber and/or Or the material of the processing component and the material of the anti-etching layer may be different, so that after the anti-etching layer is used for a period of time, chemical mechanical polishing, cleaning, etching, or mechanical use may be utilized. Method will resist Etching the layer and then re-forming a new anti-etching layer on the surface of the processing chamber and/or the processing component to better protect the processing chamber and/or processing component, extending the processing chamber And / or deal with the life of the component, thereby further reducing the user's cost of use.

對於利用等離子進行工藝處理的設備,例如等離子體刻蝕設備、等離子體增強化學氣相沉積設備、MOCVD設備(MOCVD設備利用等離子體對處理腔室和處理部件進行原位清潔),其處理腔室和處理部件容易受到等離子體的損傷的問題,本發明實施例提出一種半導體處理裝置,包括:包括處理腔室,所述處理腔室用於通入源氣體,對放置於處理腔室內的基片進行相應處理,且所述處理腔室還用於容納等離子體,所述處理腔室內具有多個處理部件,半導體處理裝置還包括:抗刻蝕層,覆蓋於所述處理腔室和/或處理部件的暴露於等離子體的表面,所述抗刻蝕層用於抵抗等離子體的刻蝕和保護所述處理腔室和/或處理部件。本發明所述的半導體處理裝置為處理腔室內能夠產生等離子體並且該等離子體可能對處理腔室和/或處理腔室內的處理部件產生等離子體損傷的任何半導體處理裝置,例如,所述半導體處理裝置可以為等離子體刻蝕設備、等離子體增強化學氣相沉積設備、MOCVD設備等。所述處理腔室通常為真空腔室,所述處理腔室內能夠通入源氣體作為反應氣體,並且能夠產生等離子體。所述處理部件是指位於處理腔室內部的所有組成部件,例如噴淋頭(showerhead,SH)、加熱台(heater)等,所述處理部件中暴露於等離子體環境中的部分以及所述處理腔 室的表面容易受到等離子體的損傷。 For processing equipment using plasma, such as plasma etching equipment, plasma enhanced chemical vapor deposition equipment, MOCVD equipment (MOCVD equipment uses plasma to clean the processing chamber and processing components in situ), its processing chamber The present invention provides a semiconductor processing apparatus including a processing chamber for introducing a source gas to a substrate placed in the processing chamber. Processing is performed, and the processing chamber is further configured to receive a plasma, the processing chamber has a plurality of processing components, and the semiconductor processing apparatus further includes: an anti-etching layer covering the processing chamber and/or processing The surface of the component is exposed to a plasma that is used to resist plasma etching and to protect the processing chamber and/or processing components. The semiconductor processing apparatus of the present invention is any semiconductor processing apparatus capable of generating a plasma within a processing chamber and which may cause plasma damage to processing components within the processing chamber and/or processing chamber, eg, the semiconductor processing The device may be a plasma etching device, a plasma enhanced chemical vapor deposition device, an MOCVD device, or the like. The processing chamber is typically a vacuum chamber that is capable of passing a source gas as a reactive gas and capable of generating a plasma. The processing component refers to all component parts located inside the processing chamber, such as a showerhead (SH), a heater, etc., the portion of the processing component exposed to the plasma environment and the processing Cavity The surface of the chamber is susceptible to damage from the plasma.

作為一個實施例,所述半導體處理裝置為MOCVD設備,由於MOCVD設備的沉積工藝通常是在高溫(500~1200攝氏度)環境下進行的長時間(6~9小時)工藝,因此,對其處理腔室和處理部件的品質要求更高。在利用等離子體對處理腔室和/或處理部件進行清潔時,若損傷處理腔室和/或處理部件,更容易降低產品的良率並且可能導致MOCVD設備的故障(會影響MOCVD設備的利用率)。 As an embodiment, the semiconductor processing device is an MOCVD device, and since the deposition process of the MOCVD device is usually a long time (6 to 9 hours) process performed in a high temperature (500 to 1200 degrees Celsius) environment, the processing chamber is processed. The quality requirements of the chamber and the processing components are higher. When cleaning the processing chamber and/or processing components with plasma, if the processing chamber and/or processing components are damaged, it is easier to reduce the yield of the product and may cause malfunction of the MOCVD equipment (which may affect the utilization of the MOCVD equipment). ).

所述處理腔室和處理部件的材質、形狀、結構、加工方法和製作方法均與習知技術相同,其中所述處理腔室和處理部件的材質可以為陶瓷材料或合金材料。本實施例中,所述處理腔室和處理部件的材質為合金材料,因為合金材料具有硬度大,高溫性能穩定、加工製作容易等優點。本發明所述的用於製作處理腔室和處理部件的合金材料可以為鋁合金或不銹鋼等材料。與鋁合金相比,不銹鋼的熔點高、高溫下組織結構穩定,因此本實施例中,所述處理腔室和處理部件的合金材料為不銹鋼,所述不銹鋼可以為各種不同型號的不銹鋼,例如SS316L、SS304等,本領域技術人員可以進行具體的選擇。 The materials, shapes, structures, processing methods, and manufacturing methods of the processing chamber and the processing member are the same as those in the prior art, wherein the processing chamber and the processing member may be made of a ceramic material or an alloy material. In this embodiment, the material of the processing chamber and the processing component is an alloy material, because the alloy material has the advantages of high hardness, stable high temperature performance, and easy processing. The alloy material for making the processing chamber and the processing member according to the present invention may be a material such as aluminum alloy or stainless steel. Compared with the aluminum alloy, the stainless steel has a high melting point and a stable structure at a high temperature. Therefore, in the embodiment, the alloy material of the processing chamber and the processing member is stainless steel, and the stainless steel can be various types of stainless steel, such as SS316L. , SS304, etc., those skilled in the art can make specific choices.

本發明所述的抗刻蝕層的材質為陶瓷材質。所述陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RuO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的組合,或者所述陶瓷材料也可以為上述材料與其他材料的組合。 The material of the anti-etching layer according to the present invention is a ceramic material. The ceramic material is one or a combination of Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, RuO2, Ir2O3, ZrO2, AlN, SiC, Si3N4, or the ceramic material may also be the above materials and other materials. combination.

在本發明的一個實施例中,所述處理腔室和/或處理部件的材質為不銹鋼,該不銹鋼的型號為SS316L。 In one embodiment of the invention, the processing chamber and/or processing component is made of stainless steel, the stainless steel being SS316L.

在本發明的又一實施例中,所述處理腔室和/或所述處理部件的材質與所述抗刻蝕層的材質相同,即所述處理腔室和/或所述處理部件可以利用與所述抗刻蝕層的材質相同的材質製作,從而形成塊狀的處理腔室和/或處理部件,無需在處理腔室和/或處理部件製作後,專門在所述處理腔室和/或處理部件表面形成抗刻蝕層,並且也不需要考慮處理腔室和/或處理部件與抗刻蝕層之間的應力和結合強度的問題。 In still another embodiment of the present invention, the processing chamber and/or the processing component are made of the same material as the anti-etching layer, that is, the processing chamber and/or the processing component may be utilized. Fabricating the same material as the anti-etching layer to form a block-shaped processing chamber and/or processing component, without having to be specialized in the processing chamber and/or after processing chamber and/or processing component fabrication Or the surface of the processing component forms an anti-etching layer, and there is no need to consider the problems of stress and bonding strength between the processing chamber and/or the processing component and the anti-etching layer.

需要說明的是,雖然所述抗刻蝕層可以抵抗等離子體刻蝕,但是長期使用仍然會造成抗刻蝕層的厚度不均、結構被破壞或表面沾汙等情況,此時,可以進行測試,獲得在特定的等離子體和處理腔室、源氣體的環境下,等離子體對某一抗刻蝕層的刻蝕速率,基於該刻蝕速率可以獲得抗刻蝕層的厚度和使用週期(所述使用週期=抗刻蝕層的厚度/等離子體對抗刻蝕層的刻蝕速率),在抗刻蝕層的使用週期結束前,重新在處理腔室和/或處理部件上形成新的抗刻蝕層,抗刻蝕層的形成方法以及等離子體對某一抗刻蝕層的刻蝕速率的獲得方法在後續將會說明。 It should be noted that although the anti-etching layer can resist plasma etching, the long-term use still causes uneven thickness of the anti-etching layer, structural damage or surface contamination, and can be tested at this time. Obtaining an etching rate of an anti-etching layer by a plasma in a specific plasma and a processing chamber and a source gas environment, and the thickness and the period of use of the anti-etching layer can be obtained based on the etching rate. The use period = the thickness of the anti-etching layer / the etching rate of the plasma against the etching layer), and re-form a new anti-etching on the processing chamber and/or the processing part before the end of the use period of the anti-etching layer The etching layer, the method of forming the anti-etching layer, and the method of obtaining the etching rate of the plasma against an etching resist layer will be described later.

相應地,本發明還提供一種半導體處理裝置的製作方法,請參考圖2所示的本發明的半導體處理裝置的製作方法流程圖,所述半導體處理裝置包括:步驟S1,提供處理腔室或處理部件,所述處理腔室用於通入源氣體,對放置於處理腔室內的基片進行相應處理,所述處理腔室還用於容納等離子體和所述處理部件; Accordingly, the present invention further provides a method of fabricating a semiconductor processing apparatus. Referring to the flowchart of the method of fabricating the semiconductor processing apparatus of the present invention shown in FIG. 2, the semiconductor processing apparatus includes: step S1, providing a processing chamber or processing a processing chamber for introducing a source gas for corresponding processing of a substrate placed in the processing chamber, the processing chamber further for containing a plasma and the processing component;

步驟S2,在所述處理腔室和/或所述處理部件的暴露於等離子體的表面形成抗刻蝕層,所述抗刻蝕層用於 抵抗等離子體刻蝕和保護所述處理腔室和/或處理部件。 Step S2, forming an anti-etching layer on the plasma-exposed surface of the processing chamber and/or the processing component, the anti-etching layer being used for Resisting plasma etching and protecting the processing chamber and/or processing components.

其中,本發明所述的半導體處理裝置為其處理腔室內能夠產生等離子體並且該等離子體可能對處理腔室和/或處理腔室內的處理部件產生等離子體損傷的任何半導體處理裝置,例如,所述半導體處理裝置可以為等離子體刻蝕設備、等離子體增強化學氣相沉積設備、MOCVD設備等。所述處理腔室通常為真空腔室,所述處理腔室內能夠通入源氣體作為反應氣體,並且能夠產生等離子體。所述處理部件是指位於處理腔室內部的所有組成部件,例如噴淋頭(showerhead,SH)、加熱台(heater)等,所述處理部件中暴露於等離子體環境中的部分以及所述處理腔室的表面容易受到等離子體的損傷。 Wherein the semiconductor processing apparatus of the present invention is any semiconductor processing apparatus capable of generating plasma within the processing chamber and which may cause plasma damage to processing components in the processing chamber and/or processing chamber, for example, The semiconductor processing device may be a plasma etching device, a plasma enhanced chemical vapor deposition device, an MOCVD device, or the like. The processing chamber is typically a vacuum chamber that is capable of passing a source gas as a reactive gas and capable of generating a plasma. The processing component refers to all component parts located inside the processing chamber, such as a showerhead (SH), a heater, etc., the portion of the processing component exposed to the plasma environment and the processing The surface of the chamber is susceptible to damage from the plasma.

作為一個實施例,所述半導體處理裝置為MOCVD設備。所述處理腔室為MOCVD設備的處理腔室,所述處理部件至少包括MOCVD設備的工藝腔室內的噴淋頭和加熱台。本發明所述的處理腔室和處理部件的製作方法與習知技術相同,作為本領域技術人員的公知技術,在此不做詳細的說明。 As an embodiment, the semiconductor processing device is an MOCVD device. The processing chamber is a processing chamber of an MOCVD apparatus, the processing component including at least a showerhead and a heating stage within a process chamber of an MOCVD apparatus. The processing chamber and the processing member of the present invention are produced in the same manner as the prior art, and are well known to those skilled in the art and will not be described in detail herein.

本發明所述抗刻蝕層的材質為陶瓷材質。所述陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RuO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的陶瓷與其他材料的組合。在本發明的一個實施例中,所述處理腔室和/或所述處理部件的材質與所述抗刻蝕層的材質相同,即利用所述陶瓷材質製作塊狀的處理腔室和/或處理部件,這樣可以使在處理腔室和/或處理部件表面上形成的抗刻蝕層具有良好的結合力,從而 提高形成部件的表面品質。 The material of the anti-etching layer of the present invention is a ceramic material. The ceramic material is one of Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, RuO2, Ir2O3, ZrO2, AlN, SiC, Si3N4 or a combination thereof with other materials. In one embodiment of the present invention, the processing chamber and/or the processing member are made of the same material as the anti-etching layer, that is, the ceramic processing material is used to form a block-shaped processing chamber and/or Processing the component such that the anti-etching layer formed on the processing chamber and/or the surface of the processing component has a good bonding force, thereby Improve the surface quality of the formed parts.

在本發明的一個實施例中,所述抗刻蝕層的製作方法為等離子體噴塗(熱噴塗)工藝製作。在本發明的又一實施例中,所述抗刻蝕層製作方法也可以為化學氣相沉積工藝、等離子體增強化學氣相沉積工藝、物理氣相沉積工藝、化學溶膠凝膠工藝或化學濕法塗層工藝等,本領域技術人員可以根據實際情況進行靈活的選擇。 In one embodiment of the invention, the method of fabricating the anti-etching layer is a plasma spray (thermal spray) process. In still another embodiment of the present invention, the anti-etching layer can be fabricated by a chemical vapor deposition process, a plasma enhanced chemical vapor deposition process, a physical vapor deposition process, a chemical sol gel process, or a chemical wet process. The method of the coating process, etc., can be flexibly selected by those skilled in the art according to the actual situation.

相應地,本發明還提供一種抗刻蝕層,用於抵抗等離子體刻蝕,所述材料層的材質為陶瓷材料,所述陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RuO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的陶瓷與其他材料的組合。發明人進行了相關實驗,驗證採用本發明實施例給出的抗刻蝕層可以有效保護處理腔室和/或處理部件,並且獲得對於特定的半導體處理設備、特定的等離子體等的情況下對特定的抗刻蝕層的刻蝕速率。以MOCVD設備為例,以MOCVD設備的噴淋頭作為測試對象,且所述噴淋頭的材質為不銹鋼。具體地,請結合圖3所示的本發明一個實施例的用於測試抗刻蝕層的刻蝕速率的噴淋頭結構示意圖。噴淋頭100的中部具有多個孔1001,在所述噴淋頭100的外部,放置三個測試樣本,分別是第一測試樣本101、第二測試樣本102和第三測試樣本103。各個測試樣本的表面的中心與所述噴淋頭100的中心的距離相同。 Correspondingly, the present invention also provides an anti-etching layer for resisting plasma etching. The material layer is made of ceramic material, and the ceramic material is Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, RuO2. One of Ir2O3, ZrO2, AlN, SiC, Si3N4 or a combination of ceramics thereof and other materials. The inventors conducted related experiments to verify that the anti-etching layer provided by the embodiment of the present invention can effectively protect the processing chamber and/or the processing component, and obtain a case for a specific semiconductor processing apparatus, a specific plasma, or the like. The etch rate of a particular anti-etching layer. Taking the MOCVD equipment as an example, a shower head of an MOCVD apparatus is used as a test object, and the sprinkler is made of stainless steel. Specifically, please refer to the schematic diagram of the structure of the shower head for testing the etching rate of the anti-etching layer in combination with an embodiment of the present invention shown in FIG. 3. The middle portion of the shower head 100 has a plurality of holes 1001. Outside the shower head 100, three test samples are placed, which are a first test sample 101, a second test sample 102, and a third test sample 103, respectively. The center of the surface of each test sample is the same distance from the center of the shower head 100.

所述第一測試樣本101、第二測試樣本102和第三測試樣本103的製作方法包括:首先,提供3個基本樣本,所述基本樣本的材質與所述噴淋頭100的材質相同,且所述3個基本樣本的形狀、大小和加工方法相 同,作為一個實施例,所述基本樣本的材質為SS316L;然後,在其中2個基本樣本的表面形成不同的抗刻蝕層,但2個基本樣本的抗刻蝕層表面的一半面積覆蓋矽片,而另一半面積的表面裸露;而剩餘的1個基本樣本的一半的面積的表面裸露,另一半的面積的表面覆蓋矽片。上述3個基本樣本的表面覆蓋矽片的位置相同。例如,在第一個基本樣本的表面上形成第一抗刻蝕層,第一抗刻蝕層的一半面積的表面1011裸露,另一半面積的表面1012覆蓋矽片,將該第一個基本樣本作為第一測試樣本101,作為一個實施例,所述第一抗刻蝕層1011的材質為Y2O3;第二個基本樣本的表面上形成第二抗刻蝕層,第二抗刻蝕層的一半面積的表面1021裸露,另一半面積的表面1022覆蓋矽片,將該第二個基本樣本作為第二測試樣本102,作為一個實施例,所述第二抗刻蝕層1021的材質為Al2O3;第三個基板樣本的一半的面積的表面1031裸露,另一半面積的表面1032覆蓋矽片,利用該第三個基本樣本作為第三測試樣本103。 The manufacturing method of the first test sample 101, the second test sample 102, and the third test sample 103 includes: first, providing three basic samples, the material of the basic sample is the same as the material of the shower head 100, and The shape, size and processing method of the three basic samples Similarly, as an embodiment, the basic sample is made of SS316L; then, a surface of the two basic samples is formed with different anti-etching layers, but half of the surface of the anti-etching layer of the two basic samples is covered. The surface of the other half of the area is bare; while the surface of one of the remaining one basic sample is bare, and the surface of the other half covers the sepal. The surface of the above three basic samples covered the same position of the sepals. For example, a first anti-etching layer is formed on the surface of the first basic sample, a surface 1011 of a half area of the first anti-etching layer is exposed, and a surface 1012 of the other half area covers the crotch, and the first basic sample is As a first test sample 101, as an embodiment, the first anti-etching layer 1011 is made of Y2O3; the second basic sample has a second anti-etching layer on the surface, and the second anti-etching layer is half The surface of the second anti-etching layer 1021 is made of Al2O3; the surface of the second anti-etching layer 1021 is made of a second test sample 102. As an embodiment, the second anti-etching layer 1021 is made of Al2O3; The surface 1031 of the half area of the three substrate samples is exposed, and the surface 1032 of the other half area covers the cymbal, and the third basic sample is used as the third test sample 103.

測試時,將所述各個測試樣品連同噴淋頭100一起安裝於MOCVD設備中,所述MOCVD的處理腔室進行採用HCl和Ar的混合氣體產生酸性等離子體,所述混合氣體的流量比範圍為0.6:1~1.4:1,處理腔室的壓力範圍為0~1.5托,所述流速範圍為0.3~0.8slm,產生等離子體的射頻電源的頻率為低頻信號(頻率範圍為10~20MHz),射頻功率範圍為1000~2000瓦,測試時的工藝腔室內的溫度範圍為300~700攝氏度,加熱距離範圍為10~22毫米,在上述條件下產生等離子體進行測試,測試時間大於至少為8小時。 During the test, the respective test samples are installed together with the shower head 100 in an MOCVD apparatus, and the processing chamber of the MOCVD performs an acid plasma using a mixed gas of HCl and Ar, and the flow ratio of the mixed gas ranges from 0.6:1~1.4:1, the pressure of the processing chamber ranges from 0 to 1.5 Torr, the flow rate ranges from 0.3 to 0.8 slm, and the frequency of the RF power source that generates the plasma is a low frequency signal (frequency range is 10-20 MHz). The RF power range is 1000~2000 watts. The temperature range in the process chamber during testing is 300~700 degrees Celsius, the heating distance range is 10~22 mm, and the plasma is tested under the above conditions. The test time is greater than at least 8 hours. .

根據上述測試條件,分別根據第一測試樣本101和第二測試樣本102表面上的抗刻蝕層的厚度的減小量,以及所述第三測試樣本103的未覆蓋矽片的表面1031的材質(即不銹鋼SS316L)厚度的減小量,結合測試時間,測試上述測試條件下等離子體對第一測試樣本101上的第一抗刻蝕層1011和第二測試樣本102上的第二抗刻蝕層1021的刻蝕速率以及第三測試樣本103的未覆蓋矽片的區域1031(即不銹鋼材質SS316L)的刻蝕速率,然後計算所述第一抗刻蝕層1011和第二抗刻蝕層1021相對所述第三測試樣本103的未覆蓋矽片的區域1031的材質(即不銹鋼材質)的相對刻蝕速率,結果為:對於第三測試樣本103的材質為SS316L,材質為Y2O3的第一抗刻蝕層1011的相對刻蝕速率僅為SS316L的12.0%,材質為Al2O3的第二抗刻蝕層1021的相對刻蝕速率僅為SS316L的22.5%。根據上述相對刻蝕速率,採用同樣的等離子體進行刻蝕工藝,無論採用第一抗刻蝕層1011的Y2O3或第二抗刻蝕層1021的Al2O3,其刻蝕速率均遠小於不銹鋼層的刻蝕速率,因此所述抗刻蝕層具有良好的抵抗等離子體刻蝕的能力,因此,可以用於對處理腔室和或處理部件的保護。 According to the above test conditions, the amount of decrease in the thickness of the anti-etching layer on the surface of the first test sample 101 and the second test sample 102, and the material of the surface 1031 of the third test sample 103 that are not covered by the wafer, respectively. (ie stainless steel SS316L) thickness reduction, combined with the test time, testing the second anti-etching on the first anti-etching layer 1011 and the second test sample 102 on the first test sample 101 by the plasma under the above test conditions The etch rate of the layer 1021 and the etch rate of the region 1031 of the third test specimen 103 that is not covered by the slab (ie, the stainless steel material SS316L), and then the first etch resistant layer 1011 and the second etch resistant layer 1021 are calculated. The relative etch rate of the material of the region 1031 of the third test sample 103 that is not covered with the slab (ie, stainless steel) is as follows: for the third test sample 103, the material is SS316L, and the first resistance is Y2O3. The relative etching rate of the etching layer 1011 is only 12.0% of the SS316L, and the relative etching rate of the second etching resistant layer 1021 made of Al2O3 is only 22.5% of the SS316L. According to the above relative etching rate, the same plasma is used for the etching process, and the etching rate of the Y2O3 of the first anti-etching layer 1011 or the Al2O3 of the second anti-etching layer 1021 is much smaller than that of the stainless steel layer. The etch rate, and thus the etch resistant layer, has good resistance to plasma etch and, therefore, can be used to protect the processing chamber and or processing components.

發明人進行的其他相關實驗還證明,採用Y2O3的陶瓷材料的相對刻蝕速率為SS316L的11%,而Al2O3的陶瓷材料的相對刻蝕速率為SS316L的20%。 Other related experiments conducted by the inventors have also demonstrated that the relative etching rate of the ceramic material using Y2O3 is 11% of SS316L, and the relative etching rate of the ceramic material of Al2O3 is 20% of SS316L.

綜上,本發明實施例在半導體處理裝置的處理腔室和/或處理部件的暴露於等離子體的表面形成抗刻蝕層,從而在進行原位化學清潔時,該抗刻蝕層能抵抗等離子體的刻蝕,並且能夠保護處理腔室和/或處理部 件,減小等離子體對所述處理腔室和/或處理部件的表面損傷,提高所述處理腔室和/或處理部件的使用壽命,降低用戶的使用成本;進一步地,在本發明的可選實施例中,所述處理腔室和/或所述處理部件的材質與所述抗刻蝕層的材質相同,從而所述處理腔室和/或所述處理部件能夠更好地抵抗等離子體的刻蝕;進一步地,在本發明的可選實施例中所述處理腔室和/或所述處理部件的材質與所述抗刻蝕層的材質也可以不相同,從而在所述抗刻蝕層使用一段時間後,可以利用化學機械研磨、清洗、刻蝕或者機械的方法將抗刻蝕層去除,然後重新在所述處理腔室和/或所述處理部件的表面形成新的抗刻蝕層,以更好地保護處理腔室和/或處理部件,延長所述處理腔室和/或處理部件的使用壽命,從而進一步降低用戶的使用成本。 In summary, embodiments of the present invention form an anti-etching layer on a plasma-exposed surface of a processing chamber of a semiconductor processing apparatus and/or a processing component, such that the anti-etching layer is resistant to plasma during in-situ chemical cleaning. Body etching and protection of the processing chamber and/or processing unit Reduce the surface damage of the plasma to the processing chamber and/or the processing component, increase the service life of the processing chamber and/or the processing component, and reduce the user's use cost; further, in the present invention In an alternative embodiment, the processing chamber and/or the processing component are made of the same material as the anti-etching layer, so that the processing chamber and/or the processing component can better resist plasma. Etching; further, in an alternative embodiment of the present invention, the material of the processing chamber and/or the processing component may be different from the material of the anti-etching layer, thereby After the etching layer is used for a period of time, the anti-etching layer may be removed by chemical mechanical polishing, cleaning, etching or mechanical means, and then a new anti-etching is formed on the surface of the processing chamber and/or the processing member. The etch layer is used to better protect the processing chamber and/or processing components, extending the useful life of the processing chamber and/or processing components, thereby further reducing user cost of use.

雖然本發明己以較佳實施例披露如上,但本發明並非限定於此。任何本領域技術人員,在不脫離本發明的精神和範圍內,均可作各種更動與修改,因此本發明的保護範圍應當以權利要求所限定的範圍為准。 Although the invention has been disclosed above in the preferred embodiments, the invention is not limited thereto. Any changes and modifications may be made by those skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be determined by the scope defined by the appended claims.

10‧‧‧噴淋頭 10‧‧‧Sprinkler

100‧‧‧噴淋頭 100‧‧‧Sprinkler

1001‧‧‧孔 1001‧‧‧ hole

101‧‧‧第一測試樣本 101‧‧‧First test sample

1011‧‧‧第一抗刻蝕層 1011‧‧‧First anti-etching layer

1012‧‧‧第一抗刻蝕層 1012‧‧‧First anti-etching layer

102‧‧‧第二測試樣本 102‧‧‧Second test sample

1021‧‧‧第二抗刻蝕層 1021‧‧‧second anti-etching layer

1022‧‧‧第二抗刻蝕層 1022‧‧‧Second anti-etching layer

103‧‧‧第三測試樣本 103‧‧‧ third test sample

1031‧‧‧表面 1031‧‧‧ surface

1032‧‧‧表面 1032‧‧‧ surface

20‧‧‧加熱石墨基座 20‧‧‧heated graphite base

30‧‧‧待處理基片 30‧‧‧Substrate to be processed

40‧‧‧處理腔室 40‧‧‧Processing chamber

圖1是習知的MOCVD設備的結構示意圖;圖2是本發明的半導體處理裝置的製作方法流程示意圖;圖3是本發明一個實施例的用於測試抗刻蝕層的刻蝕速率的噴淋頭結構示意圖。 1 is a schematic structural view of a conventional MOCVD apparatus; FIG. 2 is a schematic flow chart of a manufacturing method of a semiconductor processing apparatus of the present invention; and FIG. 3 is a shower for testing an etching rate of an etching resistant layer according to an embodiment of the present invention; Schematic diagram of the head structure.

Claims (11)

一種半導體處理裝置,包括一處理腔室,該處理腔室用於通入源氣體,對放置於該處理腔室內的基片進行相應處理,且該處理腔室還用於容納等離子體,該處理腔室內具有多個處理部件,其中該半導體處理裝置更包括:一抗刻蝕層,覆蓋於該處理腔室和/或該處理部件的暴露於等離子體的表面,該抗刻蝕層用於抵抗等離子體的刻蝕和保護該處理腔室和/或該處理部件,該抗刻蝕層的材質為陶瓷材質。 A semiconductor processing apparatus includes a processing chamber for introducing a source gas, correspondingly processing a substrate placed in the processing chamber, and the processing chamber is further configured to accommodate a plasma, the processing The chamber has a plurality of processing components, wherein the semiconductor processing device further comprises: an anti-etching layer covering the processing chamber and/or the plasma-exposed surface of the processing component, the anti-etching layer being used for resisting The plasma is etched and protected from the processing chamber and/or the processing component, and the anti-etching layer is made of a ceramic material. 如申請專利範圍第1項所述之半導體處理裝置,其中該陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RhO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的組合。 The semiconductor processing device according to claim 1, wherein the ceramic material is one or a combination of Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, RhO2, Ir2O3, ZrO2, AlN, SiC, Si3N4. 如申請專利範圍第1項所述之半導體處理裝置,其中該處理腔室和/或該處理部件的材質與該抗刻蝕層的材質相同或者不相同。 The semiconductor processing device of claim 1, wherein the processing chamber and/or the processing component are made of the same or different material as the anti-etching layer. 如申請專利範圍第1項所述之半導體處理裝置,其中該半導體處理裝置為MOCVD設備、等離子體刻蝕設備或等離子體增強化學氣相沉積設備。 The semiconductor processing apparatus of claim 1, wherein the semiconductor processing apparatus is an MOCVD apparatus, a plasma etching apparatus, or a plasma enhanced chemical vapor deposition apparatus. 一種半導體處理裝置的製作方法,包括:提供一處理腔室或一處理部件,該處理腔室用於通入源氣體,對放置於該處理腔室內的基片進行相應處理,該處理腔室還用於容納等離子體和該處理部件;其中更包括:在該處理腔室和/或該處理部件的暴露於等離子體的表面形成一抗刻蝕層,該抗刻蝕層用於抵抗等離子體刻蝕和保護該處理腔室和/或該處理部件,該抗刻蝕層的材質為陶瓷材質。 A method of fabricating a semiconductor processing apparatus, comprising: providing a processing chamber or a processing component for introducing a source gas, and processing a substrate placed in the processing chamber, the processing chamber further For accommodating the plasma and the processing component; further comprising: forming an anti-etching layer on the plasma-exposed surface of the processing chamber and/or the processing component, the anti-etching layer being used for resisting plasma etching The processing chamber and/or the processing component are etched and protected, and the anti-etching layer is made of a ceramic material. 如申請專利範圍第5項所述之半導體處理裝置的製作方法,其中該陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RuO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的組合。 The method of fabricating a semiconductor processing apparatus according to claim 5, wherein the ceramic material is one of Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, RuO2, Ir2O3, ZrO2, AlN, SiC, Si3N4 or The combination. 如申請專利範圍第5項所述之半導體處理裝置的製作方法,其中該處理腔室和/或該處理部件的材質與該抗刻蝕層的材質相同或者不相同。 The method of fabricating a semiconductor processing apparatus according to claim 5, wherein the material of the processing chamber and/or the processing member is the same as or different from the material of the etching resistant layer. 如申請專利範圍第5項所述之半導體處理裝置的製作方法,其中該半導體處理裝置為MOCVD設備、等離子體刻蝕設備或等離子體增強化學氣相沉積設備。 The method of fabricating a semiconductor processing apparatus according to claim 5, wherein the semiconductor processing apparatus is an MOCVD apparatus, a plasma etching apparatus, or a plasma enhanced chemical vapor deposition apparatus. 如申請專利範圍第5項所述之半導體處理裝置的製作方法,其中該抗刻蝕層的製作方法為等離子體噴塗工藝、化學氣相沉積工藝、等離子體增強化學氣相沉積工藝、物理氣相沉積工藝、化學溶膠凝膠工藝、化學濕法塗層工藝或者其中的組合。 The method for fabricating a semiconductor processing device according to claim 5, wherein the anti-etching layer is formed by a plasma spraying process, a chemical vapor deposition process, a plasma enhanced chemical vapor deposition process, and a physical vapor phase. A deposition process, a chemical sol gel process, a chemical wet coating process, or a combination thereof. 一種抗刻蝕層,用於抵抗等離子體刻蝕,其中該抗刻蝕層的材質為陶瓷材質,該陶瓷材質為Y2O3、Al2O3、YAG、YF3、Er2O3、Gd2O3、RuO2、Ir2O3、ZrO2、AlN、SiC、Si3N4中的一種或者其中的組合。 An anti-etching layer for resisting plasma etching, wherein the anti-etching layer is made of ceramic material, and the ceramic material is Y2O3, Al2O3, YAG, YF3, Er2O3, Gd2O3, RuO2, Ir2O3, ZrO2, AlN, One or a combination of SiC, Si3N4. 如申請專利範圍第10項所述之抗刻蝕層,其中該抗刻蝕層製作方法為等離子體噴塗工藝、化學氣相沉積工藝、等離子體增強化學氣相沉積工藝、物理氣相沉積工藝、化學溶膠凝膠工藝、化學濕法塗層工藝或者其中的組合。 The anti-etching layer according to claim 10, wherein the anti-etching layer is formed by a plasma spraying process, a chemical vapor deposition process, a plasma enhanced chemical vapor deposition process, a physical vapor deposition process, A sol gel process, a chemical wet coat process, or a combination thereof.
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