201212194 六、發明說明： 【發明所屬之技術領域】 本發明係關於具有焊料凸塊的配線基板之製造方法， 尤其是，關於利用搭載焊球來形成焊料凸塊的配線基板之 製造方法者。 【先前技術】 過去，已知有搭載1C晶片而構成的配線基板（所謂之 半導體封裝）。在1C晶片的底面通常設置有多個端子，作 爲用於謀求與那些端子的電性連接之構造，可使用將多個 具有焊料凸塊的墊（所謂的C4墊：Controlled Collapsed Chip Connection墊）設置在配線基板的主面上者（例如參照專 利文獻1 )。以下，就上述配線基板之製造方法簡單地說 明。 首先，對形成在基板主面上之凸塊形成區域內的複數 個墊，印刷塗布助熔劑（flux )。接下來，使用焊球搭載用 遮罩等來使焊球搭載在複數個墊上。進一步地，利用回流 (reflow )使焊球加熱熔融，藉以形成焊料凸塊（例如參照 專利文獻1 )。之後，進行將已形成焊料凸塊的基板洗淨 之洗淨製程的話，配線基板便完成。 [先前技術文獻] [專利文獻] [專利文獻1]日本特開2006-73999號公報（第5圖、第 6圖等） -4- 201212194 【發明內容】 [發明所欲解決的課題] 然而，在上述習知技術的情況，在助熔劑中可能有異 物（助熔劑的凝集體或廢物等）發生。此情況，異物被夾 入焊球與墊之間，所以在此狀態下即使打算進行回流而便 焊球加熱熔融，亦無法使已熔化的焊球接觸到墊。其結果， 所形成的焊料凸塊變得無法接合至墊，因此有當進行洗浄 製程時焊料凸塊會被彈走而消失，不良品發生率變高而良 率降低的問題。 又，在最近，受到電子零件小型化潮流的影響，焊球 或墊也有小徑化的趨勢。但是，在此情況下，助熔劑中異 物（外徑40〜60 y m )所占的比例會相對變大，結果造成不 能無視於異物的存在，所以因焊料凸塊消失所造成的問題 可能會變得更加嚴重。 本發明係鑑於上述課題所成就者，其目的在於提供一 種具有焊料凸塊的配線基板之製造方法，能藉由防止焊料 凸塊的消失，來使良率提高。 [用於解決課題之手段] 作爲用於解決上述課題之手段，係一種具有焊料凸塊 的配線基板之製造方法，其特徵爲包含：基板準備製程， 係準備將複數個墊配置在基板主面上之凸塊形成區域內的 基板；焊料膏供給製程，係將包含焊料成分及助熔劑成分 的焊料膏供給在前述複數個墊上；球搭載製程，係在不供 201212194 給助熔劑（flux )下使直徑爲200 g m以下的焊球搭 供給焊料膏之前述複數個墊上；回流製程，係使所 焊球連同前述焊料膏加熱熔融而形成焊料凸塊；及 程，係將已形成前述焊料凸塊的基板洗淨。 據此，若利用此手段，則成爲在焊料膏供.給製 焊料膏供給至墊上，在球搭載製程中使焊球搭載至 焊料膏的墊上，藉以使焊料膏存在於焊球與墊之間。 在回流製程中當使焊球連同焊料膏加熱熔融時，能 含在焊料膏的焊料成分使焊球與墊接著。其結果， 形成的焊料凸塊確實地接合至墊，所以能防止在洗 焊料凸塊的消失。故，可壓低不良品發生率，所製 線基板的良率變高。 以下，就上述手段之具有焊料凸塊的配線基板 方法加以說明。 在基板準備製程，係準備將複數個墊配置在基 上之凸塊形成區域內的基板。雖然基板材料不受特 而是任意的，但是例如，樹脂基板等是合適的。作 的樹脂基板，可舉出例如由EP樹脂（環氧樹脂）、 脂（聚醯亞胺樹脂）、B T樹脂（雙馬來亞醯胺·三嗪ί ΡΡΕ樹脂（聚苯醚樹脂）等所構成之基板。此〆，； 用由這些樹脂與玻璃纖維（玻璃織布或玻璃不織布 合材料所構成的基板。作爲其具體例，有玻璃-ΒΤ ; 板、高Tg玻璃-環氧複合基板（FR-4、FR-5等）等 載在已 搭載之 洗淨製 程中將 已供給 因此， 透過包 能將所 淨時之 造的配 之製造 板主面 別限定 爲合適 PI樹 If 脂）、 尔可使 )的複 复合基 之商耐 201212194 熱注積層板等。又’亦可使用由這些樹脂與聚醯胺纖維等 之有機纖維的複合材料所構成的基板。或者是，亦可使用 由使環氧樹脂等之熱硬化性樹脂含浸至連續多孔質pTFE 等之二維網目狀氟系樹脂基材的樹脂-樹脂複合材料所構 成之基板等。作爲其他的基板材料，能選擇例如各種陶瓷 等。又’作爲相關的基板構造不受特別限定，但是例如在 核心基板的單面或兩面有增建層（build-up layer)的增建 多層配線基板是合適的。 上述基板主面上之凸塊形成區域的位置及數量不受特 別限定而是任意的，但是在例如所謂的截取多個基板的情 況下，僅有數量與配線基板的截取數量相當的凸塊形成區 域存在。雖然凸塊形成區域可只存在於基板中之一方的主 面，但是亦可存在於他方的主面。 對於配置在凸塊形成區域內的複數個墊，雖然其用途 未受到限定，但較佳爲例如用於將1C晶片覆晶（flip chip) 連接的墊（所謂的C4墊）。即，這是因爲在用於覆晶連接 的墊上，必須形成小的焊料凸塊以便謀求與尺寸小的1C晶 片側端子電性連接，因此多半使用小徑的焊料凸塊的緣故。 配置在基板主面上的複數個墊，雖然可在例如在基板 主面的最表層完全露出的狀態下予以配置，但亦可在透過 在厚度方向上貫通覆蓋基板主面之防焊阻劑的開口部露出 的狀態下予以配置。 在接下來的焊料膏供給製程’係在複數個墊上’供給 201212194 包含焊料成分及助熔劑成分的焊料膏。又，在基板主面係 由防焊阻劑覆蓋，同時複數個墊係透過在厚度方向上貫通 防焊阻劑的開口部露出的情況下，較佳爲在焊料膏供給製 程’將焊料膏供給在開口部內。依此方式進行的話，成爲 墊位於呈凹狀的防焊阻劑的開口部的底部之狀態，所以容 易將焊料膏保持在墊上，因此焊球變得容易暫時固定在該 墊上。 又’作爲焊料膏的供給方法未受特別限定，能採用任 意的手法。又，在焊料膏供給製程，較佳爲藉由使用例如 金屬遮罩的印刷法來進行焊料膏的供給。依此方式進行的 話，可比較簡單地形成薄且均一的焊料膏印刷層。此外， 作爲焊料膏的供給方法，亦可採用塗布法、打印（sump ) 法等。 在接下來的球搭載製程，在不供給助熔劑下使焊球搭 載在已供給焊料膏的複數個墊上。在球搭載製程中所使用 的焊球尺寸未受特別限定，可因應所需形成的焊料凸塊的 用途而加以適當設定，例如，較佳爲使用直徑爲200 # m以 下，尤其是直徑爲ll〇#m以下的微型球（micro-bau)。 又，墊較佳爲直徑lOOvm以下。在將焊球的直徑設定爲 200//m以下、將墊的直徑設定爲l〇〇;/m以下的情況，對 應所謂的C4墊的精細化，能比較容易地形成小的焊料凸 塊。又，在將焊球的直徑或墊的直徑如上述般設定的情況 下，因異物存在所造成之焊料凸塊消失之本案特有的問題 201212194 容易發生，因此採用上述手段的意義變大。 作爲焊球所使用的焊料材料未受特別限定，但可使用 例如錫鉛共晶焊料（Sn/37Pb :熔點183°C )。亦可使用錫 鉛共晶焊料以外的Sn/Pb系焊料，例如Sn/36Pb/2Ag組成之 焊料（熔點19 0 °C )等。又，除了如上述的加鉛焊料外，亦 可選擇Sn-Ag系焊料、Sn-Ag-Cu系焊料、Sn-Ag-Bi系焊料、 Sn-Ag-Bi-Cu系焊料、Sn-Zn系焊料、Sn-Zn-Bi系焊料等之 無鉛焊料。又，包含在上述焊料膏之焊料成分的組成，較 佳爲與焊球所使用之焊料材料的組成相同。依此方式進行 的話，焊料膏與焊球的濕潤性提高，因此當進行回流製程 時，透過包含在焊料膏的焊料成分而使焊球與墊變得容易 接觸。 在接下來的回流製程，藉由將已搭載在各墊上的焊球 連同焊料膏加熱至既定溫度使其熔融，來形成既定形狀的 焊料凸塊。在接下來的洗淨製程，將已形成焊料凸塊的基 板洗淨。經過以上的製程，製造具有焊料凸塊的配線基板。 【實施方式】 [用於實施發明的形態] 以下，基於圖式詳細地說明將本發明具體化之一實施 形態的配線基板之製造方法。 如第1圖所示般，本實施形態之配線基板10，係在兩 面具備增建層1 4、1 5的兩面增建多層配線基板。構成配線 基板1 0之核心基板1 6，係平面觀察約略矩形狀的板狀構 201212194 件，在其複數個部位形成有未圖示的貫穿孔（through hole ) 導體。這些貫穿孔導體，係電性連接核心基板1 6上面側的 增建層14的導體、及核心基·板16下面側的增建層15的導 體。 在增建層14的表面（第I基板主面12)上，設定平面 觀察約略矩形狀的凸塊形成區域R1，在凸塊形成區域R1 內，配置有複數個高度80" m〜100# m左右的焊料凸塊62。 這些焊料凸塊62，係用於與1C晶片7 1側之端子的覆晶連 接，所謂的C4用的墊。另一方面，亦在增建層15的表面 (第2基板主面13)上設定凸塊形成區域（省略圖示）， 在該凸塊形成區域內，配置有複數個高度400 μ m〜600以m 左右的焊料凸塊63。這些焊料凸塊63,係用於與未圖示之 母板側之端子的電性連接，所謂的B G A凸塊。 . 本實施形態之增建層1 4、1 5都具有同樣的構造，所以 在此僅就上面側的增建層1 4詳細地說明。如第5圖所示， 增建層14係將層間絕緣層31、32及鑛銅導體層43、44交 替積層所構成。層間絕緣層3 1、32的厚度皆爲約30 // m， 例如由使環氧樹脂含浸至連續多孔質PTFE的樹脂-樹脂複 合材料所構成。鍍銅導體層43、44係利用半加成法來形成。 又，在第2層之層間絕緣層32表面（第1基板主面12) 上之凸塊形成區域R1內，將複數個墊21配置成陣列狀。 各墊21係形成平面觀察的圓形狀，其直徑係設定爲ι00// m。又，各墊21，係藉由基底金屬層、鍍鎳層、及鏟金層 •10- 201212194 構成。基底金屬層’係形成在第1基板主面12上，並 由積層電解鑛銅所構成之金屬層，將厚度設定爲15μ 基底金屬層’係與鍍銅導體層43、44相同地利用半加 來形成。鍍鎳層，係藉由以無電解鍍鎳來將透過後述 焊阻劑33的開口部22露出的基底金屬層上面加以披 形成之鍍覆層，將厚度設定爲7//m。鍍金層，係以藉 電解鍍金來披覆鍍鎳層的方式所形成之鍍覆層，將厚 定爲0.03/zm以上、l.Oem以下。 又，如第5圖所示，層間絕緣層32的表面（第1 主面1 2 )，係由防焊阻劑3 3幾近全體地覆蓋。在此防 劑33，形成在厚度方向上貫通同防焊阻劑33的開口部 各墊21係透過開口部22露出。進一步地，在層間絕 3 1、3 2的既定部位設置有分別由鍍銅所構成之塡充的 導體（filled via conductor) 41、42。塡充的導通導體 42係將墊21及導體層43、44相互地電性連接。 接下來，就具有焊料凸塊62、63之本實施形態之 基板1 0的製造方法加以說明。 首先，進行基板準備製程，係準備將複數個墊2 1 在第1基板主面12上之凸塊形成區域R1內的基板Π 照第2圖）。又，在此階段，成爲從防焊阻劑3 3之各 部22露出各墊21的狀態。 在接下來的焊料膏供給製程，係將基板1 1放置（ 在未圖示之過去週知的印刷裝置，藉由使用金屬遮罩 且藉 m ° 成法 之防 覆所 由無 度設 基板 焊阻 22 -緣層 導通 41、 配線 配置 (參 開口 set) 的印 -11- 201212194 刷法，將焊料膏P1塗布（供給）至各墊21上（參照第3 圖）。具體而言，便是在焊料膏供給製程，透過設置在金 屬遮罩的複數個貫通孔，將焊料膏P 1供給至在各開口部 22內露出之墊2 1上。又，本實施形態之焊料膏P1係混合 焊料成分及助熔劑成分所構成者。詳述之，焊料膏P1含有 比例77%的焊料成分，並且含有比例23 %的助熔劑成分。 又，焊料膏P1的黏度比助熔劑單體的黏度高，在本實施形 態係設定爲200Pa· s左右。又，焊料成分係由Sn-Ag-Cu 系焊料所構成之直徑爲1 〇 # m的焊料粉末。 在接下來的球搭載製程，使用焊球搭載用遮罩（省略 圖示）進行焊球61的搭載（參照第4圖）。又在本實施形 態，使用直徑約1 〇〇 # m的微型球作爲焊球6 1。又，在本 實施形態之焊球61，可使用Sn-Ag-Cu系焊料作爲焊料材 料。因此，包含在上述焊料膏P1的焊料成分的組成，成爲 與焊球61所使用的焊料材料的組成相同者。 詳述之，則是在球搭載製程，使焊球搭載用遮罩密著 至位在第1基板主面1 2側之防焊阻劑3 3的表面而配置。 接著，在焊球搭載用遮罩的遮罩表面上，供給多個直徑約 100ym的焊球61。其結果，焊球61，係在設於焊球搭載 用遮罩的貫通孔內落下而落在位於貫通孔正下方的各墊21 上，藉由焊料膏P1的黏著力而暫時固定在墊21(參照第4 圖）。即，就算是辛不供給助熔劑的情況，只要進行球搭 載製程的話，仍能使複數個焊球6 1搭載在已供給焊料膏 -12- 201212194 P1之複數個墊21上。 在接下來的回流製程’係將基板11放置在過去週知的 回流爐內，將已搭載在各墊21上之各焊球61’連同焊料膏 P 1加熱至既定溫度而使其熔融。其結果’形成第5圖所示 形狀之焊料凸塊6 2。此時，焊料凸塊6 2，係成爲含有比例 5 %的焊料膏P 1。在接下來的洗淨製程’係將已形成焊料 凸塊62的基板11洗淨（助熔劑洗淨）。又，雖然省略詳 細的說明，但對第2基板主面1 3側形成焊料凸塊63亦依 此進行。經過以上的製程，製造具有焊料凸塊62、63的配 線基板1 0。 接著，說明焊料凸塊的評估方法及其結果。 首先，如以下般準備測定用樣品。準備與本實施形態 相同的焊料膏P1 (含有比例23%的助熔劑成分），將此作 爲實施例1。又，準備助熔劑，將此作爲比較例1。進一步 地，準備以約1 : 1的體積比混合助熔劑及焊料膏的混合 物，將此作爲比較例2。 接下來，將各測定用樣品（實施例1、比較例1、2 ) 印刷至墊上並加熱熔融後，觀察各測定用樣品的外觀。其 結果，在比較例1，確認了在測定用樣品（‘助熔劑）發生 異物。另一方面，在實施例1及比較例2，無法確認在測 定用樣品（焊料膏P1或混合物）發生異物。從以上事情確 認了只要使用焊料膏的話，便能防止異物的發生。 又，如以下般準備測定用樣品。準備將實施例1的焊 -13- 201212194 料膏P 1供給至墊2 1上，將焊球6 1搭載在已供給焊料膏P 1 的墊2 1上之基板丨丨（與本實施形態相同者），將此作爲實 施例1 -1。又’準備將比較例1的助熔劑供給至墊上，將焊 球搭載在已供給助熔劑的墊上之基板，將此作爲比較例 1- 1。進一步地，準備將比較例2的混合物供給至墊上，將 焊球搭載在已供給混合物的墊上之基板，將此作爲比較例 2- 1 »在此，對各測定用樣品（基板）分別搭載329 1 1個焊 球。又’每個實施例1 -1、比較例1 -1、2-1，分別準備4片 .測定用樣品。 接下來，對各測定用樣品（實施例1 - 1、比較例1 - 1、 2-1 )，測定焊球的消失數，同時算出焊球消失的比例（焊 球消失率）。以下，例示在實施例1 -1的焊球消失數的測 定方法、及焊球消失率的算出方法。首先，在作爲實施例 1 -1之各個4片測定用樣品中，計數（c 〇 u n 〇焊球消失的 墊的個數（消失數）。然後，藉由將合計的消失數除以測 定用樣品的片數（4片），來算出平均1片的焊球消失數 (焊球消失率）。將其結果合倂在表1。 [表1] 焊球消失率 實施例1 -1 1個/片 比較例1 -1 3.25個/片 比較例2 -1 2.25個/片 如表1所示，在比較例1 -1，每1片基板有3.2 5個焊 -14- 201212194 球消失，在比較例2-1，每1片基板有2.25個焊球消失。 另一方面，在實施例1-1’每1片基板只有1個焊球消失》 因此，確認了實施例1 · 1的焊球消失率比比較例丨、2_ i 的焊球消失率還低。故，證明了只要使用焊料膏取代助溶 劑的話，焊球就會變得難以消失。 進一步地，如以下般準備測定用樣品。藉由使實施例 1-1的焊球61連同焊料膏P1加熱熔融（回流），來形成具 有複數個焊料凸塊62的配線基板10，將此作爲實施例 1- 2。又，藉由使比較例1-1的焊球連同助熔劑加熱熔融， 來形成具有複數個焊料凸塊的配線基板，將此作爲比較例 卜2。進一步地，藉由使比較例2-1的焊球連同混合物加熱 熔融，來形成具有複數個焊料凸塊的配線基板，將此作爲 比較例2 - 2。在此，各準備1片實施例1 - 2及比較例1 - 2的 測定用樣品，準備4片比較例2-2的測定用樣品。 接下來，觀察各測定用樣品（實施例1 -2、比較例1 -2、 2- 2 )的外觀。其結果，無法特別確認在實施例1 -2、比較 例1 - 2、及比較例2 - 2之任一者中，有外觀的異常》 又，對各測定用樣品（實施例1 -2、比較例1 -2、2-2 )， 測定回流後的焊料凸塊的消失數，同時算出回流後的焊料 凸塊消失率。進一步地’將各測定用樣品（實施例1 -2、比 較例1 _2、2-2 )洗淨後，測定洗淨後之焊料凸塊的消失數， 同時算出洗淨後的焊料凸塊消失率。將其結果合倂在表2。 -15· 201212194 [表2] 回流後消失率 洗淨後消失率 實施例1-2 〇個/片 1個/片 比較例1 - 2 1個/片 6個/片 比較例2 - 2 2·25個/片 2.75個/片 如表2所示，在比較例丨_2，在回流後每丨片基板有】 個焊料凸塊消失’在洗淨後每1片基扳有6個焊料凸塊消 失。又，在比較例2-2 ,在回流後每1片基板有2 25個焊 料凸塊消失’在洗淨後每1片基板有2.75、個焊料凸塊消 失。進一步地，在進行10次將助熔劑印刷至墊上的製程、 及使用異丙酮擦拭助熔劑的製程後，將焊球搭載在塾上並 加熱熔融’將基板洗淨的情況，洗淨後的焊料凸塊消失數 明顯增加（每1片基板有44個焊料凸塊消失）。另一方面， 在實施例1 -2 ’在回流後焊料凸塊未消失，即使是在洗淨 後’每1片基板也只有1個焊料凸塊消失。因此，確認了 實施例1 - 2的焊料凸塊消失率比比較例1 _ 2、2 - 2的焊料凸 塊消失率還低。故’證明了只要使用焊料膏取代助熔劑的 話，焊球就會變得難以消失。 進一步地’對各測定用樣品（實施例1 _2、比較例I -2、 2-2 )測定焊料凸塊的高度，算出高度的平均値並且算出標 準差。將其結果合倂在表3。 -16- 201212194 [表3] 平均値 標準差 實施例1-2 54.954205 1.5278 1 24 比較例1 · 2 50.615199 1.8427599 比較例2-2 53.039966 1.7437944 其結果，在比較例1-2,焊料凸塊的高度平均値成爲約 50.6" m( 50.615199// m)，標準差成爲約 1.84( 1.84 27599)。 又，在比較例2-2，焊料凸塊的高度平均値成爲約53.0 g m (5 3.039966 V m)，標準差成爲約 1.74 ( 1.7437944 )。在 實施例1-2，焊料凸塊62的高度平均値成爲約55.0 /z m (54.954205# m)，標準差成爲約 1.53 ( 1.5278124)。由 以上事情確認了，使用焊料膏P1形成焊料凸塊62的實施 例1 -2，焊料凸塊的高度成爲比使用助熔劑形成焊料凸塊的 比較例1 - 2大上4 // m左右。又，確認了使用助熔劑及焊料 膏形成焊料凸塊的比較例2 - 2，焊料凸塊的高度成爲比比較 例1 - 2大上2 /z m左右。進一步確認了，使用焊料膏形成焊 料凸塊的實施例1 -2及比較例2-2，標準差比未使用焊料膏 的比較例1 -2還小，即，焊料凸塊高度的變異是小的。 又，進行洗淨後之各測定用樣品（比較例1 -2、2-2 ) 的觀察。具體而言，進行利用掃描電子顯微鏡（SEM : Scanning Electron Microscope)的觀察（SEM 觀察），觀察 各測定用樣品的焊料凸塊表面、及防焊阻劑的開口部 (SR0)與焊料凸塊的界面。又，觀察焊料凸塊的剖面（Cross -17- 201212194 觀察）’確認了形成在焊料凸塊與墊的接合界面之金屬間 化合物（IMC: Inter Metallic Compound)的狀態。然後， 進行比較例1-2與比較例2-2的比較。其結果，在焊料凸塊 表面、防焊阻劑開口部與焊料凸塊的界面、及焊料凸塊與 墊的接合界面中，無法發現在比較例1-2與比較例2-2之間 有何差異。又’確認了在比較例2 · 2，在焊料膏與焊球之間 沒有界面存在。因此，確認了即使要將焊料膏用於形成焊 料凸塊，仍能預期在焊料凸塊與墊的接著強度上未發生變 從以上的結果證明了，只要是以焊料膏取代助熔劑單 體來供給至墊上，使焊球連同焊料膏加熱熔融來形成焊料 凸塊的話，便成爲難以在焊球或焊料凸塊發生不良的情形。 因此，根據本實施形態的話便能獲得以下的效果。 (1 )在本實施形態之製造方法，係藉由在焊料膏供給 製程中將焊料膏P1供給在墊21上，在接下來的球搭載製 程中使焊球61搭載在墊21上，來使焊料膏P1存在於焊球 61與墊21之間。因此，在回流製程中當使焊球61連同焊 料膏P1加熱熔融時，能透過焊料膏P1所包含的焊料成分 來使焊球6 1與墊21接著。其結果，能將所形成的焊料凸 塊62確實地接合在墊2 1，因此能防止在洗淨時焊料凸塊 62的消失。故，可壓低不良品發生率，所製造之配線基板 10的良率變高。 (2 )在本實施形態，係在球搭載製程前，將黏度比助 -18- 201212194 熔劑還高的焊料膏P 1供給至墊2 1來取代將助熔劑供給至 墊21。其結果，在球搭載製程後，焊球61變得難以消失， 因此能減低焊球消失率。即，能使焊球6 1的搭載率提高。 而且’由於將焊料膏P1供給至墊2 1，因此能將焊料凸塊 62高度的變異縮小（參照表3所示之實施例1 -2的「標準 差」）。又，焊料膏P 1，由於具有即使時間經過仍難以溢 出（bleed )的性質，因此即使當朝墊21印刷焊料膏pi時 發生暈開，仍可防止在與鄰接的焊料膏P1之間發生橋接 (bridge ) ° 又’亦可如以下般變更本實施形態。 •在上述實施形態，雖然採用使用金屬遮罩的印刷法 來進行焊料膏P 1的供給，但亦可採用使用金屬遮罩以外的 印刷用遮罩的印刷法、或不使用這種遮罩的印刷法等，或 者亦可採用印刷法以外的手法。 •在上述實施形態’雖然使用直徑爲約1 00 /z m的微型 球作爲將被搭載之焊球6 1，但亦能使用例如直徑爲3〇〇 # m〜500" m左右之比較大的焊球。 •在上述實施形態，配線基板1 〇具備的複數個墊2 i， 係成爲用於將1C晶片7 1加以覆晶連接的墊，但亦可爲用 於將1C晶片7 1以外的電子零件或其他的配線基板加以覆 晶連接的墊。 接T來’以下列舉由前述的實施形態所掌握的技術思 想。 -19- 201212194 (1) 一種具有焊料凸塊的配線基板之製造方法，其特 徵爲包含：基板準備製程，係準備將複數個墊配置在基板 主面上之凸塊形成區域內的基板；焊料膏供給製程，係將 混合焊料成分之焊料粉末及助熔劑成分所構成的焊料膏供 給至前述複數個墊上，其中該焊料膏含有比例5%以上、 70%以下之前述助熔劑成分，且前述焊料粉末的直徑係設 定爲3 e m以上、1 5 m以下；球搭載製程，係在不供給助 熔劑下使直徑爲200 a m以下的焊球搭載在已供給焊料膏 之前述複數個墊上；回流製程，係使所搭載之前述焊球連 同前述焊料膏加熱熔融而形成焊料凸塊；及洗淨製程，係 將已形成前述焊料凸塊的基板洗淨。 (2) —種具有焊料凸塊的配線基板之製造方法，其特 徵爲在技術思想（1 )中，前述焊料膏的黏度爲50Pa · s以 上、250Pa · s以下。 (3 ) —種具有焊料凸塊的配線基板之製造方法，其特 徵爲在技術思想（1 )或（2 )中，前述焊料凸塊含有比例 5%以上、70%以下之前述焊料膏。 【圖式簡單說明】 第1圖係本實施形態之具有焊料凸塊的配線基板之槪 略圖。 第2圖係用於說明配線基板之製造方法的主要部分剖 面圖。 第3圖係用於說明配線基板之製造方法的主要部分剖 -20- 201212194 面圖。 第4圖係用於說明配線基板之製造方法的主要部分剖 面圖。 第5圖係用於說明配線基板之製造方法的主要部分剖 面圖。 【主要元件符號說明】 10 具 有 焊 料 凸 塊 的 配 線基 板 11 基 板 12 作 爲 基 板 主 面 之 第 1基 板主面 21 墊 22 開 □ 部 33 防 焊 阻 劑 61 焊 球 62 焊 料 凸 塊 P1 焊 料 膏 R1 凸 塊 形 成 區 域 -21 -[Technical Field] The present invention relates to a method of manufacturing a wiring board having solder bumps, and more particularly to a method of manufacturing a wiring board in which solder bumps are formed by mounting solder balls. [Prior Art] In the past, a wiring board (so-called semiconductor package) including a 1C wafer has been known. A plurality of terminals are usually provided on the bottom surface of the 1C wafer, and as a structure for making electrical connection with those terminals, a plurality of pads having solder bumps (so-called C4 pads: Controlled Collapsed Chip Connection pads) can be used. The main surface of the wiring board (see, for example, Patent Document 1). Hereinafter, the method of manufacturing the wiring board described above will be briefly described. First, a flux is printed and applied to a plurality of pads formed in the bump forming regions on the main surface of the substrate. Next, the solder ball is mounted on a plurality of pads using a solder ball mounting mask or the like. Further, the solder balls are heated and melted by reflow to form solder bumps (for example, refer to Patent Document 1). Thereafter, when the cleaning process of cleaning the substrate on which the solder bumps have been formed is performed, the wiring substrate is completed. [Prior Art Document] [Patent Document 1] Japanese Laid-Open Patent Publication No. 2006-73999 (Fig. 5, Fig. 6, etc.) -4- 201212194 [Disclosed] [Problems to be Solved by the Invention] However, In the case of the above-described prior art, foreign matter (aggregate or waste of flux, etc.) may occur in the flux. In this case, the foreign matter is sandwiched between the solder ball and the pad, so that the solder ball is heated and melted even if it is intended to be reflowed in this state, and the melted solder ball cannot be brought into contact with the pad. As a result, the formed solder bumps cannot be bonded to the pad, so that the solder bumps are bounced off when the cleaning process is performed, and the defective product rate is increased and the yield is lowered. In addition, recently, due to the trend of miniaturization of electronic components, solder balls or pads have a tendency to reduce in diameter. However, in this case, the proportion of the foreign matter (outer diameter 40 to 60 ym) in the flux is relatively large, and as a result, the foreign matter cannot be ignored, so the problem caused by the disappearance of the solder bump may become It is even more serious. The present invention has been made in view of the above problems, and an object thereof is to provide a method of manufacturing a wiring board having solder bumps, which can improve yield by preventing disappearance of solder bumps. [Means for Solving the Problem] As a means for solving the above problems, a method of manufacturing a wiring board having solder bumps includes a substrate preparation process for preparing a plurality of pads on a main surface of a substrate a solder paste supply process for supplying a solder paste containing a solder component and a flux component to the plurality of pads; the ball mounting process is not provided for flux under 201212194 A solder ball having a diameter of 200 gm or less is supplied to the plurality of pads of the solder paste; and a reflow process is performed to heat-melt the solder ball together with the solder paste to form a solder bump; and the solder bump is formed The substrate is washed. According to this, when the solder paste is supplied to the pad by the solder paste, the solder ball is mounted on the pad of the solder paste in the ball mounting process, so that the solder paste exists between the solder ball and the pad. . When the solder ball is heated and melted together with the solder paste in the reflow process, the solder component contained in the solder paste causes the solder balls to follow the pad. As a result, the formed solder bumps are surely bonded to the pads, so that the disappearance of the solder bumps can be prevented. Therefore, the incidence of defective products can be lowered, and the yield of the prepared substrate becomes high. Hereinafter, a method of a wiring board having solder bumps as described above will be described. In the substrate preparation process, a substrate in which a plurality of pads are disposed in a bump formation region on a substrate is prepared. Although the substrate material is not particularly arbitrary, for example, a resin substrate or the like is suitable. Examples of the resin substrate include an epoxy resin (epoxy resin), a fat (polyimide resin), and a BT resin (bismaleimide/triazine) resin (polyphenylene ether resin). A substrate composed of these resins and glass fibers (glass woven fabric or glass non-woven fabric. As a specific example thereof, there is a glass-ruthenium; a plate, a high Tg glass-epoxy composite substrate ( FR-4, FR-5, etc., etc. will be supplied in the washing process already installed. Therefore, the main surface of the manufacturing board that is made by the package can be limited to the appropriate PI tree If grease) Can make) complex composite base of the resistance to 201212194 thermal injection laminates and so on. Further, a substrate composed of a composite material of these resins and organic fibers such as polyamide fibers may be used. Alternatively, a substrate made of a resin-resin composite material obtained by impregnating a thermosetting resin such as an epoxy resin into a two-dimensional mesh-like fluorine resin substrate such as continuous porous pTFE may be used. As other substrate materials, for example, various ceramics and the like can be selected. Further, the related substrate structure is not particularly limited, but for example, an additional multilayer wiring substrate having a build-up layer on one or both sides of the core substrate is suitable. The position and the number of the bump forming regions on the main surface of the substrate are not particularly limited, but are arbitrary, but in the case of, for example, so-called cutting of a plurality of substrates, only a number of bumps corresponding to the number of cuts of the wiring substrate are formed. The area exists. Although the bump forming region may exist only on one of the main faces of the substrate, it may exist on the other main face. For the plurality of pads disposed in the bump formation region, although the use thereof is not limited, it is preferably, for example, a pad for connecting a 1C wafer flip chip (so-called C4 pad). That is, this is because a small solder bump must be formed on the pad for flip chip connection so as to be electrically connected to the 1C chip side terminal having a small size, so that a small-diameter solder bump is often used. The plurality of pads disposed on the main surface of the substrate may be disposed, for example, in a state in which the outermost surface of the main surface of the substrate is completely exposed, but may also penetrate the solder resist that covers the main surface of the substrate in the thickness direction. The opening is placed in a state where the opening is exposed. The next solder paste supply process is applied to a plurality of pads to supply 201212194 a solder paste containing a solder component and a flux component. Further, when the main surface of the substrate is covered with a solder resist and a plurality of pads are exposed through the opening of the solder resist in the thickness direction, it is preferable to supply the solder paste in the solder paste supply process In the opening. In this manner, since the pad is placed at the bottom of the opening of the concave solder resist, it is easy to hold the solder paste on the pad, so that the solder ball is easily fixed to the pad temporarily. Further, the method of supplying the solder paste is not particularly limited, and any method can be employed. Further, in the solder paste supply process, it is preferable to supply the solder paste by a printing method using, for example, a metal mask. In this manner, a thin and uniform solder paste print layer can be formed relatively simply. Further, as a method of supplying the solder paste, a coating method, a sump method, or the like may be employed. In the next ball mounting process, the solder balls are placed on a plurality of pads to which the solder paste has been supplied without supplying a flux. The size of the solder ball used in the ball mounting process is not particularly limited, and may be appropriately set depending on the use of the solder bump to be formed. For example, it is preferable to use a diameter of 200 #m or less, especially a diameter of ll.微型#m below the micro-bau. Further, the mat is preferably not more than 100 vm in diameter. When the diameter of the solder ball is set to 200 / / m or less and the diameter of the pad is set to l / / or less, it is relatively easy to form a small solder bump in accordance with the refinement of the so-called C4 pad. Further, when the diameter of the solder ball or the diameter of the pad is set as described above, the problem unique to the present invention due to the disappearance of the solder bump due to the presence of the foreign matter is likely to occur in 201212194. Therefore, the significance of the above means is increased. The solder material used as the solder ball is not particularly limited, but for example, tin-lead eutectic solder (Sn/37Pb: melting point: 183 ° C) can be used. A Sn/Pb-based solder other than tin-lead eutectic solder, for example, a solder composed of Sn/36Pb/2Ag (melting point: 19 0 °C), or the like can be used. Further, in addition to the lead-added solder as described above, Sn-Ag solder, Sn-Ag-Cu solder, Sn-Ag-Bi solder, Sn-Ag-Bi-Cu solder, and Sn-Zn system may be selected. Lead-free solder such as solder or Sn-Zn-Bi solder. Further, the composition of the solder component contained in the solder paste is preferably the same as the composition of the solder material used for the solder ball. In this manner, the solder paste and the solder ball are improved in wettability. Therefore, when the reflow process is performed, the solder ball and the pad are easily contacted by the solder component contained in the solder paste. In the subsequent reflow process, solder bumps of a predetermined shape are formed by heating the solder balls mounted on the pads together with the solder paste to a predetermined temperature and melting them. In the subsequent cleaning process, the substrate on which the solder bumps have been formed is washed. Through the above process, a wiring substrate having solder bumps is manufactured. [Embodiment] [Embodiment for Carrying Out the Invention] Hereinafter, a method of manufacturing a wiring board according to an embodiment of the present invention will be described in detail based on the drawings. As shown in Fig. 1, the wiring board 10 of the present embodiment is a multi-layered wiring board in which both sides of the build-up layers 14 and 15 are provided on both sides. The core substrate 16 constituting the wiring substrate 10 is a substantially rectangular plate-shaped structure 201212194, and a through hole conductor (not shown) is formed in a plurality of portions. These through-hole conductors are electrically connected to the conductor of the build-up layer 14 on the upper side of the core substrate 16 and the conductor of the build-up layer 15 on the lower side of the core substrate 16. On the surface of the build-up layer 14 (the first substrate main surface 12), a substantially rectangular bump formation region R1 is formed in plan view, and a plurality of heights 80"m~100# m are disposed in the bump formation region R1. Left and right solder bumps 62. These solder bumps 62 are used for flip chip bonding with terminals on the 1C wafer 7 1 side, so-called pads for C4. On the other hand, a bump forming region (not shown) is also provided on the surface (second substrate main surface 13) of the build-up layer 15, and a plurality of heights of 400 μm to 600 are arranged in the bump forming region. A solder bump 63 of about m. These solder bumps 63 are used for electrical connection to terminals on the mother board side (not shown), so-called B G A bumps. Since the additional layers 14 and 15 of the present embodiment have the same structure, only the above-described additional layer 14 of the upper side will be described in detail. As shown in Fig. 5, the build-up layer 14 is formed by alternately stacking the interlayer insulating layers 31 and 32 and the ore-copper conductor layers 43, 44. The interlayer insulating layers 3 1 and 32 each have a thickness of about 30 // m, and are made of, for example, a resin-resin composite material in which an epoxy resin is impregnated into continuous porous PTFE. The copper-plated conductor layers 43, 44 are formed by a semi-additive method. Further, a plurality of pads 21 are arranged in an array in the bump forming region R1 on the surface (first substrate main surface 12) of the interlayer insulating layer 32 of the second layer. Each of the mats 21 is formed into a circular shape as viewed in plan, and its diameter is set to ι00 / / m. Further, each of the pads 21 is composed of a base metal layer, a nickel plating layer, and a shovel layer 1010 to 201212194. The base metal layer 'is formed on the first substrate main surface 12 and is made of a metal layer composed of electrolytic copper ore, and the thickness is set to 15 μ. The base metal layer ' is the same as the copper-plated conductor layers 43 and 44. To form. The nickel plating layer is a plating layer formed by coating the upper surface of the underlying metal layer through which the opening 22 of the solder resist 33 described later is exposed by electroless nickel plating, and the thickness is set to 7 / m. The gold plating layer is a plating layer formed by coating a nickel plating layer by electrolytic gold plating, and is thicker than 0.03/zm or more and 1.00 or less. Further, as shown in Fig. 5, the surface (first main surface 1 2) of the interlayer insulating layer 32 is covered almost entirely by the solder resist 3 3 . In the preventive agent 33, an opening portion penetrating the same as the solder resist 33 in the thickness direction is formed so that each of the pads 21 is exposed through the opening portion 22. Further, filled via conductors 41 and 42 each made of copper plating are provided at predetermined portions of the interlayers 3 1 and 3 2 . The conductive conduction conductor 42 electrically connects the pad 21 and the conductor layers 43, 44 to each other. Next, a method of manufacturing the substrate 10 of the present embodiment having the solder bumps 62 and 63 will be described. First, the substrate preparation process is performed, and the substrate in which the plurality of pads 2 1 are formed in the bump formation region R1 on the first substrate main surface 12 is prepared as shown in Fig. 2). Further, at this stage, the pads 21 are exposed from the respective portions 22 of the solder resist 3 3 . In the next solder paste supply process, the substrate 11 is placed (in the past, a conventionally known printing device is used, and a metal mask is used, and the substrate is soldered by the m ° method. The solder paste P1 is applied (applied) to each of the pads 21 (see Fig. 3). In the solder paste supply process, the solder paste P 1 is supplied to the pads 2 1 exposed in the respective openings 22 through a plurality of through holes provided in the metal mask. Further, the solder paste P1 of the present embodiment is a mixed solder. Specifically, the solder paste P1 contains a proportion of 77% of the solder component and contains 23% of the flux component. Further, the viscosity of the solder paste P1 is higher than that of the flux monomer. In the present embodiment, the solder composition is a solder powder having a diameter of 1 〇 #m composed of Sn-Ag-Cu solder. The solder ball is mounted on the next ball mounting process. Solder ball 61 with a mask (not shown) Mounted (see Fig. 4). In the present embodiment, a microball having a diameter of about 1 〇〇# m is used as the solder ball 61. Further, in the solder ball 61 of the present embodiment, a Sn-Ag-Cu system can be used. The solder is used as the solder material. Therefore, the composition of the solder component contained in the solder paste P1 is the same as the composition of the solder material used for the solder ball 61. In detail, the ball mounting process is used to mount the solder ball. The mask is placed in close contact with the surface of the solder resist 3 on the first substrate main surface 1 2 side. Next, a plurality of solders having a diameter of about 100 μm are supplied to the mask surface of the solder ball mounting mask. As a result, the solder ball 61 is dropped in the through hole provided in the solder ball mounting mask and falls on each of the pads 21 located directly under the through hole, and is temporarily fixed by the adhesion of the solder paste P1. In the mat 21 (see Fig. 4), even if the flux is not supplied, if a ball mounting process is performed, a plurality of solder balls 6 1 can be mounted on the solder paste -12-201212194 P1. On a plurality of pads 21. In the next reflow process, the substrate 11 is placed over In the well-known reflow furnace, each solder ball 61' mounted on each pad 21 is heated to a predetermined temperature and melted with the solder paste P1. As a result, the solder bumps of the shape shown in Fig. 5 are formed. 6 2. At this time, the solder bumps 6 2 are made to contain the solder paste P 1 in a ratio of 5%. In the next cleaning process, the substrate 11 on which the solder bumps 62 have been formed is washed (flux cleaning) Further, although the detailed description is omitted, the solder bumps 63 are formed on the side of the main surface 13 of the second substrate. The wiring substrate 10 having the solder bumps 62 and 63 is manufactured through the above process. Next, a method of evaluating solder bumps and a result thereof will be described. First, a sample for measurement is prepared as follows. The solder paste P1 (containing a flux component of 23%) in the same manner as in the present embodiment was prepared, and this was taken as Example 1. Further, a flux was prepared, and this was designated as Comparative Example 1. Further, a mixture of a flux and a solder paste was prepared in a volume ratio of about 1:1, which was taken as Comparative Example 2. Next, each sample for measurement (Example 1, Comparative Examples 1, 2) was printed on a mat and heated and melted, and the appearance of each sample for measurement was observed. As a result, in Comparative Example 1, it was confirmed that foreign matter occurred in the sample for measurement (the "flux"). On the other hand, in Example 1 and Comparative Example 2, it was not confirmed that foreign matter was generated in the sample for measurement (solder paste P1 or mixture). From the above, it was confirmed that the use of the solder paste can prevent the occurrence of foreign matter. Moreover, the sample for measurement was prepared as follows. The welding-13-201212194 paste P1 of the first embodiment is supplied to the mat 21, and the solder ball 61 is mounted on the mat 21 of the mat 21 to which the solder paste P1 has been supplied (the same as this embodiment). This is taken as Example 1-1. Further, it was prepared to supply the flux of Comparative Example 1 to the mat, and to mount the solder ball on the substrate on which the flux was supplied, as Comparative Example 1-1. Further, the mixture of the comparative example 2 was supplied to the mat, and the solder ball was mounted on the substrate on which the mixture was supplied, and this was used as a comparative example 2 - 1 » Here, each sample for measurement (substrate) was mounted 329. 1 1 solder ball. Further, each of Example 1-1 and Comparative Examples 1-1 and 2-1 was prepared in four samples for measurement. Next, for each sample for measurement (Example 1-1, Comparative Example 1-1, 2-1), the number of disappearance of the solder balls was measured, and the ratio of the disappearance of the solder balls (the ball disappearance rate) was calculated. Hereinafter, a method of measuring the number of disappearance of the solder balls in the embodiment 1-1 and a method of calculating the disappearance rate of the solder balls will be exemplified. First, in each of the four samples for measurement of Example 1-1, the number of mats (the number of disappearances) in which the solder balls disappeared was counted. Then, the total number of disappearances was divided by the measurement. The number of shots (4 pieces) of the sample was used to calculate the number of disappearances of the solder balls (the ball disappearance rate) of the average one piece. The results are shown in Table 1. [Table 1] Solder ball disappearance rate Example 1 -1 1 /Comparative Example 1 -1 3.25 / piece Comparative Example 2 -1 2.25 pieces / piece As shown in Table 1, in Comparative Example 1-1, there were 3.2 5 welding-14-201212194 balls per one substrate disappearing, In Comparative Example 2-1, 2.25 solder balls disappeared per one substrate. On the other hand, in Example 1-1', only one solder ball disappeared per one substrate. Therefore, the welding of Example 1·1 was confirmed. The ball disappearance rate is lower than the solder ball disappearance rate of the comparative example 2 and 2_ i. Therefore, it has been confirmed that the solder ball is hard to disappear as long as the solder paste is used instead of the co-solvent. Further, the measurement sample is prepared as follows. A wiring base having a plurality of solder bumps 62 is formed by heating (refusing) the solder balls 61 of the embodiment 1-1 together with the solder paste P1. 10, this was taken as Example 1-2. Further, a wiring board having a plurality of solder bumps was formed by heating and melting the solder balls of Comparative Example 1-1 together with a flux, and this was made into a comparative example. Further, a wiring board having a plurality of solder bumps was formed by heating and melting the solder balls of Comparative Example 2-1 together with the mixture, and this was made into Comparative Example 2-2. Here, one sheet of Example 1 was prepared. In the sample for measurement of Comparative Example 1 and 2, four samples for measurement of Comparative Example 2-2 were prepared. Next, each sample for measurement was observed (Example 1-2, Comparative Example 1-2, 2- 2) As a result, it was not possible to specifically confirm that there was an abnormality in appearance in any of Example 1-2, Comparative Example 1-2, and Comparative Example 2-2, and each sample for measurement (Example) 1 - 2, Comparative Example 1 - 2, 2-2), the number of disappearance of the solder bump after reflow was measured, and the disappearance rate of the solder bump after reflow was calculated. Further, each sample for measurement (Example 1 - 2. Comparative Example 1 _2, 2-2) After washing, the number of disappearance of the solder bump after washing was measured, and the washing was calculated. Solder bump disappearance rate. The results are summarized in Table 2. -15· 201212194 [Table 2] Disappearance rate after reflow, disappearance rate after washing Example 1-2 〇 piece/piece 1 piece/piece comparison example 1 - 2 1/piece 6/piece Comparative Example 2 - 2 2·25/piece 2.75/piece As shown in Table 2, in Comparative Example 丨_2, after soldering, there is a solder bump disappearing per wafer substrate 'There are 6 solder bumps missing per 1 substrate after cleaning. Also, in Comparative Example 2-2, 2 25 solder bumps disappear per substrate after reflow'. The substrate has 2.75 and a solder bump disappears. Further, after the process of printing the flux onto the pad 10 times and the process of wiping the flux with the acetone, the solder ball is mounted on the crucible and heated and melted to clean the substrate, and the solder is cleaned. The number of bump disappearances is significantly increased (44 solder bumps per 1 substrate disappear). On the other hand, in the Example 1-2', the solder bump did not disappear after the reflow, and even after the cleaning, only one solder bump disappeared per one substrate. Therefore, it was confirmed that the solder bump disappearance rate of Example 1-2 was lower than that of Comparative Examples 1 2, 2 - 2 . Therefore, it has been proved that the solder ball becomes difficult to disappear as long as the solder paste is used instead of the flux. Further, the height of the solder bump was measured for each sample for measurement (Example 1 _2, Comparative Example I-2, 2-2), the average enthalpy of the height was calculated, and the standard deviation was calculated. The results are combined in Table 3. -16- 201212194 [Table 3] Average 値 standard deviation Example 1-2 54.954205 1.5278 1 24 Comparative Example 1 · 2 50.615199 1.8427599 Comparative Example 2-2 53.039966 1.7437944 As a result, in Comparative Example 1-2, the height of the solder bump The average enthalpy becomes about 50.6 " m (50.615199 / / m), the standard deviation becomes about 1.84 ( 1.84 27599). Further, in Comparative Example 2-2, the height average 値 of the solder bump was about 53.0 g m (5 3.039966 V m), and the standard deviation was about 1.74 (1.7437944). In Example 1-2, the height average 値 of the solder bump 62 became about 55.0 / z m (54.954205 # m), and the standard deviation became about 1.53 (1.5278124). From the above, it was confirmed that in Example 1-2 in which the solder bumps 62 were formed using the solder paste P1, the height of the solder bumps was about 4 // m larger than that of Comparative Example 1 - 2 in which solder bumps were formed using a flux. Further, in Comparative Example 2-2 in which a solder bump was formed using a flux and a solder paste, the height of the solder bump was about 2 / z m larger than that of Comparative Example 1-2. Further, in Example 1-2 and Comparative Example 2-2 in which solder bumps were formed using solder paste, the standard deviation was smaller than Comparative Example 1-2 in which no solder paste was used, that is, the variation in solder bump height was small. of. Further, observations of each of the measurement samples (Comparative Examples 1 - 2, 2-2) after washing were carried out. Specifically, observation by a scanning electron microscope (SEM: Scanning Electron Microscope) (SEM observation) was performed, and the surface of the solder bump of each measurement sample and the opening (SR0) of the solder resist and the solder bump were observed. interface. Further, the cross section of the solder bump (observed in Cross -17-201212194) was observed, and the state of the intermetallic compound (IMC: Inter Metallic Compound) formed at the joint interface between the solder bump and the pad was confirmed. Then, a comparison between Comparative Example 1-2 and Comparative Example 2-2 was performed. As a result, in the joint surface of the solder bump, the interface between the solder resist opening and the solder bump, and the bonding interface between the solder bump and the pad, it was found that there was no difference between Comparative Example 1-2 and Comparative Example 2-2. What is the difference. Further, it was confirmed that in Comparative Example 2·2, no interface exists between the solder paste and the solder balls. Therefore, it was confirmed that even if the solder paste is to be used for forming the solder bump, it is expected that the solder bump and the pad have no change in the bonding strength from the above, as long as the solder paste is used instead of the flux monomer. When it is supplied to the pad and the solder ball is heated and melted together with the solder paste to form a solder bump, it becomes difficult to cause a defect in the solder ball or the solder bump. Therefore, according to the present embodiment, the following effects can be obtained. (1) In the manufacturing method of the present embodiment, the solder paste P1 is supplied to the pad 21 in the solder paste supply process, and the solder ball 61 is mounted on the pad 21 in the subsequent ball mounting process. The solder paste P1 exists between the solder balls 61 and the pads 21. Therefore, when the solder ball 61 and the solder paste P1 are heated and melted in the reflow process, the solder ball 61 and the pad 21 can be passed through the solder component contained in the solder paste P1. As a result, the formed solder bumps 62 can be surely bonded to the pad 2 1, so that the disappearance of the solder bumps 62 during cleaning can be prevented. Therefore, the incidence of defective products can be lowered, and the yield of the manufactured wiring substrate 10 becomes high. (2) In the present embodiment, before the ball mounting process, the solder paste P1 having a higher viscosity than the flux is supplied to the pad 2 1 instead of supplying the flux to the pad 21. As a result, after the ball mounting process, the solder balls 61 are hard to disappear, so that the solder ball disappearance rate can be reduced. That is, the mounting rate of the solder ball 61 can be improved. Further, since the solder paste P1 is supplied to the pad 2 1, the variation in the height of the solder bump 62 can be reduced (refer to the "standard deviation" of the embodiment 1-2 shown in Table 3). Further, since the solder paste P1 has a property of being bleed even if time passes, even if blooming occurs when the solder paste pi is printed toward the pad 21, bridging with the adjacent solder paste P1 can be prevented. (bridge) ° Further, this embodiment can be changed as follows. In the above embodiment, the solder paste P1 is supplied by a printing method using a metal mask. However, a printing method using a printing mask other than a metal mask or a mask without using such a mask may be employed. Printing methods, etc., or methods other than printing methods can also be used. In the above embodiment, although a microball having a diameter of about 100/zm is used as the solder ball 6 to be mounted, it is also possible to use a relatively large solder having a diameter of, for example, 3〇〇#m~500" ball. In the above embodiment, the plurality of pads 2 i included in the wiring board 1 系 are pads for flip-chip bonding the 1C wafer 7 1 , but may be used for electronic components other than the 1 C wafer 7 1 or Other wiring boards are flip-chip bonded pads. The following is a description of the technical idea grasped by the above-described embodiments. -19- 201212194 (1) A method of manufacturing a wiring substrate having solder bumps, comprising: a substrate preparation process, which is a substrate in which a plurality of pads are disposed in a bump formation region on a main surface of the substrate; The paste supply process is a method of supplying a solder paste composed of a solder powder and a flux component of a mixed solder component to the plurality of pads, wherein the solder paste contains the flux component in a ratio of 5% or more and 70% or less, and the solder is The diameter of the powder is set to 3 em or more and 15 m or less. The ball mounting process is performed by mounting a solder ball having a diameter of 200 am or less on the plurality of pads to which the solder paste has been supplied without supplying a flux; The solder balls mounted thereon are heated and melted together with the solder paste to form solder bumps, and the cleaning process is to clean the substrate on which the solder bumps have been formed. (2) A method of manufacturing a wiring board having solder bumps, characterized in that in the technical idea (1), the solder paste has a viscosity of 50 Pa·s or more and 250 Pa·s or less. (3) A method of manufacturing a wiring board having a solder bump, wherein the solder bump contains the solder paste in a ratio of 5% or more and 70% or less in the technical idea (1) or (2). BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a wiring board having solder bumps in the present embodiment. Fig. 2 is a cross-sectional view showing the main part of a method of manufacturing a wiring board. Fig. 3 is a cross-sectional view showing the main part of the manufacturing method of the wiring board -20-201212194. Fig. 4 is a cross-sectional view showing the main part of a method of manufacturing a wiring board. Fig. 5 is a cross-sectional view showing the main part of a method of manufacturing a wiring board. [Description of main component symbols] 10 Wiring substrate 11 having solder bumps Substrate 12 First main surface of the substrate as the main surface of the substrate 21 Pad 22 Opening portion 33 Solder resist 61 Solder ball 62 Solder bump P1 Solder paste R1 convex Block formation area-21 -