201111797 六、發明說明： 【發明所屬之技術領域】 路測撕卡，制㈣於翻在積體電 【先前技術】 在LED、半導體等測試領域的測試機中，一般是201111797 VI. Description of the invention: [Technical field of invention] Road test tear card, system (4) in turning over integrated electricity [Prior Art] In test machines for LED, semiconductor and other test fields, generally
列=罙針卡電性連接至測試機之輸入及輸出端子，藉由探 之探針接觸積體電路待測物後，再由測試機傳送電 仏 待測積體電路，達到測試機進行測試的目的敗肝^虎給予 美，專利編號5,525,911號案件提出了一種陣列式探 卡，在這種陣列式探針卡中，雖然使用同軸線來電性連接於 路板與待測積體電路之間，但纟於並非所有的線路都需要 到高頻信號，因此當所使用的同軸線的線徑過大時，將極 於巧式探針的間距之微小化。此外，既使在其他無須使用言 頻信號的線路巾使用單讀或漆包線，但在錄腳數的 g 中、印刷電路板的開口大小有限的情況下，將使得信 交錯，甚至有相互拉扯斷裂的危險，同時也增加了加 難、與電訊號相互干擾的風險。 曰本專利編號H10-048298號案件提出了另一種陣列 針卡，在這種陣列式探針卡中，在探針卡的探針針數因為待= 積體電路的複雜化或多晶粒同時測試而隨著增加時，稱為 MLO/MLC(Multi-Layer Organic/Multi-Layer ceramic)的測試基^ 162必須放入更多的信號線路(_匀；如此，測試基 板勢必得擴大面積，此時，測試基板162上的焊點與探針$ 164下方的墊片必須以迴銲(reflow)方式進行電信號連结j作 MLO/MLC測試基板的面積擴大將造成迴銲得克難『大美 溫性不佳』馨點，關『大基板均雜不佳』是指至^測試 201111797 基板162與探針卡164之間被夾置的錫球，在迴銲(refl〇w)的 升溫過程，錫球不容易達到一致的溫度；此外，印刷電路板因 為結構、技術受限，其内部線路也無法傳遞如2GHz以上的高 頻信號。Column = pin is electrically connected to the input and output terminals of the test machine. After the probe contacts the object to be tested, the tester transmits the circuit to be tested to reach the test machine for testing. The purpose of the defeated liver ^ tiger to the United States, patent number 5,525, 911 case proposed an array of probe cards, in this array of probe cards, although the use of coaxial line is electrically connected between the road board and the integrated circuit to be tested However, not all lines require high-frequency signals, so when the diameter of the coaxial line used is too large, the pitch of the smart probe will be miniaturized. In addition, even if the single-read or enameled wire is used in other line towels that do not need to use the frequency signal, if the number of openings of the printed circuit board is limited in the number of the recorded feet, the letter will be staggered, and even the ones may be pulled apart. The danger also increases the risk of adding difficulties and interfering with the electrical signals. In the case of the patent number H10-048298, another array pin card is proposed. In the array type probe card, the number of probe pins in the probe card is complicated by the integrated circuit or the multi-die simultaneously As the test increases, a test base called MLO/MLC (Multi-Layer Organic/Multi-Layer ceramic) must be placed in more signal lines (the uniformity; thus, the test substrate is bound to expand the area, this When the solder joint on the test substrate 162 and the spacer under the probe $164 must be electrically connected by reflow, the area of the MLO/MLC test substrate is enlarged, which will cause the reflow to be difficult. The temperature is not good, the sensation is singular, and the "large substrate is poor" refers to the solder ball that is sandwiched between the substrate 162 and the probe card 164 in the test 201111797, and the temperature rises in the reflow (refl〇w) In the process, the solder ball does not easily reach a uniform temperature; in addition, due to the limited structure and technology, the printed circuit board cannot transmit high-frequency signals such as 2 GHz or more.
IBM於2001年06月在技術報告中提出了一種陣列式探針 卡’是將連接於測試基板與測試機之間的線路分成二部分：一 部分走高速線路’另一部分走印刷電路板的内部。在這種陣列 式探針卡中’高速連接器是設置於MLO測試基板上，兩者均 至於印刷電路板下方。但當高速連接器設置於印刷電路板下方 時，測試機的高速連接器卻位於印刷電路板上方，這將與實際 的探針環境衝突’因為測試機的高速連接器與測試基板上之^ 速連接器分別位於印刷電路板兩側，無法相互連結；所以随 所提之架構，僅於實驗階段之探針卡，未考慮量產測試之問題。 凊參閱第一圖，其為一種習用的陣列式探針卡的側視圖。 在第一圖中，陣列式探針卡1主要是由電路板1〇、測試基板 11、探針頭12、及探針線13所構成，測試基板n上設有焊 點111以及接座112，而電路板1〇設有一貫通孔1〇3可容置 該接座112。藉由測s式機14的接頭141與接座112電連接， 便能夠使用測試機14進行高速電性測試。 然而，上述第一圖的陣列式探針卡}具有下述缺點： (1) 因為接頭141的體積較大，加上人工連接所需的操作 空間亦不小，導致電路板1〇的貫通孔1〇3面積必須大增，其 將影響電路板10内部信號線的佈線便利性與電信號傳輸^ 質’尤其在接頭141為複數個設置於測試基板η時，電路板 10内部信號線的可佈線面積，將被多個貫通孔103嚴重佔據； (2) 接座112的所在空間狹小，增加人工將其連接於 114的困難度； ' (3) 刻意加大的MLO测試基板η的面積以方便接座Η〗置 201111797 放的結果，將使得迴銲技術面臨挑戰；及 將增 加阻====觸她㈣變長 【發明内容】 能夠改善上述 因此，有必要構思一種陣列式高頻探針卡 各種習甩探針卡的諸多缺點。IBM proposed an array probe card in a technical report in June 2001 to divide the line connecting the test substrate and the test machine into two parts: one part of the high-speed line and the other part of the printed circuit board. In this array of probe cards, the 'high speed connectors are placed on the MLO test substrate, both under the printed circuit board. But when the high-speed connector is placed under the printed circuit board, the high-speed connector of the tester is located above the printed circuit board, which will conflict with the actual probe environment 'because the high-speed connector of the test machine and the test substrate The connectors are located on both sides of the printed circuit board and cannot be connected to each other; therefore, with the proposed architecture, only the probe card in the experimental stage does not consider the problem of mass production testing. Referring to the first figure, it is a side view of a conventional array probe card. In the first figure, the array probe card 1 is mainly composed of a circuit board 1 , a test substrate 11 , a probe head 12 , and a probe wire 13 . The test substrate n is provided with a solder joint 111 and a socket 112 . The circuit board 1 is provided with a through hole 1 〇 3 to accommodate the socket 112. By electrically connecting the joint 141 of the s-type machine 14 to the socket 112, the test machine 14 can be used for high-speed electrical testing. However, the array probe card of the first figure described above has the following disadvantages: (1) Since the size of the joint 141 is large, the operation space required for the manual connection is not small, resulting in a through hole of the circuit board. The area of 1〇3 must be greatly increased, which will affect the wiring convenience of the internal signal lines of the circuit board 10 and the electrical signal transmission. Especially when the plurality of terminals 141 are disposed on the test substrate η, the internal signal lines of the circuit board 10 can be The wiring area will be seriously occupied by the plurality of through holes 103; (2) The space of the socket 112 is narrow, and the difficulty of manually connecting it to the 114 is increased; ' (3) The area of the intentionally enlarged MLO test substrate η The results of the 201111797 release will make the reflow technology face a challenge; and will increase the resistance ==== touch her (four) become longer [invention] can improve the above, therefore, it is necessary to conceive an array of high frequency The probe card has many disadvantages of various conventional probe cards.
板 根據上述構想，提出一種陣列式探針卡，包括： ’具有一第一面、一第二面及一貫通孔， 電路 該貫通孔貫通該第 -面與該第二面；—測試基板，具有—第—面及 與該電路板之内部線路電性連接，該測 面連接於複數個探針線;及至少一接座，該== j路，_弟-面上’該接座利用.穿過該貫通孔的至少 輸線而與該測試基板相耦接。 根據上，構想，提出另一種陣列式探針卡，包括：一電路According to the above concept, an array probe card is provided, including: 'having a first surface, a second surface, and a through hole, the through hole penetrating through the first surface and the second surface; - a test substrate, The first surface is electrically connected to the internal circuit of the circuit board, and the measuring surface is connected to the plurality of probe lines; and at least one of the sockets, the == j way, the _---the surface is used by the socket Passing through at least the transmission line of the through hole to be coupled to the test substrate. According to the above concept, another array probe card is proposed, including: a circuit
板品ΐί:第—面、—第二面及—貫通孔，該貫通孔貫通該第 J該第二面；一測職板，具有一第一面及一第二面，該 ^式基板以該第-面連接於該電路板的該第二面，使該測試基 板之内部線路與該電路板之内部線路電性連接，該測試基板的 該f二面連接於複數悔針線；及至少—接座，触該貫通孔 :該測試基板相連接。其中，該貫通孔貫通該電路板的中央 ，域’該測試基板連接於該電路板時，該貫通孔是位於該測試 基板之中姐域的上方，該接座是設於該貫通孔内。 本案得藉由下列圖式及詳細說明，俾得更深入之了解： 201111797 【實施方式】 較佳實施例的側視圖、。* 列式探針卡的的一第一 其中22、及探針線23所構成， 是，測試基板可以藉由==212，和習用技術相同的 20相連接。 稭由迴坏方式經由焊點213而與電路板a first surface and a second surface; the through hole extends through the second surface of the Jth; the first plate and the second surface The first surface is connected to the second surface of the circuit board, and the internal circuit of the test substrate is electrically connected to the internal circuit of the circuit board, and the two sides of the test substrate are connected to the plurality of lines of repentance; and at least The socket is touched by the through hole: the test substrates are connected. Wherein, the through hole penetrates the center of the circuit board, and when the test substrate is connected to the circuit board, the through hole is located above the test field, and the socket is disposed in the through hole. The present invention can be further understood by the following drawings and detailed description: 201111797 [Embodiment] A side view of a preferred embodiment. * A first of the column probe cards 22, and the probe wire 23, the test substrate can be connected by the same 20-phase as the conventional technology by ==212. Straw is returned to the circuit board via solder joint 213
面以==在於’電路板20還具有貫通第-J^on 9Π1 、貝通孔203，而接座24則是設於電路 25盥測锬^ 91 i上*，接座24並利用阻抗匹配的高頻傳輸線 姆接。目此，藉__ 26的一高速 夠進行細^接於接座24，陣狱探針卡2便能 之本發明陣列式探針卡的優點在於，電路板20的 203極小’僅供可撓性傳輸線25通過即可，因此ml〇/mlc ^板21因為嫌職座24而能夠將面積縮小。此外， 接座24因為是設置於電路板2〇的第一面2〇1上，且尚具有辨 +巧註的空間’不但連接方便，也降低了人工判讀錯誤及錯誤 耦接的風險。 。月參閱第二圖，其為本案所提出陣列式探針卡的一第二較 ，貝私例的側視圖。與第二圖之不同處在於，此時貫通孔2的 是開設於電路板20的中央區域’同時亦位於測試基板21之中 央區域的正上方。此外，接座24也可以設置不只一個。 因此，除了第二圖的陣列式探針卡的優點以外，第三圖的 陣列式探針卡更具有的優點為，位於電路板20中央區域的貫 通子L能夠增加迴焊時的均溫程度，提高製程的良率；此外，由 於傳輸線25疋大致位於測試基板21的中央區域，因此可以降 201111797 的長度，改善高頻的阻容延遲的狀況，·甚且 、=〇中央區域沒有佈設内部線路， 又二’ 子響匕的方式，將有效降低貫通孔對電路板2G佈設二 土^參閱第_，其為本朗提出陣列式探針卡的一第 1貫=例_視圖。與第二圖之不同處在於，此時是 ΐ疋2 外，貫通孔203同樣開設於電路板20的中“ 域，同時位於測試基板21之中央區域的正上方。 、匚The surface is == lies in 'the circuit board 20 also has a through-J^on 9Π1, a passhole 203, and the socket 24 is provided on the circuit 25 锬^ 91 i, the socket 24 and utilizes impedance matching The high frequency transmission line is connected. Therefore, the advantage of the array probe card of the present invention is that the high speed of the __26 can be connected to the socket 24, and the patch probe card of the present invention has the advantage that the 203 of the circuit board 20 is extremely small. The flexible transmission line 25 is passed, so that the ml 〇/mlc ^ board 21 can reduce the area because of the vacant seat 24. In addition, since the socket 24 is disposed on the first surface 2〇1 of the circuit board 2〇, and has a space for discriminating attention, the connection is not only convenient, but also reduces the risk of manual interpretation errors and incorrect coupling. . Referring to the second figure, it is a side view of a second comparison of the array probe card proposed in the present invention. The difference from the second figure is that the through hole 2 is formed in the central portion ′ of the circuit board 20 and is also located directly above the central region of the test substrate 21. In addition, the holder 24 can also be provided with more than one. Therefore, in addition to the advantages of the array probe card of the second figure, the array probe card of the third figure has the additional advantage that the through-hole L located in the central region of the circuit board 20 can increase the degree of temperature uniformity during reflow. In addition, since the transmission line 25 疋 is located substantially in the central area of the test substrate 21, the length of 201111797 can be lowered to improve the high-frequency RC delay, and even the 〇 central area is not disposed inside. The line, and the second 'sub-sounding mode, will effectively reduce the through hole to the second board of the circuit board 2G. Referring to the _, it proposes a first pass = example view of the array type probe card. The difference from the second figure is that, in this case, the through hole 203 is also opened in the middle of the circuit board 20, and is located directly above the central area of the test substrate 21.
=，第四_陣列式探針卡囉具有上述第 式捺針卡的優點。 凊參閱第五圖’其為本案所提出陣列式探針卡的一第四較 佳實施例的側視圖，在此圖中所要表現的變化是，接座24可 以，排線所構成，之後再迴焊於測試基板21，將較於圖四所 揭路之複數個接座24安置，本排線式之接座24，將能夠有效 增加電性連接的品質、欲製作便利性。 请參閱第六圖，其為本案所提出陣列式探針卡的一第五較 佳實施例的側視圖’在此圖中所要表現的變化是，在測試基板 21的該第一面上，可以設有同時位於貫通孔203内的至少一 電子兀件27 ;再者，測試基板21的該第二面上，亦可是需求 放置電子元件27，必要時探針頭22可以開孔221以方便電子 兀件27放置；電子元件27的種類則須視實際需求狀況而定， 如主動或被動電子元件等。 請參閱第七圖，其為本案所提出陣列式探針卡的一第六較 佳實施例的側視圖，在此圖中所要表現的變化是，在測試基板 21 6^該第一面上，更填充有同時位於貫通孔203内的一膠體 28 ’猎以增強測試基板21與電路板20之間的固定強度，以及 增加測試基板21承受來自探針23之作用力的能力；另外，膠 201111797 収基板21、電路板2G與連接點213 :者之門 的縫=，可增加測試基板2卜電路板2〇之間的固著:者之間 伟恭其為轉所提出_式探針卡的-第七# =二側視圖，在此圖中所要表現的 = ;z，2T::r，是固定於 21承受來自探細29⑽增強測試基板 變^又來自域23之作用力的能力，防止測試基板？！受力=, the fourth_array probe cassette has the advantages of the above-described first type of needle card. Referring to the fifth drawing, which is a side view of a fourth preferred embodiment of the array probe card proposed in the present invention, the variation to be shown in this figure is that the socket 24 can be formed by a wire and then Reflow soldering to the test substrate 21 will be placed in a plurality of sockets 24 than those disclosed in FIG. 4. The wire-type socket 24 can effectively increase the quality of the electrical connection and is convenient to manufacture. Please refer to the sixth drawing, which is a side view of a fifth preferred embodiment of the array probe card of the present invention. The variation to be shown in this figure is that on the first side of the test substrate 21, At least one electronic component 27 is disposed in the through hole 203. Further, on the second surface of the test substrate 21, the electronic component 27 may be placed. If necessary, the probe head 22 may be opened 221 to facilitate the electronic The device 27 is placed; the type of the electronic component 27 depends on actual demand conditions, such as active or passive electronic components. Please refer to the seventh figure, which is a side view of a sixth preferred embodiment of the array probe card of the present invention, and the variation to be shown in the figure is that on the first side of the test substrate 21 6 Further filled with a colloid 28 in the through hole 203 to enhance the fixing strength between the test substrate 21 and the circuit board 20, and to increase the ability of the test substrate 21 to withstand the force from the probe 23; in addition, the glue 201111797 The substrate 21, the circuit board 2G and the connection point 213: the seam of the door = can increase the fixing between the test substrate 2 and the circuit board 2: between the people, the symmetry probe is proposed -Seven# = two side views, in this figure = ; z, 2T:: r, is fixed at 21 to withstand the ability of the test substrate 29 from the probe 29 (10) to enhance the test substrate and from the field 23, Prevent test substrates? ! Force
凊參閱第九(a)〜(d)圖’其為本案所提出_式 巧用之，的示意圖，在此圖中所要表現的 接的、穿過貫通孔2G3的複數根3 輸線疋選自如弟九(a)圖般的同軸線、如第九(b)圖般的雙絞 ，一接地線路與二信號線路絞結一起，達到電性上阻抗匹配的 效果，完成傳輪高速訊號的目的、如第九(c)圖般的雙併線 一接地線路與一信號線路並行且保持一特定距離，達到電性上 阻抗匹配的效果，完成傳輸高速訊號的目的、或是如第九(幻 圖般的具有電路屏蔽效果之軟板排線、可挽性電路板。 請參閱第十圖’其為本案所提出陣列式探針卡的—第八較 佳實施例的側視圖’在此圖中所要表現的變化是，穿過貫通孔 203的部分的傳輸線25是由測試基板21與電路板2〇之間的 連接點213中最接近貫通孔203的連接點（如圖中的213，、213，，) 所壓合。這種設置方式的優點在於，電路板2〇的貫通孔2〇3 中便可以因此而有足夠的空間設置更多的電子元件27。 請參閱第十一(a)圖’其為本案所提出陣列式探針卡的一 第九較佳實施例的侧視圖，在此圖中所要表現的變化是，除了 第八圖的補強圈29之外，測試基板21還可以再使用一壓^合圈 30來與電路板20相接合；這種技術可以用來取代前面幾圖的 201111797 迴焊技術。第十一（b)圖則是第十一(a)圖之壓合圈的上視圖。 請參閱第十二(a)圖與第十二(b)圖，其分別為本案所提出 陣列式探針卡的一第十、十一較佳實施例的側視圖，在第_j__凊 Refer to the ninth (a) to (d) figure, which is a schematic diagram of the _ type used in this case. In this figure, the selection of the multiple 3 transmission lines through the through hole 2G3 Coupling the coaxial line of the same figure (a), the twisted pair like the ninth (b) figure, the grounding line and the two signal lines are twisted together to achieve the electrical impedance matching effect, and the high-speed signal of the transmission is completed. The purpose is to double-connect a grounding line as shown in the ninth (c) diagram in parallel with a signal line and maintain a certain distance to achieve an electrical impedance matching effect, to complete the transmission of the high-speed signal, or as the ninth ( A phantom-like flexible board cable with a circuit shielding effect, a levable circuit board. Please refer to the tenth figure, which is the side view of the eighth preferred embodiment of the array probe card proposed in the present invention. The change to be represented in the figure is that the transmission line 25 passing through the portion of the through hole 203 is the connection point closest to the through hole 203 among the connection points 213 between the test substrate 21 and the circuit board 2 (see 213 in the figure, , 213,,) Pressed. The advantage of this arrangement is that the board is 2 Therefore, there is enough space in the through hole 2〇3 to set more electronic components 27. Please refer to the eleventh (a) figure, which is a ninth preferred embodiment of the array probe card proposed in the present invention. The side view, the change to be shown in this figure, is that in addition to the reinforcing ring 29 of the eighth figure, the test substrate 21 can be further joined to the circuit board 20 by a pressing ring 30; It is used to replace the 201111797 reflow technology of the previous figures. The eleventh (b) plan is the top view of the press ring of the eleventh (a) figure. Please refer to the twelfth (a) and twelfth ( b) Figure, which is a side view of a tenth and eleventh preferred embodiment of the array probe card proposed in the present invention, in the _j__
(a)圖中所要表現的變化是，穿過貫通孔2〇3的複數根傳輸^ 25是搞接於測試基板21的第二面212;此外，在第十二（匕） 圖中所要表現的變化是，測試基板21更可具有一穿孔214， 穿過貫通孔203的複數根傳輸線25是經由穿孔214而耦接於 測，基板21的第二面212。這二種技術上的變化都可以有效 地縮小測試基板21的面積，同時，將貫通孔2〇3對電路^ 内部線路佈局的影響，降至最低。 、>综上所述，本發明所提出的陣列式探針卡，其中ml〇/mlc 測試基板的面積可有效地縮小，並使用諸般手段來 板與，路板之間的固定強度，不但可以降低線路的長度:還^ 改善高頻線路的阻容延遲。 又 匕 本案得由熟悉本技藝之人士任施匠思而為諸般修飾，缺皆 不脫如附巾請專利範圍所欲保護者。 【圖式簡單說明】 第一圖：一種習用的陣列式探針卡的側視圖。 :。本案所提出陣列式探針卡的的一第—較佳實施例的 Ξίί:。本案所提出陣列式探針卡的的—第二較佳實施例的 ^ :。本案所提㈣列式探針卡的H較佳實施例的 側視^。本案所提出陣列式探針卡的的一第四較佳實施例的 201111797(a) The change to be represented in the figure is that the plurality of root transmissions 25 passing through the through holes 2〇3 are attached to the second surface 212 of the test substrate 21; moreover, in the twelfth (匕) diagram The change of the test substrate 21 can have a through hole 214. The plurality of transmission lines 25 passing through the through hole 203 are coupled to the second surface 212 of the substrate 21 via the through hole 214. Both of these technical changes can effectively reduce the area of the test substrate 21, and at the same time, minimize the influence of the through holes 2〇3 on the internal circuit layout of the circuit. In summary, the array probe card of the present invention, wherein the area of the ml〇/mlc test substrate can be effectively reduced, and the fixing strength between the board and the board is not limited by using various means. You can reduce the length of the line: Also ^ Improve the resistance delay of the high frequency line. Also 匕 This case has to be modified by people who are familiar with the art, and it is not necessary to remove the towel as claimed. [Simple description of the diagram] First figure: A side view of a conventional array probe card. :. A preferred embodiment of the array probe card of the present invention is Ξίί:. The second preferred embodiment of the array probe card proposed in the present invention is ^:. The side view of the preferred embodiment of the H of the (IV)-column probe card of the present invention. A fourth preferred embodiment of the array probe card proposed in the present application is 201111797
側視圖。本案所提出陣列式探針卡的的-第五較佳實施例的 。本案所提出陣列式探針卡的的-第六較佳實施例的 i見^ .。本案所提出陣列式探針卡的的-第七較佳實施例的 =⑷〜_:本案所提出陣列式探針卡所使用之線路的示 :二本案所提出陣列式探針卡的的—第八較佳實施例的 Ξ二所科_式探針卡的的一第九較佳實施 第十-(b)®:帛十_(a)圖之壓合_上視圖。 第十一(a)圖：本案所提出陣列式探針卡的一第十較佳施 例的側視圖。 ' 第十一 (b)圖：本案所提出陣列式探針卡的一第十一較佳實 施例的側視圖。 【主要元件符號說明】 I、 2陣列式探針卡 10、20電路板 II、 21測試基板 12、 22探針頭 13、 23探針線 -14、26測試機 201111797 221 開口 25傳輸線 27電子元件 28膠體 28’支撐件 29補強圈 30壓合圈 111焊點 112、24接座 141、261 接頭 201第一面 202第二面 203貫通孔 211第一面 212第二面 213、213’、213”連接點 214穿孔 11Side view. The fifth preferred embodiment of the array probe card of the present invention is proposed. The sixth preferred embodiment of the array probe card of the present invention is shown in Fig. The seventh embodiment of the array probe card proposed in the present invention = (4) ~ _: the circuit used in the array probe card proposed in the present invention: the two of the array probe cards proposed in the present case - A ninth preferred embodiment of the twentieth preferred embodiment of the twentieth embodiment of the present invention is a ninth preferred embodiment of the tenth-(b)®: 压10_(a) press-up view. Figure 11 (a) is a side view of a tenth preferred embodiment of the array probe card of the present invention. 'Eleventh (b): A side view of an eleventh preferred embodiment of the array probe card proposed in the present invention. [Main component symbol description] I, 2 array probe card 10, 20 circuit board II, 21 test substrate 12, 22 probe head 13, 23 probe line-14, 26 test machine 201111797 221 opening 25 transmission line 27 electronic components 28 colloid 28' support member 29 reinforcing ring 30 press ring 111 solder joint 112, 24 socket 141, 261 joint 201 first surface 202 second surface 203 through hole 211 first surface 212 second surface 213, 213', 213 ”Connection point 214 perforation 11