TW200843127A - Solar cell with flat contact area and manufacturing process of the same - Google Patents

Solar cell with flat contact area and manufacturing process of the same Download PDF

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Publication number
TW200843127A
TW200843127A TW96114527A TW96114527A TW200843127A TW 200843127 A TW200843127 A TW 200843127A TW 96114527 A TW96114527 A TW 96114527A TW 96114527 A TW96114527 A TW 96114527A TW 200843127 A TW200843127 A TW 200843127A
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TW
Taiwan
Prior art keywords
solar
substrate
solar cell
type semiconductor
semiconductor layer
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Application number
TW96114527A
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Chinese (zh)
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TWI329932B (en
Inventor
Yen-Chang Chen
Jiun-Fang Wang
Yi-Fan Lai
Kuo-Cheng Hsiang
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Top Green Energy Technologies Inc
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Priority to TW96114527A priority Critical patent/TW200843127A/en
Publication of TW200843127A publication Critical patent/TW200843127A/en
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Publication of TWI329932B publication Critical patent/TWI329932B/zh

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Abstract

A manufacturing process of solar cells with a flat contact area comprises: forming a mask on the solar substrate; defining a contact area on the mask and defining the area other than the contact area as a naked area; etching the naked area so as to roughen the naked area on the solar substrate; removing the mask; and forming a conductive layer on the contact area. The solar substrate formed thereby has a P-type semiconductor layer, an N-type semiconductor layer, and a conductive layer, wherein the N-type semiconductor layer is formed on the P-type semiconductor layer. The naked area is a roughened surface, and the contact area is a flat surface on which the conductive layer is formed.

Description

200843127 九、發明說明: 【發明所屬之技術領域】 本發明係-種關於具平坦_區之太陽能電池及其製程,其 特別係利用遮幕改善太陽能電池所鋪設的電極與太陽能基板之 v 間的接觸性。 【先前技術】 習知的砍太陽能電池製程中,在電極製作之前,必須經過推雜、 钕刻、熱處理等製程’並_化學侧在晶片表面進行方向性餘刻而 形成粗_微結構,以增加光在太陽能電池中的行進路線,進而降低 太陽能電池表面的光反射率。然而,此微結構產生的位置若為電極所 在位置,則易對太陽能電池之效能會產生不良影響。 其中,麥考圖1所不,其為一習知未使用本發明具平坦接觸區之 • 太陽能電池及其製程’其為一太陽能基板(A1)表面經由化學钱刻在表 面進饤方向性侧後佈置上一電極(A2),由於該電極⑽)所在位置之 ‘太基板(A1)絲為光生奸(phGtQ_eaiTier)之錄之路,若因 .侧產生缺陷⑽存在⑽太陽能基板(A1)與電極(A2)接觸處,影響 將會特別顯f。然而據選雜的方向,脸織糊過程巾,必定會造成 無電極⑽之接觸表面劣化與基板中的组織缺陷擴大,使得將原本 可藉由後處理而修補的該缺陷⑽再也無法修補。這樣的結果下,不 但會增加該缺陷⑽之表面積,也會增加再回復(謂耐邮咖)中 5 200843127 心與載子在傳遞過程中被捕捉與散射的機率以及減少能收集到的光 電流,以至於使得太陽能電池的效率下降。另外,前述狀況如果更嚴 重的話,太陽能電池基板(A1)中產生較深的凹坑(pit)(A4) ,該凹坑 (A4)的械會使得電極⑽)在操作時發纽穿而產生—通·5),並 、 _通道(A5)造賴紋大增,以致於太陽能電池魏嚴重降低,甚 至是產生不良品。 目h相關之改良方式有使用微影技術(1丨th〇graphy)或是雷身十製 • ㈣’以達成具選擇性的(selee1:ivearea)方向性組織侧或是移除 不佳之電極接觸面’但魏方㈣f精準之解技術、昂貴設備與較 長的製程時間,且與目社流性太陽能電池製程相雜較低,因此僅 適用於少量特殊規格之太陽能電池製造。 故本發明讀日狀衫餅習知域㈣紅敝,Μ思發明— 種具平坦接觸區之太陽能電池及其製程。 ^【發明内容】 、 本發縣要目的係在方向性峨侧後於電極佈置區仍能維持 . 平整,減少後續·佈置時,太陽能基板與電極介面缺_產生,而 得以提升太陽能電池效率。 本發明另-目的係在方向性組織_後於電極佈置區仍能維持 平整’避免财向健㈣致太陽能基板電極佈置區有凹坑產生,使 • 電極不易蒐集光電子。 本發明再-目的係可利用網印製程進行_步驟前的遮幕佈置 200843127 以及姓刻步驟後的電_置,不但與目叙太電池製程完全相 容’且可料需要料體黃光製程,因此具有快速以及低成本的優點。200843127 IX. Description of the Invention: [Technical Field] The present invention relates to a solar cell having a flat region and a process thereof, which in particular utilizes a curtain to improve the electrode between the electrode laid by the solar cell and the solar substrate. Contactability. [Prior Art] In the conventional solar cell manufacturing process, before the electrode is fabricated, it is necessary to perform a process such as doping, engraving, heat treatment, etc., and the chemical side forms a directional micro-structure on the surface of the wafer to form a coarse-micro structure. Increasing the path of light in the solar cell, thereby reducing the light reflectivity of the surface of the solar cell. However, if the position of the microstructure is the position of the electrode, it is likely to adversely affect the performance of the solar cell. Among them, McCaw Chart 1 is not a conventional solar cell and its process without the flat contact area of the present invention. It is a surface of a solar substrate (A1) which is engraved on the surface by the chemical money. After the upper electrode (A2) is disposed, the "sub-substrate (A1) wire at the position of the electrode (10)) is the path recorded by the light trait (phGtQ_eaiTier), and if there is a defect (10) due to the side (10), the solar substrate (A1) and At the contact of the electrode (A2), the effect will be particularly noticeable. However, according to the direction of the selection, the face-weaving process towel must cause the contact surface deterioration of the electrodeless (10) and the tissue defect in the substrate to expand, so that the defect (10) which can be repaired by post-processing can no longer be repaired. . Under such a result, not only will the surface area of the defect (10) be increased, but also the chance of recovery and scattering of the heart and the carrier during transmission will be increased and the photocurrent collected can be reduced. So that the efficiency of the solar cell is reduced. In addition, if the foregoing situation is more serious, a deep pit (A4) is generated in the solar cell substrate (A1), and the tool of the pit (A4) causes the electrode (10) to be worn during operation. - 通·5), and _ channel (A5) has greatly increased the number of wains, so that the solar cell Wei is seriously reduced, and even produces defective products. The improvement methods related to the target h are the use of lithography (1丨th〇graphy) or the Thunder 10 system (4) 'to achieve a selective (selee1: ivearea) directional tissue side or to remove poor electrode contact But 'Wei Fang (four) f precision solution technology, expensive equipment and long process time, and the flow of solar cell process is relatively low, so it is only suitable for a small number of special specifications of solar cell manufacturing. Therefore, the present invention reads a Japanese-style blouse cake (4), a red enamel, and a sinister invention - a solar cell with a flat contact area and a process thereof. ^ [Invention] The purpose of this county is to maintain the electrode arrangement area after the directional side. When the subsequent arrangement is reduced, the solar substrate and the electrode interface are lacking, which can improve the efficiency of the solar cell. Another object of the present invention is to maintain a flatness in the directional structure after the directional arrangement of the electrode arrangement area to avoid the occurrence of pits in the electrode arrangement area of the solar substrate, so that the electrode is difficult to collect photoelectrons. The second and second object of the present invention is to use the screen printing process to perform the masking arrangement before the step of 200843127 and the power setting after the last name step, which is not only completely compatible with the semiconductor process, but also requires the material yellow process. Therefore, it has the advantages of being fast and low cost.

基於前述-種好域駆之域找池製程,魏在太陽能基 板表面佈置遮幕’並定義佈置該遮幕之表面局部為接觸Μ定義佈置 該遮幕之表面局部以外區_裸露區;接著侧該裸露區而使得該太 基板表蚊裸魅姆化後,將搞祕錄面麟移除;最後 則是在該太陽能基板表_接_佈置上—導電層。因此使得节太陽 能基板具有—Ρ型半導體層、—Ν型半導體層以及—導電層,且其中 ㈣型半導體層係形成於該ρ型半導體層上方,該裸露㈣—粗棱表 面雜觸區係平坦的表面,以及該導電層係佈置於該接觸區。 刖述之太陽能基板表面的遮幕佈置步驟可以係使用網印製程形 成该遮幕,且該遮幕係可使用電路板製程常用的綠漆。前述之太陽能 基板表面導電層佈置步驟也可以係使_印製程形成該導電層。另b 卜。亥太陽%基板表面遮幕佈置或太陽絲絲面導電層佈置 可以係使用轉料域雜置光_職該縣。 前述之太陽絲板表面遮幕佈置步驟之太陽能基板係具有—P 2導體層且該P財賴層上具有—N料導體層,脚係事先提 么、b已〜、有P型半導體層和㈣半導體層的半導體結構。另外,該 陽月b土板表面轉佈置步辦,該太陽能紐也可⑽先提供具有 - P型半導體層解導體結構,且在該太·基絲面遮幕移除步驟 之後再抑雜財五個價電子之原子至社陽能基板之p型半 體層頂端區域’而形成N型半導體層。 7 200843127 前述之太陽能基絲轉幕微射進行—抗反射層佈置,其係 在該太陽能基板之上表面形成一抗反射層,該抗反射層係輔助該太陽 能基板減少表面的光反射損失。 因此,本發明的有盈效果在於:使用具平坦接觸區之太陽能電池 • 及其製程,與目前之太陽能電池製程百分之容,快速且不需高昂 -之认備對產業極具貫用性,另外其係使用一膠體材料並用網印之硬 遮幕保棱將與電極接觸之晶片表面,在方向性組織侧後仍能維持平 • I,減少後續網印電極時缺陷的產生,提升太陽能電池效率;其製程 方法係利用與太陽此電池電極製作技術相同之網印製程,即可達成選 區方向性組織蝕刻與電極接觸面優化之效果。 為使熟悉該項技藝人士了解本發明之目的、舰及功效,兹藉由 下述具體實施例,並配合圖式,對本發明詳加說明如後。 【實施方式】 苓考圖2a至圖2d以及圖3所示,圖2a至圖2d係顯示本發明具 , 平坦接砸之太陽能電池—實施綱元件剖面示意®,JL® 3係顯示 • 本U具平坦接継之太陽能電池製程之操作步驟流程圖。本發明具 平坦接觸區之太陽能電池製程巾,其操作步魏括:步驟·,其係 提供-太陽能基板⑴,該太陽能基板⑴係具有—p型轉體層⑴) 且該p型半導體層(11)上具有一 N型半導體層(12),該太陽能基板⑴ 之N型半導體層(12)表面局部絲為接_⑽以及局部韻為裸露 8 200843127 區(14),並於該太陽能基板⑴絲之接觸區⑽佈置—遮幕⑵,使 付该遮幕⑵足峨抗-溶液⑶侵健太紐⑴表面之接觸區 (13),如目2a所示’·步驟302,其係將表面佈置該遮幕⑵之該太陽 能基板(1)浸泡於該溶液⑶中,該溶液⑶不與該遮幕⑵產生任何化 ^ ¥反應’藉由該溶液⑶產生化學反應而钕刻該太陽能基板⑴表面之 • 減區(14),該太陽能基板⑴上之該裸露區〇4)與該溶液⑶會發生 遥擇f生钱刻作用,使得該太陽能基板⑴表面之裸露區(⑷產生凹凸 • 不平面而絲面_化效果,其纽粗魏狀絲可減少光線的反 射’以及表面有該遮幕⑵隔絕之接觸區⑽在經過表面粗糙化過程 中仍可保持其表面平紐,如圖2b所示;倾·,錢移除該太陽 能基板(1)表面之遮幕⑵,如圖2c所示,且當該太陽能基板⑴表面 之遮幕⑵移除後,該N型半導體層⑵之接觸區⑽仍維持平整;以 及v ~ 304,其係在该太陽能基板⑴表面平整的該接觸區⑴)佈置上 導电層(15),使得該導電層(⑸可作為電極使用,並用以接收該太 ⑩ 基板⑴受級產生之光電子,如圖2d所示。 ㈣材貫補之遮幕⑵佈置步驟巾,可㈣使_印製程形成 。亥遮幕⑵’其中該遮幕⑵可以係一般印刷電路板製程中常使用之綠 漆(green Paint)或是其它種光阻。另夕卜,該遮幕⑵也可以係半導體 黃光製程所佈置的光阻,並透過曝光顯影技術而使得該遮幕⑵在該 太陽能基板⑴上定義出該接觸區⑽與該裸露區(⑷。前述本實施 例之移除該太陽能基板⑴表面之遮幕⑵步驟中,則係依據使用印刷 包路板製程或半導體製程的方法,移除該太陽能基板⑴表面之遮幕 200843127 ⑵―。具體來說,該轉⑵通㈣_高分子聚合物,並可有機溶 』解亥&幕⑵,或是將該遮幕⑵自該太陽能基板⑴表面剝離。 再者,則述本實施例在該太陽能基板(1)該接觸區(13)佈置該導 迅層(15)的步驟中,可以係使關印製程形成該導電層(⑸。另外, 也係可以使用印刷電路板製程巾的電鍍技術或是任何金屬導線佈置 技術,藉以形絲導電層(⑸,歧使財導體製財的麵技術並 經由侧製域是舉離法(肋—咐博任何金屬導線佈置技 術,藉以形成該導電層(15)。 土於兩述本ϋ具平坦接觸區之太陽能電池及其製程,使得具有 .亥ρ里半‘體層⑴)以及該Ν型半導體層⑽之太陽能基板⑴上, 形成平坦的該接觸區⑽與粗_該裸露區⑽。其中不但可以在該 太陽能基板⑴具絲糙之裸露區(⑷可減少表面光反射損失,且該 %月b基板⑴具有較平坦之接觸區(⑶,使得佈置於該接觸區(⑶ 上的該導電層(15)可減少缺陷的產生,並使得該太陽能基板⑴中產 生的載子在傳遞至該導電層(⑸的過程巾,減少因缺陷喊钱捕捉 與散射等效應,明加最終可收集之光電流而提升太陽能電池效率。 參考圖4所示,其係顯示本發明具平坦接觸區之太陽能電池另一 貫施例的元件剖面枝圖。麵述實施射,本發明具物接觸區之 太陽能電池製程巾,可進—步在該太陽·板⑴之裸露區⑽處形 成-抗反射層⑽,藉以辅助該裸露區⑽減少表面的光反射損失。 其中該抗反觸(16)可麵述實關之方向性組_職以及移除 該遮幕(2)後,接著佈置該抗反射層(16)於該太陽能基板(1)上。 200843127 參考圖5a至圖5e以及圖6所示,圖5a至圖^係顯示本發明豆 和旦接觸區之太陽能電池再—實施例的树剖面示意圖,且圖6係顯 示本發明具平坦接職之太陽能電池餘之另_操作步麟程圖。本 發明具平坦接麵之續能電池製程之操作步驟包括:步驟刪,其 係提供-太陽能基板⑷,該太陽能基板⑷係具有—p型半導體層 ⑷),該太陽能基板⑷之表面局部絲為接_⑽以及局部定義 為裸露區⑽’並於該太陽能基板⑷表面之接_(娜置一遮幕 ⑸,使得魏幕⑸足峨抗—減⑹侵_太難胁⑷表面之 接觸區⑽’如圖5a所示;步驟6〇2,其係將表面佈置該遮幕⑸之 該太陽能基板⑷絲_溶_)巾,該溶液⑹林_幕⑸產生 任何化學反應,藉由該溶液⑹產生化學反應而侧社陽能基板⑷ 表面之裸露瞧),社陽能基板⑷上之該裸露議)與該溶液⑹ 會發生選雜侧仙,使_太級⑷表蚊娜區⑽產 生凹凸不平面而達表面_化效果,其中此_化後之表面可減少光 線的反射,以及表面有該遮幕⑸隔絕之接_(43)在經過表面粗链 化過程中仍可保持其表面平整性,如圖5b所示;步關3,其係移除 該太陽能紐⑷絲之麟⑸,如圖5e麻,且#t歧陽能基板 ⑷表面之遮幕⑸移除後,該接觸區⑽仍轉平整;步驟_,其 係藉由錄五倾電子之原子’贿得社陽能基板⑷之p型半導 體層(41)頂端區域形成一 N型半導體層(42),如圖M所示;步驟哪, 其係在该太陽能基板(4)表面平整的該接觸區(43)佈置上—導電層 (45),使得該導電層⑹可作為電極使用,並用以接收該太陽能基板 11 200843127 (4)又光後產生之光電子,如圖%所示。 ▲基於前述本發明具平坦接観之太陽能f池及其製程,使得具有 該P型半導體層⑹聰_半導體細)之太陽能基板⑷上, 職平坦龍接観⑷)與粗链的該裸露區(44)。其林但可以在該 ▲ 域能基板⑷具絲糙之裸⑼可減少表面歧賴失,且該 • 讀能基板⑷具魏平坦之接親⑷),使得佈雌觸區⑷) 上的該導電層(45)可減少缺陷的產生,並使得該太陽能基板⑷中產 • 生的載子在傳遞至該導電層(45)的過程中,減少因缺陷而產生的捕捉 與散射等效應,明加最終可絲之光電流喊升太陽能電池效率。 在本實施例中,該太陽能基板⑷之上表面同樣可以形成-抗反 射層,藉以辅助該太陽能基板⑷減少表面的光反射損失。 前述之各個實施例中,該太陽能基板中,該N型半導體層係形成 於該P型半導體層上方,且-般為了提升捕捉光生電子的機率,該N 型半導體層會㈣。實際上,該太陽能基板中,該?型半導體層也可 • ⑽形成於制型半導體層上方。本發明主要係針對該太陽能驗表 狀接_以及裸顏的形成,該謂能基板只钱具有P—N介面即 、可以成為太陽能電池之太陽能基板,並未限制該p型半導體層與N型 -半導體層所構成的結構。 以上已將本發明作-雜朗,惟以上所述者,僅為本發明之較 佳實施例而已,當不能限定本發明實施之範圍。即凡依本發明申請範 圍所作之均等變化與修飾等,皆應仍屬本發明之專利涵蓋範圍内。 12 200843127 【圖式簡單說明】 斤.圖1係顯示習知未使用本發明具平坦接觸區之太陽能電池及其製 圖2a至圖2d係顯示本發明具平坦接觸區之太陽能電池—實施例 的元件剖面示意圖; 、Based on the aforementioned domain-finding process, Wei arranges the curtain on the surface of the solar substrate and defines the surface on which the curtain is arranged. The surface of the mask is defined as the contact area. The exposed area causes the taiwan mosquito to be glazed, and the secret layer is removed; finally, the conductive layer is arranged on the solar substrate. Therefore, the solar cell substrate has a germanium-type semiconductor layer, a germanium-type semiconductor layer, and a conductive layer, and wherein the (four)-type semiconductor layer is formed over the p-type semiconductor layer, the bare (four)-rough edge surface is in a flat contact region And a surface of the conductive layer disposed in the contact region. The curtain arrangement step of the surface of the solar substrate described above may be formed by using a screen printing process, and the mask may use a green paint commonly used for circuit board processes. The aforementioned step of arranging the conductive layer on the surface of the solar substrate may also be such that the conductive layer is formed by the printing process. Another b. The sun sun % substrate surface curtain arrangement or the solar wire surface conductive layer arrangement can be used to use the transfer field miscellaneous light _ the county. The solar substrate of the solar panel surface masking step has a -P 2 conductor layer and the P-layer has a -N material conductor layer, the foot system is provided in advance, the b has a P-type semiconductor layer, and (4) The semiconductor structure of the semiconductor layer. In addition, the solar moon b soil plate surface is arranged to be arranged, and the solar energy button can also (10) first provide a - P type semiconductor layer de-conducting structure, and then suppress the miscellaneous after the step of removing the base substrate An N-type semiconductor layer is formed by the atom of the five valence electrons to the p-type half-layer top region of the cation substrate. 7 200843127 The aforementioned solar filament wire transfer micro-exposure-anti-reflection layer arrangement forms an anti-reflection layer on the upper surface of the solar substrate, the anti-reflection layer assisting the solar energy substrate to reduce the light reflection loss of the surface. Therefore, the profit-making effect of the present invention is that the use of a solar cell with a flat contact area and its process, and the current solar cell process, which is capable, fast, and not expensive, is highly compatible with the industry. In addition, it uses a colloidal material and uses a hard-screen screen to protect the surface of the wafer that is in contact with the electrode, and maintains the flat surface after the directional tissue side, reducing the occurrence of defects in subsequent screen printing electrodes, and improving solar energy. Battery efficiency; the process method uses the same screen printing process as the solar cell electrode fabrication technology to achieve the effect of selective directional tissue etching and electrode contact surface optimization. To familiarize the person skilled in the art with the benefit of the present invention, the ship and the efficacies of the present invention will be described in detail by the following detailed description and the accompanying drawings. [Embodiment] Referring to Figs. 2a to 2d and Fig. 3, Fig. 2a to Fig. 2d show the solar cell of the present invention, a schematic view of the solar cell of the embodiment, and a JL® 3 system display. Flow chart of the operation steps of the solar cell process with a flat interface. The solar cell processing towel having a flat contact area of the present invention is operated by: a step of providing a solar substrate (1) having a -p type swivel layer (1) and the p-type semiconductor layer (11) There is an N-type semiconductor layer (12), the surface of the N-type semiconductor layer (12) of the solar substrate (1) is partially connected to the wire _ (10) and the local rhyme is exposed 8 200843127 (14), and the solar substrate (1) wire The contact area (10) is arranged to cover the curtain (2), so that the contact area (13) of the surface of the foot (N) is resistant to the solution (2), as shown in item 2a, step 302, which is to arrange the surface The solar substrate (1) of the curtain (2) is immersed in the solution (3), and the solution (3) does not generate any chemical reaction with the curtain (2). The surface of the solar substrate (1) is engraved by chemical reaction of the solution (3). • The subtraction zone (14), the bare zone 〇4) on the solar substrate (1) and the solution (3) will be subjected to a remote selection, such that the exposed area of the surface of the solar substrate (1) ((4) produces irregularities; Silk surface _ effect, its new thick Wei silk can be reduced The reflection of the light and the contact area (10) having the shielding (2) isolated on the surface can maintain the surface of the surface during the roughening process, as shown in Fig. 2b; the money is removed from the surface of the solar substrate (1). a curtain (2), as shown in FIG. 2c, and after the mask (2) of the surface of the solar substrate (1) is removed, the contact region (10) of the N-type semiconductor layer (2) remains flat; and v ~ 304 is attached to the solar substrate (1) The contact region (1) having a flat surface is disposed with a conductive layer (15) such that the conductive layer ((5) can be used as an electrode and is used to receive the photoelectrons generated by the gradation of the tera-substrate (1), as shown in Fig. 2d. The material is covered by the curtain (2), and the step towel can be arranged to make the _printing process. The black screen (2)' can be used as a green paint or other kind of light commonly used in general printed circuit board manufacturing. In addition, the mask (2) may also be a photoresist arranged by the semiconductor yellow light process, and the exposure (2) defines the contact area (10) and the bare area on the solar substrate (1) through exposure and development technology. ((4). The foregoing embodiment In addition to the masking (2) step of the surface of the solar substrate (1), the mask of the surface of the solar substrate (1) is removed according to the method of using a printed circuit board process or a semiconductor process. 200843127 (2) - Specifically, the turn (2) pass (4) _ a polymer, which can be organically dissolved, or the curtain (2) is peeled off from the surface of the solar substrate (1). Further, the embodiment is described in the solar substrate (1) In the step of arranging the conductive layer (15) in the contact region (13), the conductive process can be formed by the cleaning process ((5). In addition, the plating technology of the printed circuit board process towel or any metal wire arrangement can also be used. The technology, by means of the wire conductive layer ((5), the surface technology of the wealth making of the constellation and the side system is the lift method (rib-Zibo any metal wire arrangement technology, thereby forming the conductive layer (15). The solar cell and the process thereof in the flat contact area of the two cookwares are such that the contact area (10) and the flat surface are formed on the solar substrate (1) having the half-body layer (1) and the silicon-type semiconductor layer (10). _The bare area (10). Not only can the solar substrate (1) have a rough exposed area ((4) can reduce surface light reflection loss, and the % month b substrate (1) has a relatively flat contact area ((3), so that the conductive layer disposed on the contact area ((3)) The layer (15) can reduce the generation of defects, and the carrier generated in the solar substrate (1) is transferred to the conductive layer ((5) process towel, reducing the effects of capturing and scattering due to defects, and finally collecting the Photovoltaic current enhances solar cell efficiency. Referring to Figure 4, it shows a cross-sectional view of another embodiment of a solar cell having a flat contact region of the present invention. The solar cell of the present invention has a contact area. The process towel can further form an anti-reflection layer (10) at the exposed area (10) of the solar panel (1), thereby assisting the exposed area (10) to reduce the light reflection loss of the surface. The anti-collision (16) can be described as After the directional group is removed and the mask (2) is removed, the anti-reflection layer (16) is then disposed on the solar substrate (1). 200843127 Referring to Figures 5a to 5e and Figure 6, Figure 5a to figure ^ A schematic cross-sectional view of a solar cell according to an embodiment of the present invention, and FIG. 6 is a cross-sectional view showing the solar cell of the present invention having a flat receiver. The present invention has a flat junction. The operation step of the continuous battery process includes the steps of: providing a solar substrate (4) having a -p type semiconductor layer (4), the surface of the solar substrate (4) being partially connected to the wire (10) and partially defined For the bare area (10)' and the surface of the solar substrate (4) _ (Na set a curtain (5), so that the Wei curtain (5) foot 峨 — 减 减 6 6 太 太 太 太 太 太 too (4) surface contact area (10) ' as shown in Figure 5a Step 6〇2, which is to arrange the solar substrate (4) silk-dissolving towel of the curtain (5), and the solution (6) Lin_screen (5) generates any chemical reaction, and the chemical reaction is generated by the solution (6) The bare surface of the solar energy substrate (4), the bare surface on the solar energy substrate (4) and the solution (6) will occur on the side of the selection, so that the _ Tai grade (4) table mosquito area (10) produces irregularities and faces to the surface _ Effect, in which the surface after this _ can be reduced The reflection of light, and the surface of the surface (5) isolated _ (43) can maintain its surface flatness during the surface roughening process, as shown in Figure 5b; step 3, which removes the solar energy New (4) silk lin (5), as shown in Fig. 5e, and the surface of the #t yang solar substrate (4) is removed (5), the contact area (10) is still flat; step _, which is recorded by the atom of the five electrons The bridging of the top region of the p-type semiconductor layer (41) of the solar cell substrate (4) forms an N-type semiconductor layer (42) as shown in FIG. M; and the step is that the surface of the solar substrate (4) is flat. The contact region (43) is disposed on the conductive layer (45) such that the conductive layer (6) can be used as an electrode and used to receive the photoelectrons generated after the solar substrate 11 200843127 (4) is light, as shown in FIG. The foregoing solar cell of the present invention having a flat interface and a process thereof, such that the P-type semiconductor layer (6) is on the solar substrate (4), the flattening junction (4)) and the bare chain of the bare region (44) ). The forest can be reduced in surface roughness (9) in the ▲ domain energy substrate (4), and the read substrate (4) has a flattening contact (4), so that the cloth is on the female contact area (4)) The conductive layer (45) can reduce the occurrence of defects and cause the carrier generated in the solar substrate (4) to reduce the effects of trapping and scattering caused by defects during the transfer to the conductive layer (45). In the end, the light current of the wire can increase the efficiency of the solar cell. In this embodiment, the upper surface of the solar substrate (4) can also form an anti-reflection layer, thereby assisting the solar substrate (4) to reduce the light reflection loss of the surface. In each of the foregoing embodiments, in the solar substrate, the N-type semiconductor layer is formed over the P-type semiconductor layer, and generally, in order to increase the probability of capturing photogenerated electrons, the N-type semiconductor layer may (4). In fact, in the solar substrate, what? The type semiconductor layer can also be formed (10) over the fabrication semiconductor layer. The invention mainly relates to the formation of the solar energy meter and the formation of the nude face, and the energy substrate has a P-N interface, that is, a solar substrate which can be a solar cell, and the p-type semiconductor layer and the N-type are not limited. - a structure composed of a semiconductor layer. The present invention has been described above, but the above is only a preferred embodiment of the present invention, and the scope of the present invention is not limited. That is, the equivalent changes and modifications made in the scope of the application of the present invention should remain within the scope of the patent of the present invention. 12 200843127 [Simplified description of the drawings] Fig. 1 shows a solar cell having a flat contact region of the present invention without using the present invention and its drawings 2a to 2d show the solar cell of the present invention having a flat contact region - an element of an embodiment Schematic diagram of the section;

^_示本發明具平坦接觸區之太陽能電池製狀操作步驟流 程圖; /;,L _ 11 4係顯不本發明具平坦接觸區之太陽能電池另-實施例的元件 剖面示意圖; 圖5a至圖5e係顯示本發明具平坦接觸區之太陽能電池再一實施 例的元件剖面示意圖;以及 圖6係顯示本發明具平坦接觸區之太陽能電池製程之另一操作步 驟流程圖。 _【轉元件符號說明】 太陽能基板(1) p型半導體層(11) ' N型半導體層(12) 接觸區(13) 裸露區(14) 導電層(15) 抗反射層(16) 13 200843127 遮幕(2) 溶液(3) 太陽能基板(4) P型半導體層(41) N型半導體層(42) 接觸區(43) 裸露區(44) 導電層(45) 遮幕(5) 溶液(6) 步驟(301)、(302)、(303)、(304) 步驟(601)、(602)、(603)、(604)、(605)^_ shows a flow chart of the steps of the solar cell manufacturing process with a flat contact area of the present invention; /;, L _ 11 4 shows a schematic cross-sectional view of the solar cell of another embodiment of the present invention having a flat contact area; FIG. 5a to Figure 5e is a cross-sectional view showing a further embodiment of the solar cell of the present invention having a flat contact region; and Figure 6 is a flow chart showing another operational procedure of the solar cell process of the present invention having a flat contact region. _[Transfer component symbol description] Solar substrate (1) p-type semiconductor layer (11) 'N-type semiconductor layer (12) Contact area (13) Exposed area (14) Conductive layer (15) Anti-reflection layer (16) 13 200843127 Curtain (2) Solution (3) Solar Substrate (4) P-type Semiconductor Layer (41) N-Type Semiconductor Layer (42) Contact Area (43) Exposed Area (44) Conductive Layer (45) Curtain (5) Solution ( 6) Steps (301), (302), (303), (304) Steps (601), (602), (603), (604), (605)

1414

Claims (1)

200843127 十、申請專利範圍: 1· 一種具平坦接觸區之太陽能電池製程,其步驟包括·· 太陽此基板表聽幕佈置,其係在—太陽能基板表碰部佈置—遮 幕,且定義佈㈣遮幕之表面局部為賴區,定義佈置該遮幕之 表面局部以外區域為裸露區,其中該遮幕係足以抵抗一溶液侵敍 该太陽能基板表面之接觸區; 裸露區侧,其係將表面佈置該遮幕之該太陽能基板浸泡於前述步 驟之溶液中,該溶液係以具選擇性的方向性蝕刻作用蝕刻該太陽 旎基板表面之裸露區,使得該太陽能基板表面之裸露區粗糙化; 太陽能基板表面遮幕移除,其係移除該太陽能基板表面之遮幕丨以 及 太陽能基板表面導電層佈置,其係在該太陽能基板表面的接觸區佈 置上一導電層。 2.如申請專利範圍第χ項所述具平坦接觸區之太陽能電池製程,其中 該太陽能基板表面遮幕佈置步驟係使用網印製程形成該遮幕。 3·如申請專利範圍第2項所述具平坦接觸區之太陽能電池製程,其 中該遮幕係綠漆。 4. 如申請專利範圍第!項所述具平坦接觸區之太陽能電池製程,其中 該太陽能基板表面遮幕佈置步·使料導體黃光製 本' 而形成該遮幕。 5. 如申請專利範圍第1項所述具平坦接觸區之太陽能電池製程,其令 15 200843127 該太陽能基板絲麟佈置步狀太絲雜有_p型半導體 層且該P型半導體層上具有一N型半導體層。 紅 6. 如申請專娜圍第1項所述具平坦接観之太陽能電池製程,其中 該太陽能基板表面遮幕佈置步驟之太陽能基板係具有_p型半導體 層’且該太陽能基板表面遮幕移除步驟之後,進一步包括: 猎由茶雜具有五個價電子之原子至該太陽能基板之p型半導體層頂 端區域,並形成一 N型半導體層。200843127 X. Patent application scope: 1. A solar cell process with a flat contact area, the steps of which include: · The arrangement of the substrate of the sun on the substrate, which is arranged in the surface of the solar panel, the curtain is arranged, and the cloth is defined (4) The surface of the curtain is partially a lands, and the area outside the surface of the screen is defined as a bare area, wherein the mask is sufficient to resist a solution invading the contact area of the surface of the solar substrate; the side of the exposed area is a surface The solar substrate on which the mask is disposed is immersed in a solution of the foregoing step, the solution is etched by a selective directional etching to etch the exposed area of the surface of the solar substrate to roughen the exposed area of the surface of the solar substrate; The surface of the substrate is removed by a curtain, which removes the mask of the surface of the solar substrate and the conductive layer of the surface of the solar substrate, and a conductive layer is disposed on the contact area of the surface of the solar substrate. 2. The solar cell process of claim 4, wherein the solar substrate surface masking step is formed using a screen printing process. 3. A solar cell process having a flat contact zone as described in claim 2, wherein the curtain is green lacquer. 4. If you apply for a patent scope! The solar cell process with a flat contact area, wherein the solar substrate surface is arranged to block the yellow conductor of the material conductor to form the mask. 5. The solar cell process having a flat contact zone as described in claim 1 of the patent application, wherein the solar cell substrate is arranged in a stepped manner with a _p-type semiconductor layer and having a P-type semiconductor layer thereon N-type semiconductor layer. Red 6. The solar cell process with a flat interface according to the first item of the above-mentioned application, wherein the solar substrate on the surface of the solar substrate has a _p-type semiconductor layer and the surface of the solar substrate is shielded After the step, the method further comprises: hunting an atom having five valence electrons from the tea to the top region of the p-type semiconductor layer of the solar substrate, and forming an N-type semiconductor layer. 7. 如申請專職圍第W所述具平坦接親之太陽能電池製程,其中 該太陽能基板表面導電層佈置步驟係使_印製程形成該導電層。 8. 如申請專利第!項所述具平坦接観之太陽能電池製程,其中 4太%能基板表面遮幕移除步驟之後,進一步包括· 抗反射層佈置,錢在該太陽能基板之上表面形成—抗反射層,該 抗反射層雜助該太陽驗板減少表_歧射敏。 人 9· 一種具平坦接觸區之太陽能電池,其包括: 一太陽能基板’且該太陽能基板進一步包括·· 一P型半導體層; 一N型半導體層;以及 一導電層; 其中該太陽能基板之上表面局部係形成—裸露區且其它區域_ 成-接觸區,該裸露區係以具選擇性的方向性餘刻作用的: 面,該接觸區係平坦的表面;以及該導電層係佈置於該接觸^ 16 200843127 10·如申請專利範圍第9項所述具平坦接觸區之太陽能電池,其中該N 型半導體層係形成於該P型半導體層上方。 11.如申請專利範圍第9項所述具平坦接觸區之太陽能電池,其中該太 陽能基板之上表面係形成一抗反射層。7. The solar cell process having a flat contact is described in the application of the full-scale solar cell, wherein the solar substrate surface conductive layer is arranged to form the conductive layer. 8. If you apply for a patent! The solar cell process with a flat interface, wherein after 4 steps of the substrate surface mask removal step, further comprising: an anti-reflection layer arrangement, the money forming an anti-reflection layer on the upper surface of the solar substrate, the anti-reflection layer The reflective layer assists the solar panel to reduce the table-dissonance sensitivity. A solar cell having a flat contact area, comprising: a solar substrate 'and the solar substrate further comprising: a P-type semiconductor layer; an N-type semiconductor layer; and a conductive layer; wherein the solar substrate The surface portion is formed by a bare region and other regions _ into a contact region, the bare region being acted upon by a selective directional residual: a surface which is a flat surface; and the conductive layer is disposed on the surface The solar cell having a flat contact region according to claim 9, wherein the N-type semiconductor layer is formed over the P-type semiconductor layer. 11. The solar cell with a flat contact area according to claim 9, wherein an upper surface of the solar energy substrate forms an anti-reflection layer. 1717
TW96114527A 2007-04-25 2007-04-25 Solar cell with flat contact area and manufacturing process of the same TW200843127A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI497738B (en) * 2010-06-30 2015-08-21 Taiwan Semiconductor Mfg Co Ltd Manufacturing methods of photovoltaic cell and semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI497738B (en) * 2010-06-30 2015-08-21 Taiwan Semiconductor Mfg Co Ltd Manufacturing methods of photovoltaic cell and semiconductor device

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