TW200839966A - Semiconductor Device - Google Patents

Semiconductor Device Download PDF

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Publication number
TW200839966A
TW200839966A TW096145207A TW96145207A TW200839966A TW 200839966 A TW200839966 A TW 200839966A TW 096145207 A TW096145207 A TW 096145207A TW 96145207 A TW96145207 A TW 96145207A TW 200839966 A TW200839966 A TW 200839966A
Authority
TW
Taiwan
Prior art keywords
wafer
semiconductor
semiconductor device
semiconductor wafer
pad
Prior art date
Application number
TW096145207A
Other languages
English (en)
Inventor
Yasumasa Kasuya
Motoharu Haga
Shoji Yasunaga
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of TW200839966A publication Critical patent/TW200839966A/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60J—WINDOWS, WINDSCREENS, NON-FIXED ROOFS, DOORS, OR SIMILAR DEVICES FOR VEHICLES; REMOVABLE EXTERNAL PROTECTIVE COVERINGS SPECIALLY ADAPTED FOR VEHICLES
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    • B60J5/04—Doors arranged at the vehicle sides
    • B60J5/0497—Doors arranged at the vehicle sides for load transporting vehicles or public transport, e.g. lorries, trucks, buses
    • B60J5/0498—Doors arranged at the vehicle sides for load transporting vehicles or public transport, e.g. lorries, trucks, buses with rigid panels pivoting about a horizontal axis
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    • B60J5/042—Reinforcement elements
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    • H01L2924/15747—Copper [Cu] as principal constituent
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • General Physics & Mathematics (AREA)
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200839966 九、發明說明： 【發明所屬之技術領域】 本發明係關於半導體裝置，特別係關於使用焊料將半導 體晶片接合於晶片焊墊而成之半導體裝置之構成。 【先前技術】 在包含功率電晶體及功率IC等半導體晶片之功率用之半 導體裝置中，例如如專利文獻〗所示，將半導體晶片固定 於導線架之晶片焊墊（稱為島部亦同）之情形，使用焊料施 行其接合（晶片焊接）。 圖7A及圖7B係說明使用焊料將半導體晶片焊接於〜合 金等所形成之晶片焊墊之際之問題點之模式圖。在此，圖 7A係表示為施行利用焊料之接合而以加熱狀態積層各構件 之情形，及圖7B係表示利用焊料之半導體晶片與晶片焊墊 之接合完畢，溫度降低至特定溫度之時點之情形。 形成半導體晶片（Si晶片）ι〇ι之si係在施行利用焊料1〇2 之接合之溫度範圍（例如室溫〜350。〇之範圍）中，其熱膨脹 係數例如小到只有3〜4 ppm/K，故縱使焊料接合後，溫度 降低時’收縮引起之變形（翹曲）也不那麼大。另一方面， 形成晶片烊墊103之Cu合金由於在施行利用焊料1〇2之接合 之溫度範圍中，其熱膨脹係數具有例如達到17 ppm/K程度 之高的熱膨脹係數，故焊料接合後，溫度降低時，如圖7B 所示，會發生大的翹曲。因此，在使用焊料ι〇2晶片焊接 半導體晶片101後，會因晶片焊墊1〇3之翹曲而將應力施加 至半導體晶片101，在半導體晶片101發生龜裂等之損傷。 127073.doc 200839966 為解決此問題，以往，有在半導體晶片與晶片焊墊之接 合時，增厚焊料之厚度而施行兩者之接合之情形。此係由 於如此可藉焊料層減少因晶片焊墊與半導體晶片之收縮率 之差異而發生對半導體晶片之應力，減少對半導體晶片之 損傷之故。又，為防止對半導體晶片之損傷，也有增厚晶 片烊墊之厚度而施行半導體晶片與晶片焊墊之利用焊料之 接合之情形。此係由於如此可減少因焊料接合後之溫度降 低而發生晶片焊墊之龜曲，減少施加至半導體晶片之應力 之故。 【發明内容】 發明所欲解決之問題 但，作為近年來之傾向，有使半導體裝置之封裝薄型化 之傾向，今後，考慮推展使用壁厚較薄之導線架所形成之 薄型之封裝型半導體裝置時，增厚晶片焊墊之厚度之以往 之方法會導致導線架之厚度之增加，不能說是理想之方 法。又’為增厚晶片焊墊之厚度而增厚導線架之厚度之情 形也有^^線架之％曲等不容易，難以施行形成半導體裝 置之作業等之問題。 又’增厚接合半導體晶片與晶片焊墊之際之焊料層之厚 度而減少施加至半導體晶片之應力之情形，厚度之控制較 為困難，焊料層之厚度會發生誤差。此情形，薄化焊料之 厚度時，不能緩和因晶片焊墊之變形而發生之對半導體晶 片之應力’導致半導體晶片之損傷。因此，增厚焊料層之 厚度而防止半導體晶片之損傷之方法之可靠性較低，不能 127073.doc 200839966 說是充分可行之方法。 解決問題之技術手段 考慮以上之點’本發明之目的係在使用焊料將半導體晶 片接合於晶片焊墊之半導體裝置中，提供可以高精度減少 半導體晶片之損傷，並可施行封裝之薄型化之半導體妒 置。 、 為達成上述目的，本發明之一局面之半導體震置係包 含：半導體晶片；晶片焊塾（die pad)，其係以谭料接合並 裝載两述半導體晶片；複數導線，其係與前述半導體晶片 電性導通；應力緩和層，其係設於前述晶片焊墊之裝載前 述半導體晶片之面之背面，缓和施加至前述半導體晶片之 應力；及封裝體，其係至少封裝前述半導體晶片。 依據此構成，使用焊料將半導體晶片接合於晶片焊墊之 情形，可藉應力緩和層減少晶片焊墊因接合後之冷卻而收 縮而發生之晶片焊墊之翹曲，而，此構成之情形，由於降 低晶片焊墊之翹曲，故與增厚晶片焊墊本身之壁厚之方法 相比，更可使封裝型半導體裝置薄型化。又，因採 ^ 曰曰 片焊墊之背面設置應力緩和層而減少施加至半導體晶片之 應力之構成，故與為減少施加至半導體晶片之應力而增厚 接合半導體晶片與晶片焊塾之焊料層之情形相比，更可古 精度地減少施加至半導體晶片之應力。 又’本發明在上述構成之半導體裝置中，前述應力缓和 層經由焊料層接合於前述晶片焊墊之前述背面也無妨。此 情形，接合半導體晶片與晶片焊墊、及晶片焊墊與應力緩 127073.doc 200839966 和層之焊料層相同，故可使半導體裝置之製程不會變成複 雜。 又，本發明在上述構成之半導體裝置中，最好前述應力 缓和層包含熱膨脹係數小於形成前述晶片焊墊之主材料之 材料。依據此構成，應力緩和層可減少因焊料接合後之冷 部使晶片焊墊收縮而發生之晶片焊墊之翹曲，以減少施加 至半導體晶片之應力。 又，本發明在上述構成之半導體裝置中，最好前述應力 緩和層包含熱膨脹係數與形成前述半導體晶片之主材料同 等或接近之材料所構成。此情形，應力緩和層可更有效地 減少因接合後之冷卻使晶片焊墊收縮而發生之晶片焊墊之 翹曲。因此，可更有效地減少施加至半導體晶片之應力。 又為達成上述目的，本發明之另一局面之半導體裝置 係已S •半導體晶片；晶片焊墊，其係經由焊料層接合裝 載則述半導體晶片；複數導線，其係與前述半導體晶片電 性導通；應力緩和層，其包含熱膨脹係數小於形成前述晶 片焊墊之主材料且與形成前述半導體晶片之主材料同等或 接近之材料且介存於前述烊料層；及封裝體，其係至少封 裝前述半導體晶片。 依據此構成，使用焊料將半導體晶片接合於晶片焊墊之 十月形，可藉應力缓和層減少因接合後之冷卻時晶片焊墊與 半導體晶片之收縮率之差異而發生之對半導體晶片之應 而此構成之情形，與為減少晶片焊墊之翹曲而增厚 曰曰片焊墊本身之壁厚之方法相比，更可使封裝型半導體裝 127073.doc 200839966 置薄型化。又，因採用使應力緩和層介存於焊料層之間之 構成’故與為減少施加至半導體晶片之應力而增厚接合半 導體晶片與晶片烊墊之焊料層之情形相比，更可高精度地 減少施加至半導體晶片之應力。另外，此構成之情形，因 採用將應力缓和層配置於與半導體晶片相同之面側之構 成，故半導體裝置之製造較為容易。 如以上所示，依據本發明，在使用焊料將半導體晶片接 合於晶片焊墊之半導體裝置中，不必增厚導線架（含晶片 焊墊）及焊料層之厚度，及可藉應力缓和層減少施加至半 導體晶片之應力。因此，可提供半導體晶片難以發生龜裂 等之損傷之高可靠性之半導體裝置。又，依據本發明之半 導體裝置，由於可藉薄化裝載半導體晶片之晶片焊墊之厚 度之構成減少半導體晶片之損傷，故容易推展封裝型半導 體裝置之小型•薄型化。 【實施方式】 以下’ 一面參照圖式，一面說明有關本發明之實施型 態。又，在此所示之實施型態僅係一例，並非意指本發明 之半導體裝置受在此所示之實施型態所限定。 (第1實施型態） 首先，面參知圖1、圖2及圖3，一面說明有關本發明 之半導體裝置之第1實施型態。圖1係表示第1實施型態之 半導體裝置之構成之概略平面圖。又，圖」係表示半導體 裝置由裝載半導體晶片之側所見之圖，為方便起見，將封 裝半導體晶片等之封裝用樹脂劃成透明。又，圖2係表示 127073.doc 200839966 第1實施型態之半導體裝置之構成之概略平面圖，且係^ 之π_π位置之剖面圖。圖3係表示製造第1實施型態之半導 體裝置之際使用之導線架之構成之概略平面圖。 第1實施型態之半導體裝h係具有表面封裝型之封裝之 • —種之所謂扁平式四邊有接腳型封裝（Quad Flat Paekage ; QFP)之半導體裝置。如圖i及圖2所示，半導體裝置係包含 . _導體晶片2、晶片焊塾3、内導線4、外導線5、應力緩和 層6、及封裝體7。 _ 半導體晶片2係由平面視略呈矩形狀之矽基板所構成， 在其表面，例如形成有功率1C。在本實施型態中，半導體 晶片2之厚度例如為300 μπι程度。此半導體晶片2係被接合 裝載於晶片焊墊3。 曰曰片焊墊3係形成平面視略呈矩形狀，其平面大小形成 大於半‘體曰曰片2。此晶片焊墊3如上所述，係接合裝載半 導體晶片2之部份’被冲切形成於製造半導體裝置1之際使 φ ;線杀1 〇。又，支持棒11係由晶片焊墊3之4個角延 伸，在被支持於此支持棒"之狀態下，晶片焊墊3對導線 ▲ 架10之其他部份向下偏置。因此，在半導體裝置^中，如 固2所示’曰曰片焊墊3被配置於低於内導線*之位置。又， 7成曰曰片知墊3等之導線架丨〇例如係由合金所形成。 又，晶片禪墊3之厚度例如為1〇〇〜150 μηι程度。 半‘體晶片2與晶片焊墊3之接合係使用焊料施行，在半 導體晶片2與晶片焊墊3之間，存在有焊料層8。又，在本 //τ^Γί 貝也聖態中，作為焊料，例如使用高熔點焊料（Pb-5% 127073.doc -11 · 200839966 sn)，當然，採用使用其他組成之焊料（例如無鉛焊料等）之 構成也無妨。 找内導=4係以包圍晶片焊墊3之方式存在有複數個，例如 經由如金線般之金屬細線9而被電性連接於形成在半導體 曰曰片2上面之端子墊。外導線5連接於内導線4，由封裝體7 之侧面向外部延伸。外導線5係呈現其一部份彎曲之狀 心藉此’可表面安裝於印刷基板（未圖示）。 應力緩和層6具有在以焊料接合半導體晶片2與晶片焊墊 3時，用來緩和因半導體晶片2與晶片焊墊3之熱收縮率之 至異^發生之對半導體晶片2之應力之功能。此應力緩和 層^係用焊料被接合於晶片焊墊3之接合半導體晶片2之面 之背面側。因此，在晶片焊墊3與應力緩和層6之間存在著 焊料層8。在本實施型態之半導體裝置艸，應力緩和層6 係利用42合金材料（Fe_42% Ni合金）形&，其#度例如為 100〜150 μηι程度。 又，在本實施型態中，應力緩和層6與晶片焊墊3接合之 接合面之大小係構成大致等於半導體晶片2與晶片焊墊3接 合之接合面之大小，但並非意指限定於此，可適宜地加以 臺更。即，在藉由配置應力緩和層6而減少對半導體晶片$ 之應力之範圍内，應力緩和層6與晶片焊墊3接合之接合面 之大小可適宜地加以變更無妨。 封裝體7例如係由環氧樹脂等之封裝用樹脂所構成，用 於防止半導體晶片2受到外界環境氣氛（氣體、水分、灰塵 等）之影響。在半導體裝置1中，封裝體7包圍半導體晶片 127073.doc -12- 200839966 2、晶片焊墊3及内導線4,並將應力緩和層6構成其底面與 封裝體7之底面成同一面而露出。如此使應力緩和層6之底 面露出係考慮到使半導體晶片2之發熱容易經由晶片焊墊3 及應力缓和層6而放熱等因素。尤其，在功率1C等功率系 之半導體晶片2中，由於驅動時之發熱量較大，故最好設 置可使熱消散至外部之構成。 其次，說明有關如以上所構成之半導體裝置製造方 法。又，在此所示之半導體裝置丨之製造方法僅係一例， 半導體裝置1利用其他之製造方法製造當然也無妨。 首先，利用衝壓加工形成圖3所示之形狀之導線架1〇。 又，在導線架10中，3為晶片焊墊，4為内導線，5為外導 線，11為支持棒，12為位置内導線4與外導線5之間而支持 此等導線群之拉桿。利用㈣加卫形成此等各構件時，對 支持棒U所支持之晶片焊塾3下堆特定量，以便在形成封 裝型之半導體裝置i之際，可使應力缓和層6之底面與封裝 體7之底面成同一面而露出。 其後，將焊料供應至被加工成特定形狀而成為應力緩和 層6之似金材料之上面（與晶片焊塾罐合之面），加熱⑽ 如350 (：备度）而形祕融焊料。而’由其上將導線架1〇配 置於特定位置’使晶片焊墊3與形成應力緩和層6之合金 材料相疊合，施行加壓等而固定晶片焊墊3與42合金材 料。 其後，在維持加熱狀g下，將焊料供應至晶片焊墊3之 上面（與42合金材料固定之面之背面）而形成熔融焊料。而 127073.doc -13· 200839966 將半導體晶片2配置於熔融焊料上，施行加遷等而加以固 2。其後’冷卻至特定溫度。藉此，施行半導體晶片續 曰曰片焊墊3之接合、及晶片焊墊3與應力緩和層石之接合。 又’使用上述之谭料之接合例如係在氮氣環境中施行。口 其後，利用金屬細線9電性連接形成在半導體晶片2之上 面之端子塾與内導線4。而’例如藉由利用模塑模具之傳 遞模塑法以封裝用樹脂覆蓋半導體晶片2、晶片焊墊3、内 導線4、及應力緩和層6(正確而言，在應力緩和層6，如上 所述底面並未被樹脂覆篕），以形成封裝體7。 最後，切斷除去拉桿12及由封裝體7突出之支持棒11# 之不要部份，亚連結至内導線4，使位於封裝體7之外側之 外導線5彎曲成特定形狀而完成半導體裝置i之組裝。 又，在以上’雖採用利用焊料接合形成應力緩和層6之 42合金材料之構成，但採用利用焊料以外之金屬在高溫下 接合之構成也無妨。又’有時也可在形成導線架10之時 點’預先藉熔接或超音波接合等將應力緩和層6安裝於晶 片焊墊3。但因半導體裝請採用以焊料接合半導體晶片 2與晶片焊墊3之構成，故如本實施型態所示，在晶片焊塾 3與應力緩和層6之接合上，使用焊料接合方 易製造等之優點，故較為理想。 八 其次’說明有關半導體裝置i之作用。在本實施型態之 半‘體衣置1中，如上所述，晶片焊墊3之厚度形成薄至 ,,μΠ1私度。此情形，形成晶片焊墊3之Cu合金之熱 、系數係在知行利用焊料之接合之溫度範圍（例如室溫 127073.doc -14- 200839966 〜35(TC以下）中，具有約17 ppm/K之大值，故施行半導體 晶片2之利用焊料之晶片焊接後，晶片焊墊3容易因熱收縮 而發生大的輕曲。 此點，在半導體裝置1中，在晶片焊塾3之形成半導體晶 . 片2之面之背面側，形成有其熱膨脹係數在施行利用焊料 之接合之溫度範圍（例如室溫〜35(rc之範圍）中，例如為 • 卯^尺之42合金材料構成之應力緩和層0。此應力緩和層6 《熱膨脹係數接近於形成半導體晶片2之主原肖之Si之曰熱 膨脹係數（例如3〜4 ppm/K)，與形成晶片焊墊3之主原料之 Cu合金之熱膨脹係數相比相當地小。因此，應力緩和層6 在焊料接合後，其變形也小，可減少晶片焊墊3之翹曲。 而，藉此，可減少對半導體晶片2施加之應力。 又，在半導體裝置1中，採用在晶片焊墊3之設有半導體 晶片2之面之背面側另外設置應力緩和層6之構成。因此， 與增厚接合半導體晶片2與晶片焊墊3之焊料層之厚度而減 • ;靶加至半導體晶片2之應力之構成之情形（此情形如上所 述，難以高精度地形成焊料層之厚度）相比，可以高精度 減少施加至半導體晶片之應力。 另外，為增厚晶片焊墊3(導線架1〇)之厚度而減少因焊 料接&而發生之對半導體晶片2之應力，有必要將晶片焊 塾3之厚度設定為例如500 μηχ之程度以上。另一方面，本 實施型態之半導體裝置丨之情形，在將晶片焊墊3之厚度設 定為例如100〜150 μηι之程度之情形，可藉將應力緩和層6 之厚度設定為例如100〜150 μιη之程度，而有效地降低在半 127073.doc -15- 200839966 導體晶片2發生之應力。因此，半導體裝置i雖採用另外設 置應力缓和層6之構成，但與增厚晶片焊墊之厚度而減少 半導體晶片之損傷之構成相比，可達成薄型化。即，半導 體裝置1也可藉減少半導體晶片2之損傷之構成而對應於封 裝型之半導體裝置之薄型化。又，在本實施型態之半導體 裝置1中，由於可薄化晶片焊墊3，故也可薄化導線架1〇， 且導線架10之彎曲等之作業性也佳。 又’在以上所示之第1實施型態之半導體裝置1中，雖採 用使應力緩和層6與封裝體7之底面成同一面而露出之構 成，但並非意指限定於此，在應力緩和層6方面，採用與 半導體晶片2、晶片焊墊3及内導線4同時被封裝體7所包入 之構成也無妨。關於此情形，以下，一面參照圖式，一面 說明之。 圖4及圖5係表示第1實施型態之半導體裝置J之變形例之 圖’圖4係半導體裝置由半導體晶片2側所示之概略平面 圖’圖5係圖4之V-V位置之剖面之概略剖面圖。又，為方 便起見，圖4中將封裝半導體晶片等之封裝用樹脂劃成透 明。又，在圖4中，省略電性連接半導體晶片2與内導線4 之金屬細線9(參照圖1)而予以表示。 如圖4及圖5所示，應力緩和層6採用被封裝體7所包入之 構成之情形，就不能如第1實施型態之半導體裝置丨般由封 裝體7之底面施行熱之放熱。考慮此點，故設置由平面視 略呈矩形狀之晶片焊墊3延伸至封裝體7之外側之延伸部 13，可經由此延伸部13施行對印刷基板（未圖示）之熱之放 127073.doc -16- 200839966 熱 在圖4及圖5所示之丰 置。因此，並未如半導”^^_料他之導線架偏 及圖5中領亍體裝置1般設置支持棒1卜但在圖4 …、不為t：形例之半導體裝置之# 11而使晶片焊墊3適官士 乂 ϋ又置支持棒 干蟄適且地向下偏置當然也無妨。 又，構成以上所示之第丨實 之姑祖禮必 员n、之+導體裝置1之構件 材枓僅係一例，在不脫離本 種#爭。Α丨L S幻之耗圍内可作種 種夂更例如，作為用於製造半導俨# 姑祖，τ社 辰每牛v體裝置1之導線架10之 "不使用Cu合金而使用Cu等也盔妨。又 緩和層6之材料，並不限定於42 係數低於形成S Μ愎瓿。 /、要疋熱膨脹 - 成曰曰片知墊3之主材料（在半導體裝置丨中， 時金）之材料，使用其他材料也無妨。f :係數與形成半導體晶片2之主材料(在半導體農置為 1;膨 D同4或接近之材料。即，應力緩和層6之材料例如使 用科伐鐵鎳鈷合金材料(鐵中混合鎳、鈷之合金 以重量計為Ni 29%、c〇 17。/ ς· Λ〇 例
17/0、Si 0·2〇/〇、Μη 0·3〇/ο、F 53·5%)或矽（Si)等也無妨 (弟2實施型態） 其次’說明有關本發明之半導體裝置之第2實施型態。 圖6係表示第2實施型態之半導體裝置之構成之概略剖面 圖。在說明第2實施型態之半導體裝置51之際，對於與第上 實施型態之半導體裝置i重複之部份附上同一符號，無特 別說明之必要之情形，省略其說明。 、 127073.doc 200839966 第2實施型態之半導體裝置5丨亦係與第1實施型態之半導 體裝置1同樣為具有扁平式四邊有接腳型封裝（QFP)之半導 體裝置。半導體裝置51係包含半導體晶片2、晶片焊墊3、 内導線4、外導線5、應力緩和層6、及封裝體7。半導體晶 片2與内導線4例如係經由如金線之金屬細線9被電性連 接。内導線4係與由封裝體7之側面向外部延伸之外導線$ 連續，外導線5將其一部份形成彎曲狀態。 在第2實施型態之半導體裝置51中，異於第1實施型態之 半導體裝置1之構成，應力緩和層6並非配置於晶片焊墊3 之裝載半導體晶片2之面之背面側，而係配置於裝載半導 體晶片2之面之同一面側。即，在晶片焊墊3之上面，經由 、干料層8接a配置應力緩和層6。在應力緩和層6之上面， 經由焊料層8接合配置半導體晶片2。 在半V體裝置5 1中，晶片焊塾3係對内導線4向下偏 八底面/、封衣體7之底面同一面。即，晶片焊墊3之底 面王路出之狀恕、’藉此，使半導體晶片2之發熱容易放 熱。 一其次：說明有關半導體裝置51之製造方法…在此所 不之半導體裝置51之製造方法僅係-例，半導體裝置51利 用其他之製造方法製造當然也無妨。 首先，準備製造半導|# 千蜍體裝置51用之導線架。導線架之形 /、第1貝^型怨之導線架10(參照圖3)相同。但，被支持 ^支持之曰曰片焊塾3係在形成封裝型之半導體裝置Η之
際’將晶片焊墊3 > t I &面下推特定量而使其與封裝體7之底 I27073.doc 200839966 面同一面而露出。 其後，將焊料供應至導線架10之晶片焊墊3，加熱（例如 35(TC程度）而形成熔融焊料。而，由其上配置形成應力緩 和層6之42合金材料，施行加壓等而固定晶片焊墊3與芯合 金材料。其次，在維持加熱狀態下’將焊料供應至形成應 力緩和層6之42合金材料之上面而形成熔融焊料。而將半 導體晶片2配置於熔融焊料上，施行加壓等而加以固定。 固定半導體晶片2後’冷卻至特定溫度。藉此，在應力 緩和層6介存於焊料層8之狀態下，將半導體晶片2接合於 晶片焊墊3。X ’使用上述之焊料之接合例如係在氮二環 境中施行。 其後，利用金屬細線9電性連接形成在半導體晶片2之上 面之端子墊與内導線[而，例如藉由利用模塑模具之傳 遞模塑法以封裝用樹脂覆蓋半導體晶片2、晶片焊墊3(正 確而吕’在晶片焊墊3,如上所述底面並未被樹脂覆蓋）、 内導線4、及應力緩和層6,以形成封裝體 取後，切斷除去拉桿12及由封裝體7突出之支持棒11# 之不要部份’並連結至内導線4，使位於封裝體7之外側之 外導線曲成特定形狀而完成半導體裝置51之組裝。 其次’說明有關半導體裝置51之作用。在半導體裝置Η 中呈現在接合半導體晶片2與晶片焊塾3之焊料層8之間 T存著應力緩和層6之構成。而’此應力緩和層6係由其I 知脹係數接近於形成半導體晶片2之主原料之⑴之執膝服 係數’且相當小於形成晶片焊墊3之主原料之^合金之孰 127073.doc -19- 200839966 膨脹係數之42合金材料所構成。因此，在半導體裝置“ 中，在將半導體晶片2接合裝餘晶片焊墊3之際，應力緩 和層6可緩和因半導體晶片2之熱收縮率與晶片焊塾二 收縮率之差為原因而發生之對半導體晶片之應力 半導體晶片2之損傷。
又’在半導體裝置51中’採用在接合半導體晶片2與晶 片焊墊3之焊料層8介存有應力緩和層6之構成。因此，與 增厚接合半導體晶片2與晶片焊墊3之焊料層之厚度而減少 施加至半導體晶片2之應力之構成之情形相比，可以高精 度減少施加至半導體晶片之應力。 月 另外，為增厚晶片焊墊3(導線架1G)之厚度而減少因焊 料接合而發生之對半導體晶片2之應力，有必要將晶片焊 墊3之厚度設定為例如5〇〇 μηι之程度。另一方面，本實施 型悲之半導體裝置51之情形，在將晶片焊墊3之厚度設定 為例如100〜150 μηι之程度之情形，可藉將應力緩和層6之 厚度設定為例如100〜150 μηι之程度，而有效地降低在半導 體晶片2發生之應力。因此，半導體裝置51雖採用另外設 置應力緩和層6之構成，但與增厚晶片焊墊之厚度而減少 半導體晶片之損傷之構成相比，可達成薄型化。即，半導 體裝置51也可藉減少半導體晶片2之損傷之構成而對應於 封裝型之半導體裝置之薄型化。又，在本實施型態之半導 體裝置5 1中，由於可薄化晶片焊墊3，故也可薄化導線架 10 ’且導線架i 〇之彎曲等之作業性也佳。 又’在第2實施型態之半導體裝置5 1中，雖採用使晶片 127073.doc -20- 200839966 知墊3之底面與封裝體了之底面成同一面而露出晶片焊墊3 之底面之構成’但在晶片焊墊3方面，採用與半導體晶片 2、内導線4及應力緩和層6同時被封裝體7所包入之構成也 無妨。此情形，與作為第i實施型態之變形例而在圖4及圖 5表示其構成之半導體裝置同樣地，為改善放熱，也可採 用使延伸部13由晶片焊墊3延伸，利用此放熱之構成。 又，在半導體裝置51中，雖利用42合金材料，作為構成 應力緩和層6之材料，但並非意指限定於此。作為應力缓 和層6之材料，最好為膨脹係數低於形成晶片焊墊）之主材 料（例如Cu合金、Cu#)，且熱膨脹係數與形成半導體晶片 材料（例如Si)之熱膨脹係數同等或接近之材料。作為 此種材料，例如可列舉科伐鐵鎳鈷合金材料、矽等。 其他，在以上所示之第1及第2實施型態中，係以具有扁 平式四邊有接腳型封裝（QFP)之半導體裝置為例加以說 月仁本發明並不限定於此，在不脫離本發明之目的之 範圍内，也可廣泛適用於具有其他封裝構造之半導體裝 置。即’也可廣泛適用於例如SOP (Small 〇utline package ; 卜 l 封衣）、S0J(Small Outline J-lead Package ; J型接腳 卜 $ 封波）、SON(Small Outline Non-lead Package ;無接 腳】外形封裝）、QFJ(Quad Flat J-lead package ;扁平式四 邊 J型接腳型封裝）、QFN(Quad Flat Non-lead package ;扁 平式四邊無接腳型封裝）等之表面安裝型之封裝型半導體 衣置、及導線***型之封裝型半導體裝置等。 依據本發明，可提供半導體晶片難以發生龜裂等之損傷 127073.doc -21 - 200839966 之高可靠性之封裝型之半導體裝置。又，依據本發明，由 於可糈薄化裝載半導體晶片之晶片焊墊之厚度之構成減少 半導體晶片之損傷’故容易推展封裝型半導體裝置之小 型·薄型化。因此，本發明之半導體裝置作為封裝型之半 導體裝置非常有用。 [特許文獻]特開2001-176890號公報 【圖式簡單說明】 圖1係表示第1實施型態之半導體裝置之構成之概略平面 圖。 圖2係表示第1實施型態之半導體裝置之構成之概略平面 圖，且係圖1之II-II位置之剖面圖。 圖3係表示製造第丨實施型態之半導體裝置之際使用之導 線架之構成之概略平面圖。 圖4係表示第1實施型態之半導體裝置之變形例之圖。 圖5係圖4之V-V位置之剖面圖。 圖6係表示第2實施型態之半導體裝置之構成之概略剖面 圖。 圖7A係以往之半導體裝置之問題點之說明圖，表示為施 行利用焊料之接合而以加熱狀態積層各構件之情形之圖。 ^圖7B係以往之半導體裝置之問題點之說明圖，表示利用 焊料之半導體晶片與晶片焊墊之接合完畢，溫度降低至特 定溫度之時點之情形之圖。 【主要元件符號說明】 1、51 半導體裝置 127073.doc -22- 200839966 101 半導體晶片 3- 103 晶片焊墊 4 内導線 5 外導線 6 應力緩和層 7 封裝體 8 焊料層 9 金屬細線 10 導線架 11 支持棒 12 拉桿 13 延伸部 102 焊料 127073.doc -23-

Claims (1)

  1. 200839966 十、申請專利範圍 1 · 一種半導體裝置，其係包含以下構件： 半導體晶片； 晶片焊墊（die pad)，其係以焊 體晶片； 叶筏口亚裝載可述半導 複數導線，其係與前述半導體晶片電性導通. 應力緩和層，其係設於前述晶片焊塾之裝載前述半導 體晶片之面之背面，緩和施加至前述半導體 力；及 m 封裝體，其係至少封裝前述半導體晶片。 2·如請求項1之半導體裝置，其中 前述應力緩和層係經由焊料層接合於前述晶 前述背面。 3·如請求項1之半導體裝置，其中 前述應力緩和層包含熱膨服係數小於形成前述晶 墊之主材料之材料。 4·如請求項2之半導體裝置，其中 前述應力緩和層包含熱膨脹係數小於形成前述晶片焊 墊之主材料之材料。 5.如請求項3之半導體裝置，其中 前述應力緩和層包含熱膨脹係數與形成前述半導體晶 片之主材料同等或接近之材料所構成。 6·如請求項4之半導體裝置，其中 則述應力緩和層包含熱膨脹係數與形成前述半導體晶 127073.doc 200839966 片之主材料同等或接近之材料所構成。 7· —種半導體裝置，其係包含以下構件·· 半導體晶片； 晶片焊塾 片； 其係經由焊料層接合裝 载前述半導體晶 複數導線，其係與前述半導體晶片電性導通； 應力緩和層，其包含熱膨脹
    …材料且與形成前迷半導趙晶片之==片輝 近之材料且介存於前述焊料層；a …專或接 封衣體其係至少封裴前述半導體晶片。
    127073.doc
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