TW200813236A - Junction structure for elemental device - Google Patents

Junction structure for elemental device Download PDF

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Publication number
TW200813236A
TW200813236A TW96129353A TW96129353A TW200813236A TW 200813236 A TW200813236 A TW 200813236A TW 96129353 A TW96129353 A TW 96129353A TW 96129353 A TW96129353 A TW 96129353A TW 200813236 A TW200813236 A TW 200813236A
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semiconductor layer
alloy
layer
nitrogen
film
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TW96129353A
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Chinese (zh)
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Hironari Urabe
Yoshinori Matsuura
Takashi Kubota
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Mitsui Mining & Smelting Co
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/456Ohmic electrodes on silicon
    • H01L29/458Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)

Abstract

The provided of the present invention is a junction structure for an elemental device, which is able to prevent mutual diffusion between Al and Si, to maintain an ohmic characteristic, and to insure a low resistive characteristic of an Al-based alloy layer in itself in directly joining a semiconductor layer such as n+-Si and Al-based alloy layer. To this end, the junction structure for an elemental device comprises a semiconductor layer and an Al-based alloy layer which is to be directly joined to the semiconductor layer, and the junction structure for an elemental device is characterized in that the semiconductor layer being directly joined with the Al-based alloy layer is Si that contains nitrogen. The nitrogen content of the Si is 1x10<sp>18</sp> atoms/cm3 to 5x10<sp>21</sp> atoms/cm3.

Description

200813236 九、發明說明: 【發明所屬之技術領域】 的元件 配線電 本發明係有關一種構成液晶顯示器等顯示裝置 之接合結構,尤其有關一種使用A1(㈣合金做 路材料的元件之製造技術。 【先前技術】200813236 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention relates to a joint structure for a display device such as a liquid crystal display, and more particularly to a manufacturing technique for an element using A1 ((4) alloy as a road material. Prior art

近年來,^以液晶顯示器為代表的薄型電視等顯示果 置中’做為其構成材料,銘(以下亦有僅以A1做記载)二 =配線材料已廣泛普及。其理由係因為則配線: 料的比電阻值較低,並具有配線加工容易的特性。線材 例如,在主動式矩陣型液晶顯示器的情況中,做 II(swuching)^#^Smt^ Fiim Transist〇r; ^ JFT)係由 IT°(Indium Tin 〇xide;錮錫氧化物) : n lum Zmc 〇xlde;銦鋅氧化物)等透明電極(以下 亦有稱為透明電極層)、與由則合金所形成的配線電路 A以下稱為A1系合金層)來構成元件。如此的元件中存在有 ^合金層與透明電極接合的部分、或使Μ系合金層與 内的n _Sl(磷摻雜的半導體層)接合的部分。 當構成前述的元件時,因考慮到形成於ai系合金層的 2化物的影響,3額(Mg)或敛㈤等高溶點金屬材料 ’、'、所明的覆盍(cap)層而形成於A1系合金層與透明電極 ^,、門此外,在如n+_Si的半導體層與配線電路的接合 相為I防止A1與Si(矽)因製造步驟中的熱製程所導致的 目互擴散’而作成使與前述覆蓋層相同的鉑(M。)或鈦(Ti) 319513 5 200813236 等高溶點金屬材料介切半導體層與則合金層之間。 _,、此處’一邊參照第1圖一邊針對前述元件結構進行呈 _ °兄明。於弟1圖係顯示液晶顯示器的a-Si型TFT的1面 示意圖。該丁FT么士椹仫认士古甘t 口面 電極部璃基板1上形成有由構成閘極 、系合金配線材料所形成的電極配線電路層 及由Mo 4 Mo_w(鎢)等所形成的覆蓋層3。並且,於 該,極電極部G’設有SiNx(氮化細極絕緣膜*做為其 保濃。此外’於該閘極絕緣膜4上係依序沉積a_Si半導體 層5、通道保護膜層6、n+_Si半導體層7、覆蓋層3、電極 配線電路層2、覆i層3,並藉由形成適當圖案來設置汲極 ^部η與源極電極部s。料錄電極部D與源極電極 部S之上覆蓋有元件的表面平坦化用樹脂或siNx絕緣膜 4另外,於源極電極部s側,於絕緣膜4,設置接 (=a,le)CH,於該部分形成ITC^助的透明電極層 7:。當於前述的電極配線電路層2使用A1系合金配線材料 時,係構成為使覆蓋層3介在於n+-Si半導體層7與電極 配線層2之間、或接觸孔CH的透明導電層7,與電極配線 層2之間的結構。 該第1圖所示的元件結構中,由於形成Μο等覆蓋層, 故被指出無法避免材料和製造設備等成本增加、且製造步 驟的複雜化。: 因此,做為省略前述的覆蓋層之手法,已提案有.一種 將由Α1系合金所形成的配線層的一部分進行氮化,透過該 經氣化的部分來與半導體層接合之技術(參照專利文獻 319513 200813236 1)斤此外亦提案有一種使由入丨系合金所形成的全部配線 層氮化而與半導體層接合之技術(參照專利文獻2)。 專利文獻1 ··日本特開2003-273109號公報 專利文獻2 :日本特開2005-123576號公報 【發明内容】 (發明所欲解決之課題) 然而,前述專利文獻i的技術方案中,由於A1系合金 的經鼠化部分的電阻變高,所以在將半導體層與ai系合金 層直接接合時’會有無法滿足歐姆特性之傾向。此外,如 專利文獻2所述,當使A1系合金的全部配線層氮化時,配 線層本身的電阻值便過於變大’變得無法滿足良好的元 特性。 本發明乃雲於前述情形而研創者,其目的在於提供一 種元件之接合結構,俾在使A1系合金層與n+_si等半導體 峰特性,又能確保A1系合金層本身的低電阻特性。更具 =之’本發明的目的在於提供-種元件之接合技術1 =體層兵Ai糸合金層的直接接合之界面的界面反應,维 1姆特性,並且能夠將A1系合金層的電阻值做成為Μ # U · cm以下。 (解決課題的手段) 為了解決雨述課題,本發明的發明人等為了 體層與A!系合金層的直接接合,而對要作為半㈣^ 319513 7 200813236 便能夠實現良好的直In recent years, the display of thin TVs such as liquid crystal displays has been used as a constituent material, and Ming (the following is also only described by A1). The reason for this is that the wiring has a lower specific resistance value and has a characteristic that wiring processing is easy. For example, in the case of an active matrix type liquid crystal display, II (swuching) ^#^Smt^Fiim Transist〇r; ^ JFT) is composed of IT° (Indium Tin 〇xide; 锢 tin oxide): n lum A transparent electrode such as Zmc 〇xlde; indium zinc oxide) (hereinafter also referred to as a transparent electrode layer) and a wiring circuit A formed of an alloy (hereinafter referred to as an A1 alloy layer) constitute an element. Among such elements, there is a portion where the alloy layer is bonded to the transparent electrode, or a portion where the lanthanide alloy layer is bonded to the n-S1 (phosphorus-doped semiconductor layer). When the above-described elements are formed, it is considered that the high-melting point metal material ', ', and the above-mentioned cap layer are formed by considering the influence of the two-form formed on the ai-based alloy layer, such as three (Mg) or condensed (five). Formed in the A1 alloy layer and the transparent electrode, and the gate, in addition, the junction phase of the semiconductor layer such as n+_Si and the wiring circuit is I to prevent A1 and Si (矽) from being caused by the thermal process in the manufacturing step. The diffusion is made such that platinum (M.) or titanium (Ti) 319513 5 200813236, which is the same as the above-mentioned cladding layer, is interposed between the semiconductor layer and the alloy layer. _, here, while referring to Fig. 1, the above-mentioned element structure is presented as _ ° brother. Yu Di 1 shows a one-sided schematic view of an a-Si type TFT of a liquid crystal display. The D-FT 么 椹仫 古 古 古 gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu gu Cover layer 3. Further, in this case, the electrode portion G' is provided with SiNx (nitrided fine electrode insulating film* as its conserved layer. Further, the a-Si semiconductor layer 5 and the channel protective film layer are sequentially deposited on the gate insulating film 4. 6. The n+_Si semiconductor layer 7, the cap layer 3, the electrode wiring circuit layer 2, and the i-layer 3 are formed, and the gate electrode portion η and the source electrode portion s are provided by forming an appropriate pattern. The source electrode portion S is covered with a surface flattening resin or a siNx insulating film 4 on the upper surface of the source electrode portion S. On the source electrode portion s side, a (=a, le) CH is formed on the insulating film 4, and a portion is formed in the portion. The transparent electrode layer 7 of the ITC is used. When the A1 alloy wiring material is used for the electrode wiring circuit layer 2 described above, the coating layer 3 is interposed between the n+-Si semiconductor layer 7 and the electrode wiring layer 2, Or the structure between the transparent conductive layer 7 of the contact hole CH and the electrode wiring layer 2. In the element structure shown in Fig. 1, since a coating layer such as Μο is formed, it is pointed out that the cost of materials and manufacturing equipment cannot be avoided. And the complexity of the manufacturing steps.: Therefore, as a method of omitting the aforementioned overlay, it has been proposed. A technique in which a part of a wiring layer formed of a bismuth-based alloy is nitrided and is passed through the vaporized portion to be bonded to a semiconductor layer (refer to Patent Document 319513 200813236 1). A technique in which all the wiring layers formed by the alloy are nitrided and bonded to the semiconductor layer (see Patent Document 2). Patent Document 1: Japanese Laid-Open Patent Publication No. 2003-273109 (Patent Document 2): JP-A-2005-123576 [Problems to be Solved by the Invention] However, in the technical solution of the above-mentioned Patent Document i, since the electric resistance of the ratified portion of the A1 alloy is high, when the semiconductor layer and the ai alloy layer are directly joined, In addition, as described in Patent Document 2, when all the wiring layers of the A1 alloy are nitrided, the resistance value of the wiring layer itself is too large, and it becomes impossible to satisfy favorable element characteristics. The present invention has been developed in the light of the foregoing circumstances, and an object thereof is to provide a joint structure of an element, such as an A1 alloy layer and a semiconductor peak characteristic such as n+_si, To ensure the low resistance characteristics of the A1 alloy layer itself. More = 'The purpose of the present invention is to provide the bonding technique of the element type 1 = the interface reaction of the interface of the direct bonding of the Ai糸 alloy layer of the body layer, the characteristics of the dimension, In addition, the resistance value of the A1 alloy layer can be Μ # U·cm or less. (Means for Solving the Problem) In order to solve the problem of the rain, the inventors of the present invention have directly joined the body layer and the A! alloy layer. It is possible to achieve good straightness as a half (four) ^ 319513 7 200813236

Si進行了研究,發現當Si含有氮時, 接接合。 的A,人入 層、及直接接合於該半導體層 、糸a孟層之凡件之接合結構中,與a 接合的半導體層係採用含有氮之Si者。 、/直接 18並且,形成本發明的半導體層之Si的含氮量為以ΐχ 18at〇mS/Cm i 5 Χ 1〇21—較佳’而以、χ 10 atoms/cm3 至 lxl〇20at〇mS/cm3 更佳。 /本發明的元件之接合結構中的半導體層,其從與W 系合金層直接接合的表面㈣⑽A以上㈣度,可為由 含有氮之Si所形成者。 +此外:本發明+的半導體層係以由非晶質(_咖㈣ 勺Si或p Si $成較佳。此處的「立」意指電子為佔多 數載^的半導體層,「p」意指電洞為佔多數載子的半導體 層」思扣將對Sl高摻雜添加元素。本發明的半導體層 # 5^017^5/〇Μ3^ 5xl0^atoms/cm^^ 銻中選擇的摻雜劑較佳。 另外,本發明中的A1系合金係以含有鎳0.5at%至 1〇.〇at%為佳。除此之外,以含有硼O.lat%至0.8at%更佳。 此外’當形成本發明的元件之結合結構時,A1系合金層係 以瘛鍍法形成為佳,而此時的濺㈣為以由含有鎳 至10、.Oat/〇的A1系合金所形成者為佳。並且,除了鎳之外, 較宜為使用含有硼(uat%至G 8at_ A1系合金濺㈣。 本奴明亦有關由具備前述元件之接合結構的元件所形 319513 8 200813236 成之薄膜電晶體。 前述本發明的元件結構係能夠將含有N2、NH3、Ν〇χ •中至少任一者的氣體導入於以化學氣相蒸鍍法使要作為半 導體層的Si成膜時的成膜氣體環境中而成膜。 此外,本發明的元件結構係在將含有A的氣體導入而 使要作為半導體層的Si成膜時,能夠藉由將氮分壓比設為 0.001 %至20%而開始成膜、或自成膜途中將氮分壓比調整 成0.001%至20¾而形成。 _ 並且’本發明的元件結構係在要作為半導體層的Si 成膜後’此夠藉由在氮氣體環境中進行2〇〇至5〇〇。〇的熱 處理來形成。 (發明的效果) 依據本發明,能夠實現一種即使省略覆蓋層而使n+-Si 等之半導體層與A1系合金層直接接合,仍能夠防止八丨與 Si的相互擴散’能夠維持歐姆特性,且具備Ai系合金層 •本身的低電阻特性之元件。 【實施方式】 以下,針對本發明的較佳實施形態進行說明,但本發 明並非限定於下述的實施形態。 本發明的元件係具備半導體層及直接接合於該半導體 層的A1系合金層,而與該八1系合金層直接接合的半導層 為含有氣之Si ’其含氮夏以1 X 1018atoms/cm3至5 χ 1021atoms/cm3 .更佳。 9 319513 200813236 當Si的含氮量小於lxl〇18atoms/cm3時,A1與Si的相 互擴散便容易發生,有無法充分地抑制界面反應之傾向。 具體而言,當施以250t:以上的熱滞後時,界面反應便易 於發生,直接接合有變得因難的傾向。相反地,當超過&amp; =)21at〇ms/cm3時,製成元件時的電晶體特性的⑽(導通)電 ^便卩牛低-而有on/〇ff(導通/關斷)比降低之傾向。並且, 田 Si 的含鼠買為 lxl〇18at〇ms/cm3 至 時, 便具備280 c以上的耐熱性,屬於元件開關特性之⑽減 比可確實達到5位數以上。 本*明的το件之接合結構中,全體半導體層係以由具 有:述含氮㈣Si來形成為佳,但由具有前述含氮量的 於半導體層的—部分亦可。例如,將從直接接合 “ 金層的半導體層的表面起_ Α以上的深度作成 I 的、Si、來形成。關鍵是只要與A1系合金層直接接 止Αΐ:ς的半導體層係為具有前述含氮量的Si,便能夠防 7 1的相互擴散,能夠維持歐姆特性。 化^為使要形成半導體層的&amp;含有氮之方法,可以採用Si conducted research and found that when Si contains nitrogen, it is joined. The A, the human layer, and the joint structure directly bonded to the semiconductor layer and the 孟a Meng layer, the semiconductor layer bonded to a is a Si containing nitrogen. And / directly 18 and the nitrogen content of Si forming the semiconductor layer of the present invention is ΐχ 18 at 〇 mS / Cm i 5 Χ 1 〇 21 - preferably ' and χ 10 atoms / cm 3 to l x l 〇 20 at 〇 mS /cm3 is better. The semiconductor layer in the joint structure of the element of the present invention may be formed of Si containing nitrogen or the like from the surface (4) (10) A or more (four) directly bonded to the W-based alloy layer. + In addition: the semiconductor layer of the present invention + is preferably made of amorphous (Si) or Si GS. Here, "立" means that the electron is a semiconductor layer of a majority carrier, "p" It means that the hole is a semiconductor layer that is a majority carrier. The high-doping additive element will be added to the S1. The semiconductor layer of the present invention #5^017^5/〇Μ3^ 5xl0^atoms/cm^^ Further, the dopant of the A1 alloy in the present invention preferably contains 0.5 at% to 1% by weight of nickel. In addition, it is more preferable to contain boron O. lat% to 0.8 at%. Further, when forming the bonding structure of the elements of the present invention, the A1 alloy layer is preferably formed by a ruthenium plating method, and the sputtering (4) at this time is made of an A1 alloy containing nickel to 10, .Oat/〇. Preferably, the formation is better. In addition to nickel, it is preferred to use boron (uat% to G 8at_ A1 alloy splash (4). Bennomin is also related to the element having the joint structure of the aforementioned element, 319513 8 200813236 The film structure of the present invention is capable of introducing a gas containing at least one of N2, NH3, and Ν〇χ into a chemical vapor deposition method. In the film formation gas atmosphere at the time of film formation of Si as a semiconductor layer, the element structure of the present invention can be formed by introducing a gas containing A into a film to be formed as a semiconductor layer. The partial pressure ratio is set to 0.001% to 20% to form a film, or the nitrogen partial pressure ratio is adjusted to 0.001% to 205⁄4 in the middle of film formation. _ and 'The element structure of the present invention is Si which is to be a semiconductor layer After the film formation, this can be formed by heat treatment of 2 Torr to 5 Torr in a nitrogen atmosphere. (Effect of the Invention) According to the present invention, it is possible to realize n+-Si or the like even if the cover layer is omitted. The semiconductor layer and the A1 alloy layer are directly bonded to each other, and it is possible to prevent interdiffusion of the tantalum and Si, which can maintain the ohmic characteristics, and has an element having a low resistance characteristic of the Ai-based alloy layer itself. BEST MODE FOR CARRYING OUT THE INVENTION The present invention is not limited to the following embodiments. The device of the present invention includes a semiconductor layer and an A1 alloy layer directly bonded to the semiconductor layer, and the VIII series The semi-conductive layer directly bonded to the gold layer is a gas-containing Si' which has a nitrogen-containing summer of 1 X 1018 atoms/cm 3 to 5 χ 1021 atoms/cm 3 . More preferably. 9 319513 200813236 When the nitrogen content of Si is less than lxl 〇 18 atoms/cm 3 The interdiffusion of A1 and Si tends to occur, and there is a tendency that the interfacial reaction cannot be sufficiently suppressed. Specifically, when a thermal hysteresis of 250 t: or more is applied, the interfacial reaction is liable to occur, and direct bonding becomes difficult. Conversely, when &amp;=)21at〇ms/cm3 is exceeded, the (10) (on) of the transistor characteristics when the device is fabricated is low--and there is on/〇ff (on/off) ) The tendency to decrease. In addition, when the mouse containing the field Si is lxl〇18at〇ms/cm3, it has a heat resistance of 280 c or more, and the (10) reduction ratio of the component switching characteristics can be surely more than 5 digits. In the joint structure of the present invention, it is preferable that the entire semiconductor layer is formed of a nitrogen-containing (tetra) Si, but the semiconductor layer may have a nitrogen content. For example, Si is formed by directly bonding the surface of the semiconductor layer of the gold layer to a depth of _ Α or more. The key is to directly terminate the 1: ς semiconductor layer with the A1 alloy layer. The nitrogen content of Si can prevent the interdiffusion of 71 and maintain the ohmic characteristics. The method for forming a semiconductor layer and containing nitrogen can be used.

Deplu· ^ EP 11 CVD(Chemical Vap〇r 稀釋過^=3相^^ + _時,除了以氮 用彳氣體、nh3氣體、心 此外,播炎处,而進仃適量添加之手法0 又控制添加A、皿3氣體的的/lH4、PH3等導入氣體之外, ”體的%機、或在半導體層成膜後, 319513 10 200813236 在氮氣體環境下進行熱處理之方法等。例如,在液晶顯示 益的TFT製程中使半導體層含有氮時,不管是整體半導體 層或是半導體層表面的一部分,皆考慮製程的步驟數的增 減或含氮量調整難度等因素,而採用現狀的製程中能夠容 易應變之方法為宜。 更具體吕之,當添加凡氣體至藉由化學氣相蒸鍍法 (CVD)使要作為半導體層的Si成膜之成膜氣體環境時,藉 由才木用0.001%至20%氮分麼比而開始成膜、或自成膜中途 凋正成0.001 %至20%氮分壓比,便能夠使要作為半導體層 ,'3有氮。該氮分壓比係為將氮氣導入至使^成膜的 氣體%:^的分壓比’ ^其未達Q•⑻,則即使改變⑺〇 中的其他成膜條件,也無法達到能夠確保耐熱性 _ w/⑽3)。此外,若超過鳩,則半導體層γ 阻會變,高’電晶體特性有惡化的翻。還有,該氮: ^換算因子(_VersiQn faet。加得之實流量來求出:。 在前述CVD成膜中進行含 者 μ ^ . A 3虱之作業枯,便月b夠使半導體 H有錢能夠使半導體層的—部分 體 氨(NH3)取代氮翕眸甘\ 鼠 使用 此外,另外的古4壓比採用0.001%至2%較佳。 斤尸 々方法是在要作為半導體層的Si成膜狳 :由在氮氣體環境中進行2,c至500。。的敎處理成:後, 層的Si含有氮。當藉由在該氮氣體環η 2使半導體層的Si含有氮時,係形成含氮量C熱 表面往深度方向連續降低的半導 ^體層 的氮氣體環境為使用以氮為主成分之氣體,例;;,之發明 n2氣 319513 11 200813236 =而3氣體、Ν〇χ氣體等,並呈現刻意 且為以氮為主成分之氣體之分麼為9〇% ^兄,較 以上的環境更佳。 上的,99〇/〇 月if述3有氮之Si係所謂經施以接 介 至5二:磷,、銻中選擇的含有5X1。、一 主⑽at〇ms/cm3的摻雜劑 雜 扭Deplu· ^ EP 11 CVD (Chemical Vap〇r diluted ^ = 3 phase ^ ^ + _, in addition to nitrogen with helium gas, nh3 gas, heart in addition, the inflammatory site, and the appropriate amount of added tactics 0 and control Adding a gas such as /1H4 or PH3 of A, Dish 3 gas, etc., "% of the machine, or after the film formation of the semiconductor layer, 319513 10 200813236, a method of heat treatment in a nitrogen atmosphere, etc. For example, in liquid crystal In the TFT process of the display benefit, when the semiconductor layer contains nitrogen, whether it is the whole semiconductor layer or a part of the surface of the semiconductor layer, factors such as the increase or decrease of the number of steps of the process or the difficulty of adjusting the nitrogen content are considered, and the current process is adopted. It is preferable to use a method that can be easily strained. More specifically, when adding a gas to a film forming gas environment in which a Si layer to be a semiconductor layer is formed by chemical vapor deposition (CVD), 0.001% to 20% of the nitrogen content starts to form a film, or 0.001% to 20% of the nitrogen partial pressure ratio in the middle of film formation, so that it can be used as a semiconductor layer, '3 has nitrogen. The nitrogen partial pressure ratio system In order to introduce nitrogen into the partial pressure of the gas which is formed into a film: If the ratio of '^ does not reach Q•(8), even if the other film-forming conditions in (7) are changed, the heat resistance _ w/(10) 3) cannot be ensured. Further, if the 鸠 is exceeded, the γ resistance of the semiconductor layer becomes high. 'The crystal characteristics have deteriorated. Also, the nitrogen: ^ conversion factor (_VersiQn faet. The actual flow rate is added to obtain: In the CVD film formation, the inclusion of μ ^ . A 3 虱, the monthly b is enough to make the semiconductor H rich to make the semiconductor layer - part of the ammonia (NH3) to replace the nitrogen 翕眸 \ / mouse use, in addition, the other ancient 4 pressure ratio is preferably 0.001% to 2%. The method is to form a film of Si as a semiconductor layer: by performing a treatment of 2, c to 500 in a nitrogen atmosphere to form: after, the layer of Si contains nitrogen. When by the nitrogen gas ring η 2 When the Si of the semiconductor layer contains nitrogen, the nitrogen gas atmosphere in which the semi-conductive layer in which the hot surface of the nitrogen-containing C is continuously decreased in the depth direction is a gas containing nitrogen as a main component, for example, the invention n2 gas 319513 11 200813236=3 gas, helium gas, etc., and a deliberate and nitrogen-based gas It is 9〇% ^ brother, which is better than the above environment. On the top, 99〇/〇月 if 3 has a nitrogen Si system, so-called application to 5: phosphorus, the choice of 锑5X1., a main (10) at 〇ms/cm3 dopant twist

Si時,在與Αί糸人么思士分上勹^亦隹該磷、硼、銻的 糸。金層直接接合時便能夠確保歐Μ # μ 當該推雜量為5xl0”at〇ms/cmi如〇21咖=^性。 然亦視摻雜劑種類、活性化熱處理條件 ;11 =,雖 ==的電一When Si is used, it is divided into 磷 糸 糸 么 么 勹 隹 隹 隹 隹 隹 隹 隹 隹 隹 隹 隹 隹 隹 隹 隹 隹 隹. When the gold layer is directly joined, it is possible to ensure that the amount of the doping is 5xl0"at〇ms/cmi, such as 〇21 coffee = ^. However, depending on the type of dopant, activation heat treatment conditions; 11 =, although == electric one

.a ( xl〇 atoms/cm,甚至於更高摻雜量,作杏A 半導體元件時,由於摻雜劑的活 不 大,所以無法實用。 卞个θ欠 法或2始各接雜劑種類對Si的導入可藉由所謂的熱擴散 ^ 入法等公知手法來進行。並且,針對Si中的摻 雜劑種類岑复人亡旦 -Γ —丄 S簡)來測量 猎由二次離子質譜儀(一 此外’當形成本發明的元件時’ A1系合金層較宜為含 曰(’臬)的A1系合金。即使A1系合金層為純A卜對本發 :有效,但為含有Ni的A1系合金時,便容易將ai 糸合金本身的電阻設定成1〇// Ω . cm以下,並且易於實 有良好元件特性的直接接合。做為含有Ni的A1系合 金’具體而言,可舉例有A1_Ni合金、A1_Ni_B(硼)合金、 319513 12 200813236.a (xl〇atoms/cm, even when the amount of higher doping is used as the apricot A semiconductor device, since the dopant does not have a large amount of activity, it is not practical. 卞 θ under method or 2 types of each dopant The introduction of Si can be carried out by a known method such as a so-called thermal diffusion method, and the secondary ion mass spectrometer is measured for the type of dopant in Si. In addition, 'when forming the element of the present invention', the A1 alloy layer is preferably an A1 alloy containing ruthenium ('臬). Even if the A1 alloy layer is pure A, it is effective for the present invention, but it is an A1 system containing Ni. In the case of an alloy, it is easy to set the electric resistance of the ai yttrium alloy to 1 〇// Ω·cm or less, and it is easy to directly bond the good component characteristics. As the A1 alloy containing Ni, specifically, for example, A1_Ni alloy, A1_Ni_B (boron) alloy, 319513 12 200813236

Al_Ni_C(碳)合金、Al-Ni-Nd(鈥)合金、Al-Ni-La(鑭)合金 等。並且,該Ni含有量較宜為0.5at%至lO.Oat%。此外, 使用Nd、La時,犯含有量較宜為0.5&amp;1°/〇至2.0&amp;{%。3、(:、 1 Nd、La的含有量較宜為0.1 at%至1 .Oat%。 另外,做為A1系合金,屬於Al-Ni-B合金且含有B(翊) 0.:^1%至0.8&amp;1%者更佳。當為如此組成的人1-1^-3合金時, 便能夠與ITO或IZO等透明導電層直接接合,並且亦能夠 與n+-Si等半導體層直接接合,而能夠形成與透明電極層 ⑩或半導體層直接接合時的接合電阻值低、耐熱性亦優異的 元件。當採用該人1-1^-:6合金時,1^含有量為4.(^1%以上、 B含有量為0.80at%以下較佳。Ni含有量為3.0at%至 6.0at%、B含有量為0.20at%至0.80at%更佳。當為如此組 成的Al-Ni-B合金時,便成為對元件製造步驟中的各熱滯 後具備有優異耐熱特性者。還有,由低電阻特性的觀點來 看,本發明的A1系合金以含有A1本身7 5 at%以上為佳。 _ 此外,前述A1系合金層基本上亦可施以氮化處理或氧化處 理。 若為前述本發明的元件之接合結構,則可成為得以抑 制半導體層與A1系合金層直接接合之界面的界面反應,維 持歐姆特性,同時能夠將A1系合金層的電阻值設成10// Ω · cm以下之元件,故可說是適合用於形成薄膜電晶體 (TFT)者。此外,本發明的元件之接合結構極適合於形成閘 極電極位於基板側之所謂底閘極(bottom gate)結構的.TFT 時的元件結構。 13 319513 200813236 [實施例1] Φ A,者i:對本發明的實施例進行說明。在本實施例1 中,“金層係使用純A1膜(比電阻值28#Ω ·_、 ^5.〇at%Ni 合金膜(比電阻值 4.〇W.Cm)、A1_5.0at% 4at%B膜(比電阻值…Ω · cm)三種,使其與由Si 形成的半導體層直接接合,並進行該元評 較例中還加上A1-5.0at%Ni.〇.3at%c _電阻=貝= Ω · cm))。特性評價係針對以下說明之歐姆特性、^擴散 对熱性進行調查。還有’各膜的比電阻值係以濺鍍方式(磁 控歲鑛裝置’投入功率3娜/cm2、氬氣流量議s_、氯 氣塵o.5Pa)形成單膜(厚度約G3/zm)於玻璃基板上,且在 氮氣氣體環境中進行300t、3〇分鐘的熱處理後,以4端 子電阻測定裝置測定而得者。 歐姆特性:本歐姆特性評價係製作如第2圖所示的評價試 樣後進行(第2圖⑷係試樣剖面圖、第2圖⑻係試樣平面 馨圖)。首先,以CVD方式(samco股份有限公司製:pD_22〇2L) 於玻璃基板ι(康寧公司製:#1737)上成膜5〇〇人的n+_si 半導體層8。該n+-Si半導體層8的成膜條件係:以射頻 100W(0.31W/cm2)、SiH4 氣體(氫稀釋)流量 3〇〇sccm、含有 磷(P)成分氣體(氫稀釋)流量50sccm、基板溫度30(rc形成 膜厚500 A的n+-Si半導體層8。接著,以濺鍍方式(磁控濺 鍍裝置,投入功率3.0W/cm2、氬氣流量100sccm、氬氣壓 0.5Pa)於n+-Si半導體層8上成膜厚2〇〇〇入的A1系合金 層9。接著’利用光微影技術以墊間隔為5 # m之方式將 319513 14 200813236 ,系δ孟層9开&gt; 成縱#茁父橫goo # m的電極墊, 而衣成试板。接著,在形成於該評價試樣的兩電極塾 間進行+5V至-5¥範圍的電流_電壓測量以評價歐姆特性。 :該歐姆特性的評價方法係依據測量而得之電流_電墨圖 表,將電流與電壓的相關性為線性者之評價試樣視為歐姆 接合者而評價成〇,將電流與電塵的相關性為非線性者視 為非歐姆接合者而評價成X。Al_Ni_C (carbon) alloy, Al-Ni-Nd (yttrium) alloy, Al-Ni-La (yttrium) alloy, and the like. Further, the Ni content is preferably from 0.5 at% to 10% by weight. In addition, when Nd or La is used, the content of the guilt is preferably 0.5 &amp; 1 ° / 〇 to 2.0 &amp; {%. 3, (:, 1 Nd, La content is preferably 0.1 at% to 1. Oat%. In addition, as an A1 alloy, belonging to Al-Ni-B alloy and contains B (翊) 0.: ^1 % to 0.8 &amp; 1% is better. When it is such a composition of 1-1^-3 alloy, it can be directly bonded to a transparent conductive layer such as ITO or IZO, and can also be directly bonded to a semiconductor layer such as n+-Si. By bonding, it is possible to form an element having a low bonding resistance value and excellent heat resistance when directly bonded to the transparent electrode layer 10 or the semiconductor layer. When the human 1-1^-:6 alloy is used, the content of 1^ is 4. (1% or more, B content is preferably 0.80 at% or less, Ni content is 3.0 at% to 6.0 at%, and B content is preferably 0.20 at% to 0.80 at%. When it is such a composition of Al- In the case of the Ni-B alloy, it has excellent heat resistance characteristics for each thermal hysteresis in the element manufacturing step. Further, from the viewpoint of low resistance characteristics, the A1 alloy of the present invention contains A 5 itself at 75 5 at%. Preferably, the A1 alloy layer may be subjected to a nitriding treatment or an oxidation treatment. If the joint structure of the element of the present invention is used, it is possible to suppress half. The interfacial reaction between the conductor layer and the A1 alloy layer directly adheres to the interface, and the ohmic property is maintained, and the resistance value of the A1 alloy layer can be set to 10/Ω·cm or less. Therefore, it can be said that it is suitable for forming a thin film. Further, the bonding structure of the element of the present invention is extremely suitable for forming an element structure in which a gate electrode is a TFT of a so-called bottom gate structure on the substrate side. 13 319513 200813236 [Examples 1] Φ A, i: An embodiment of the present invention will be described. In the first embodiment, "the gold layer is a pure A1 film (specific resistance value 28# Ω · _, ^ 5. 〇 at% Ni alloy film) (specific resistance value 4. 〇 W. Cm), A1_5.0 at% 4 at% B film (specific resistance value Ω · cm), which is directly bonded to a semiconductor layer formed of Si, and the element evaluation example is performed. Also added is A1-5.0at%Ni.〇.3at%c _resistance=bee= Ω · cm)). The characteristic evaluation is based on the ohmic characteristics and the diffusion of the following description of the thermal properties. The specific resistance value is formed by sputtering method (magnetization ageing device 'input power 3 nano/cm2, argon flow rate s_, chlorine gas dust o.5Pa) The film (thickness: about G3/zm) was applied to a glass substrate, and after heat treatment at 300 t for 3 minutes in a nitrogen gas atmosphere, it was measured by a 4-terminal resistance measuring device. Ohmic characteristics: This ohmic characteristic evaluation system was produced as follows. The evaluation sample shown in Fig. 2 is carried out (Fig. 2 (4) is a sample cross-sectional view, and Fig. 2 (8) is a sample plan view). First, a five-inch n+-si semiconductor layer 8 was formed on a glass substrate ι (manufactured by Corning Co., Ltd.: #1737) by a CVD method (manufactured by Samco Co., Ltd.: pD_22〇2L). The film formation conditions of the n+-Si semiconductor layer 8 are: a radio frequency 100 W (0.31 W/cm 2 ), a SiH 4 gas (hydrogen dilution) flow rate of 3 〇〇 sccm, a phosphorus (P) component gas (hydrogen dilution) flow rate of 50 sccm, and a substrate. Temperature 30 (rc forms an n+-Si semiconductor layer 8 having a film thickness of 500 A. Next, a sputtering method (magnetron sputtering apparatus, input power 3.0 W/cm 2 , argon gas flow rate 100 sccm, argon gas pressure 0.5 Pa) is applied to n+- On the Si semiconductor layer 8, an A1 alloy layer 9 having a thickness of 2 is formed. Then, by means of photolithography, the 319513 14 200813236 is opened in a manner of a pad interval of 5 # m. The electrode pad of the vertical #oo goo #m was coated into a test plate. Next, a current-voltage measurement in the range of +5 V to -5 ¥ was performed between the two electrodes formed in the evaluation sample to evaluate the ohmic characteristics. : The evaluation method of the ohmic characteristic is based on the measured current_ink chart, and the evaluation sample in which the correlation between the current and the voltage is linear is regarded as an ohmic jointer, and the current is correlated with the electric dust. Those whose properties are nonlinear are regarded as non-ohmic joints and evaluated as X.

Si擴散耐熱性··本特性的評價試樣係使用以cVD方式(與 _础述歐姆特性時相同條件)於玻璃基板上形成η+_&amp;半導體 層(300 A ),再以濺鍍方式(磁控濺鍍裝置,投入功率 .0W/cm 鼠氣里1 OOsccm、氬氣壓〇.5Pa)於該半導體 層上形成各A1系合金層(2〇〇〇 A )者。 n+-Si半導體層的含氮作業係當以cvd方式成膜時, 除了以氫而稀釋的SiH4氣體、含有磷(p)成分氣體的導入 之外,以使分壓比為0·001%至20%的範圍來添加n2氣體 •之方式進行調整。 接者’在2 0 0 C至3 8 0 C的溫度範圍,每1 〇。〇設定熱 處理溫度,將各評價試樣在氮氣氣體環境中進行3 〇分鐘的 熱處理後,浸潰於構酸系A1钱刻液(關東化學(股)公司製, 液溫32°C的A1混酸蝕刻劑/組成(容量比)為磷酸:草酸: 酉曰酉文·水-16 · 1 · 2 · 1) 10分鐘’猎此’僅溶解形成於上 層的各組成膜,使半導體層露出。以光學顯微鏡(2〇〇、倍) 觀察該露出之半導體層表面,調查Si與A1的相互擴散是 否有發生。 319513 15 丨w 200813236 於第3圖及第4圖係顯示露出之曾 性光學顯微鏡照片。第3圖完全盔善導體層表面的代表 導體表面(評價結果··〇),第4圖可看^有相互擴散之半 跡(照片中的黑點)之半導體表面(評價結果有=互=散的, 3圖及第4圖為判斷相互擴散的有無時做為表) 弟 並非為顯示本實施例的觀察結果。 〜 &quot;象, 於第!表至第3表顯示前述特性評價結果。試㈣。μ 卜3為Sl半導體層含有氮之情形,試料No.i-4至i 7 為於S!半導體層未含有氮之情形。此外,第工表係顯干 S!半導體層的含氮量為4xlGi9atc)ms/em3時的結果,第2 表係顯示Μ半導體層的含氮量為lxl〇18at⑽時的結Si diffusion heat resistance·· This evaluation of the characteristics was performed by using the cVD method (the same conditions as in the case of the ohmic characteristics) to form the η+_&amp;semiconductor layer (300 A) on the glass substrate, and then sputtering ( The magnetron sputtering apparatus, which has an input power of .0 W/cm in a rat gas of 100 sec and an argon pressure of 55 Pa), forms each of the A1 alloy layers (2〇〇〇A) on the semiconductor layer. When the nitrogen-containing operation of the n+-Si semiconductor layer is formed by the cvd method, the partial pressure ratio is 0.001% except for the introduction of the SiH4 gas diluted with hydrogen or the phosphorus-containing (p) component gas. Adjust the 20% range to add n2 gas. The pick-up is in the temperature range of 2 0 0 C to 3 80 C, every 1 〇. 〇The heat treatment temperature was set, and each of the evaluation samples was heat-treated in a nitrogen gas atmosphere for 3 minutes, and then impregnated with the acid-based A1 money-etching liquid (manufactured by Kanto Chemical Co., Ltd., A1 mixed acid at a liquid temperature of 32 ° C). The etchant/composition (capacity ratio) is phosphoric acid: oxalic acid: 酉曰酉文·水-16 · 1 · 2 · 1) 10 minutes 'hunting this' only dissolves the constituent films formed in the upper layer to expose the semiconductor layer. The surface of the exposed semiconductor layer was observed with an optical microscope (2 Å, doubling) to investigate whether or not interdiffusion of Si and A1 occurred. 319513 15 丨w 200813236 The exposed optical microscope photographs are shown in Figures 3 and 4. Figure 3 shows the representative conductor surface on the surface of the conductor layer (evaluation result··〇), and the fourth picture shows the semiconductor surface of the half-track (the black point in the photo) with mutual diffusion (the evaluation result is = mutual = scattered) 3, and 4 are tables for judging the presence or absence of interdiffusion. The younger brother is not showing the observation results of the present embodiment. ~ &quot; Elephant, Yu Di! Tables to Table 3 show the results of the aforementioned characteristic evaluation. Try (4). μ 3 is a case where the S1 semiconductor layer contains nitrogen, and samples No. i-4 to i 7 are cases where the S! semiconductor layer does not contain nitrogen. In addition, the first watch shows the result when the nitrogen content of the S! semiconductor layer is 4xlGi9atc)ms/em3, and the second table shows the knot when the nitrogen content of the germanium semiconductor layer is lxl〇18at(10).

果’弟3表係顯示Si半導體層的含氮量為如心伽讀V 日守的結果。此處的含氮量為平均值。 士還有,當Si半導體層的含氮量為4xl〇19at〇ms/cm3g 上時,以二次離子質譜儀(Dynamic SIMS)進行測量。當以 二次離子質譜儀(Dynamic SIMS)測量半導體層中的氮:, 便可得到如第5圖所示的分析結果。第5圖係顯示以二次 離子質譜儀對由含有氮的n+_Si所形成的半導體層(源極或 汲極)朝珠度方向分析含氮量而得之測定結果例。如第$圖 所示,於半導體層的si的一部分含有氮時,在含氮之si 半導體層的部分,係在與含氮部分的厚度相當之部位檢測 氮。並且,該含氮量(濃度)係由如第5圖所示的梯狀的峰 值之上底部份的測定值的平均值所界定。 此外’當含氮量為lxl〇18at〇ms/cm3時,由於其為二次 319513 16 200813236 離子質譜儀的檢測界限以 r u此以x射線先電子光譜儀 ^ -ray p otoelectron spectrometer ; XPS)|g Si # ^ =度方向進行5G至⑽人左右的濺射㈣阶接著:以 射線光電子光譜儀測量㈣射部分,與從含氮量為已知 的試樣測^結果所得之氮檢料值的積分強度比較,算 出二έ氮畺。還有,雖然該含氮量的測量以二次離子質譜 儀或X射線光電子光譜儀皆能夠進行測定,但當含氮量為 |接近二次離子質譜儀的檢測界限時,從該測量值的可靠性 的觀點來看,亦有使用χ射線光電子光譜儀進行測量的情 形。 [弟1表]The '3' system shows that the nitrogen content of the Si semiconductor layer is the result of the gamma read. The nitrogen content here is an average value. Also, when the nitrogen content of the Si semiconductor layer was 4 x 10 〇 19 at 〇 / cm 3 g , the measurement was performed by a secondary ion mass spectrometer (Dynamic SIMS). When the nitrogen in the semiconductor layer was measured by a secondary ion mass spectrometer (Dynamic SIMS), the analysis results as shown in Fig. 5 were obtained. Fig. 5 is a graph showing the results of measurement of the nitrogen content of the semiconductor layer (source or drain) formed of n + -Si containing nitrogen by a secondary ion mass spectrometer in the direction of the bead. As shown in Fig. $, when a part of si of the semiconductor layer contains nitrogen, nitrogen is detected in a portion corresponding to the thickness of the nitrogen-containing portion in the portion of the nitrogen-containing semiconductor layer. Further, the nitrogen content (concentration) is defined by the average value of the measured values of the bottom portion above the peak value of the ladder as shown in Fig. 5. In addition, when the nitrogen content is lxl〇18at〇ms/cm3, it is the detection limit of the second 319513 16 200813236 ion mass spectrometer. This is the x-ray first electron spectrometer ^ -ray p otoelectron spectrometer ; XPS)|g Si # ^ = degree of 5G to (10) person's sputtering (four) order Next: the radiance photoelectron spectrometer measures the (four) shot portion, and the integral of the nitrogen sample value obtained from the sample with the known nitrogen content The strength is compared and the diterpenoid nitrogen is calculated. Further, although the measurement of the nitrogen content can be measured by a secondary ion mass spectrometer or an X-ray photoelectron spectrometer, when the nitrogen content is close to the detection limit of the secondary ion mass spectrometer, the measured value is reliable. From a sexual point of view, there are also cases where measurements are made using a xenon ray photoelectron spectrometer. [弟1表]

No 元件結構 歐姆々 降性 擴i 文耐熱性 As-depo 250〇C 200 220 240 250 260 280 300 320 340 360 380 上1 Al/N-n+Si 〇 〇 〇 〇 〇 o 〇 χ χ χ χ χ X &gt;2 ^Α1-Νι/Ν-η+8ι 「〇 〇 〇 〇 〇 〇 〇 〇 〇 X X X χ &gt;3 Al-Ni-B/N-n+Si 〇 o 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 χ Μ Al/n+Si 〇 X X X X X X χ χ X X X X ]·5 Al-Ni/n+Si 〇 〇 〇 X X X X χ χ X X X X JU6 Al_Ni-B/n+Si 〇 〇 〇 〇 〇 X X X X X X X X 1-7 Al-Ni-C/n+Si 〇 〇 〇 〇 X X X X X X X X XNo element structure ohmic drop reduction heat resistance As-depo 250〇C 200 220 240 250 260 280 300 320 340 360 380 Upper 1 Al/N-n+Si 〇〇〇〇〇o 〇χ χ χ χ χ X &gt;2 ^Α1-Νι/Ν-η+8ι ”〇〇〇〇〇〇〇〇〇XXX χ &gt;3 Al-Ni-B/N-n+Si 〇o 〇〇〇〇〇〇〇〇 〇〇χ Μ Al/n+Si 〇XXXXXX χ χ XXXX ]·5 Al-Ni/n+Si 〇〇〇XXXX χ χ XXXX JU6 Al_Ni-B/n+Si 〇〇〇〇〇XXXXXXXX 1-7 Al- Ni-C/n+Si 〇〇〇〇XXXXXXXXX

[第2表][Table 2]

No 接合特性 元件結構 歐烟 寺性 m l耐熱社 As-depo 250〇C 200 220 240 250 260 280 300 320 340 360 380 Al/N-n+Si 〇 〇 〇 〇 〇 〇 X X X X X X X Al-Ni/N-n+Si 〇 〇 〇 o 〇 〇 〇 〇 X X X X X Al-Ni-B/N-n+Si 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 X X Al/n+Si 〇 X X X X X X X X X X X Al-Ni/n+Si . 〇 〇 〇 X X X X X X X X X X Al-Ni-B/n+Si 〇 〇 〇 〇 〇 X X X X X X X X Lh__ Al-Ni-C/n+Si 〇 〇 〇 〇 X X X X X X X X X 17 319513 200813236 [第3表]No joint characteristic element structure Ou Yan Temple m heat-resistant society As-depo 250〇C 200 220 240 250 260 280 300 320 340 360 380 Al/N-n+Si 〇〇〇〇〇〇XXXXXXX Al-Ni/N-n +Si 〇〇〇o 〇〇〇〇XXXXX Al-Ni-B/N-n+Si 〇〇〇〇〇〇〇〇〇〇〇XX Al/n+Si 〇XXXXXXXXXXX Al-Ni/n+Si . 〇 〇〇XXXXXXXXXX Al-Ni-B/n+Si 〇〇〇〇〇XXXXXXXX Lh__ Al-Ni-C/n+Si 〇〇〇〇XXXXXXXXX 17 319513 200813236 [Table 3]

元件結構 Al/N-n+Si Al-Ni/N-n+Si Al-Ni-B/N-n+Si Al-Ni-B/n+a —AR^C/n+Si 歐姆i 寺性 _汉口何Ί 土 故耐熱性 As-dep〇 ~^ Q~- 250°c 200 万 万 220 240 〇 〇 250 〇 260 万 互 〇 280 〇 Tv 300 万 〇 〇 320 340 360 380 X X X X 〇 X X X &quot;〇 〇 〇 〇 O 〇η — —〇」 X 〇 X X X 又 X |X| y X X X X X 乂 X X y 〇 〇 〇 〇 〇 X X χ χ χ 乂 y χ 〇 〇 〇 〇 X X X X X X X X X 珊Element structure Al/N-n+Si Al-Ni/N-n+Si Al-Ni-B/N-n+Si Al-Ni-B/n+a —AR^C/n+Si ohm i temple _Hankou Hezhen Earth heat resistance As-dep〇~^ Q~- 250°c 200 million 220 240 〇〇250 〇2.6 million 〇280 〇Tv 300 〇〇320 340 360 380 XXXX 〇XXX &quot;〇 〇〇〇O 〇η — —〇” X 〇XXX and X |X| y XXXXX 乂XX y 〇〇〇〇〇XX χ χ 乂 乂y χ 〇〇〇〇XXXXXXXXX Shan

No 1-6 319513 18 200813236 — 本實施例2所評價的A1系合金係如第4表及第5表所 示之試料No.2-1至試料No.2-9共9種類。 並且,本實施例2係與在前述實施例1說明之方法相 ‘同地進行,針對半導體層的含氮量相異的6種類試樣進行 評價。此外,針對半導體層的Si,係採用含有p(鱗)2χ 1018atoms/cm3 至 5xl018atoms/cm3 程度之高摻雜 n+-Si。 開關特性·元件的開關特性評估係以測量〇n/〇ff比來進 行。評價試樣係依照以下的順序來製作。 _ 首先,使用各組成的A1系合金靶,於玻璃基板(康寧 公司製:#1737)上形成厚度3000 A的A1系合金膜。濺鍍 條件為:基板加熱溫度100 °c、直流功率1000w (3.1W/cm2)、氬氣流量l〇〇sccm、氬氣壓〇.5Pa。接著,藉 由光微影技術蝕刻A1系合金膜而形成閘極配線寬度50// m、閘極電極寬度15/zm(參照第6圖)。光微影作業條件 為:於A1系合金膜表面披覆阻劑(TFR-970:東京應化工業 φ (股)公司製/塗佈條件:旋轉塗佈機300Orpm,烘烤後阻 劑厚1//m為目標),進行前烘烤(pre-baking)(l 10°C、1·5 分鐘)處理,配置預定的圖案薄膜(pattern film)進行曝光處 理(MaskAligner MA-20 : Mikasa(股)公司製/曝光條件: 15mJ/cm2)。接著,以濃度2.38%、液溫23。(:的含有四甲基 氫氧化銨(Tetra methyl ammonium hydroxide)之驗性顯影 液(以下,簡稱為TMAH顯影液)進行顯影處理,在顯影處 理後,以加熱板(hot plate)進行後烘烤(p〇st-baking)(110 °C、3分鐘),以磷酸系混酸蝕刻液(關東化學(股)公司製/ 19 319513 200813236 —— 組成為磷酸:硝酸:醋酸:水=16 : 1 : 2 : 1(容量比))進 行電路形成。藉由以前述條件進行電路形成,電路的錐角 (taper angle)可控制為45度。 、 在蝕刻處理後,以剝離液(ST106 :東京應化工業(股) 公司製)進行阻劑的去除,在閘極配線電路的形成後,以射 頻(RF)濺鍍方式成膜而形成作為絕緣層的SiNx,成膜厚度 2200A。成膜條件採用:基板加熱溫度350°C、射頻功率 1000W(3.1 W/cm2)、氬氣流量 90sccm、氮氣流量 lOsccm、 ⑩氣壓0.5Pa。另外,以CVD方式依需要形成非晶質的i-Si 膜、磷摻雜的n+-Si膜。i-Si膜(非摻雜Si膜)的成膜條件採 用:以基板加熱溫度300°C、射頻功率100W(0.31W/cm2)、 SiH4流量(10°/。氬氣稀釋)300sccm,膜厚2000A。氮添加 n+-Si膜(P(磷)摻雜膜)的成膜條件為:以基板加熱溫度200 。(:、射頻功率100W(0.31W/cm2)、SiH4流量(8%氬氣稀 釋)300sccm,並且相對於含有磷(P)成分氣體的流量(8%氬 •氣稀釋)50seem,使氮氣流量(0 seem、1 seem、10 seem、 20 seem、40 seem、100 seem)作變化,形成厚度 500 A 之 含有氮的n+-Si層。針對以各氮氣流量形成之n+-Si層的含 氮量,利用前述實施例1所示的測量方法進行分析。 之後,將與最初成膜於玻璃基板上者相同組成的A1 系合金膜成膜於n+-Si層上,膜厚2000A。成膜條件係以 與前述閘極配線相同條件來進行。 接著,以光微影技術形成源極配線、汲極配線及電極。 該光微影作業的條件係與前述閘極配線的條件相同。此 20 319513 200813236 螫 . 时,在A1系合金膜的蝕刻後,進行n+_si層的乾蝕刻。乾 蝕刻▲件為·以射頻功率5〇w、氣體流量3〇sccm、氣 壓ι〇ρ&amp;進行。接著,以剝離液(STi〇6 :東京應化工業(股 r 公司製)進行阻劑的去除。 ★接著,形成作為保護層(passivation)的SiNx絕緣膜, 膜厚2500 A,藉由乾㈣而僅使閘極、源極、汲極的各電、 ,,分露出。乾蝕刻條件為··以射頻功率100W、SF6氣體 _ ’瓜里30sccm、〇2氣體流量5sccm、氣壓i〇pa進行。藉由 讎前述條件,形成通道寬度^m、通道長度5//m的^晶 體(參照第6圖)。 針對以上述方式製作之評價試樣,以3端子法測量元 件的開關特性的Gn/Gff比。測量儀器使用安捷倫科技公司 製造的B1500A裝置,進行¥§_1(1測量。並且,由々萨_1(^、 +20V時的id來計算0n/0ff比。 還有,針對Si擴散耐熱性之評估係以與在實施例丨說 _明的方法相同地進行。於第4表及f 5表係顯示各組成‘ A1系合金與令氪含量作變化的Si半導體層的^擴散耐熱 性評價(第4表)及〇n/off比測定的結果(第5表)。 / 319513 .21 200813236 w [第4表] 試料 No 合金組成 含氮量(atoms/cm3) 3xl017 IxlO18 4xl019 lxl O20 5xl021 2xl022 2-1 A1 150 250 260 300 300 3 00 2-2 Al-5.0at%Ni 200 280 300 320 350 370 2-3 Al-5.0at%Ni-0.4at%B 240 340 360 3 80 400 420 2-4 Al-5.0at%Ni-0.3at%C 220 300 310 350 380 400 2-5 Al-4.0at%Ni-0.6at%La 220 300 320 3 60 3 80 400 2-6 Al-3.0at%Ni-0.4at%B 220 300 320 350 360 3 70 2-7 Al-3.2at%Ni-0.2at%B 220 3 00 310 330 350 350 2-8 Al-2.0at%Ni-0.4at%B 190 280 300 320 340 350 2-9 Al-0.5at%Ni-0.8at%B 190 280 300 320 33 0 340 (°c) _ [第5表] 試料 No 合金組成 含氮量(atoms/cm3) 3xl017 IxlO18 4xl019 IxlO20 5x1021 2x1022 2-1 A1 無法 測量 4.7xl03 l.OxlO4 5.8xl04 4.1xl04 4.6χ104 2-2 Al-5.0at%Ni 無法 測量 l.lxlO5 1.4xl05 1.9xl05 2·1χ105 5.2χ104 2-3 Al-5.0at%Ni-0.4at%B 4.4xl04 2.8xl05 2.6xl06 4.4xl06 3.6xl05 2.5χ104 2-4 Al-5.0at%Ni-0.3at%C 2·3χ103 1.7xl05 2.2xl05 2.5xl05 2.4xl05 6.0χ104 2-5 Al-4.0at%Ni-0.6at%La 3·4χ103 2.7xl05 1.8xl05 2.4xl05 1.9xl05 5.8χ104 2-6 Al-3.0at%Ni-0.4at%B 2·0χ103 3.0xl05 8.8xl05 2.7xl06 5·5χ105 4·1χ104 2-7 Al-3.2at%Ni-0.2at%B 2.2χ103 1.9xl05 1.2xl06 L8xl06 7.1xl05 8·1χ104 2-8 Al-2.0at%Ni-0.4at%B 無法 測量 1·3χ105 5.5x10s 1.2x106 4·5χ105 2.5χ104 2-9 Al-0.5at%Ni-0.8at%B 無法 測量 1.2xl05 8.9xl05 8. IxlO5 5·7χ105 3.8x104 (on/off 比)No. 1-6 319513 18 200813236 - The A1 alloys evaluated in the second embodiment are classified into nine types, sample No. 2-1 to sample No. 2-9 shown in Tables 4 and 5. Further, in the second embodiment, the six types of samples having different nitrogen contents of the semiconductor layer were evaluated in the same manner as in the method described in the first embodiment. Further, for the Si of the semiconductor layer, highly doped n+-Si containing p(scale) 2χ 1018 atoms/cm3 to 5xl018atoms/cm3 is used. The switching characteristics and the switching characteristics of the components are evaluated by measuring the 〇n/〇ff ratio. The evaluation samples were prepared in the following order. _ First, an A1 alloy film having a thickness of 3000 A was formed on a glass substrate (manufactured by Corning Incorporated: #1737) using an A1 alloy target of each composition. The sputtering conditions were: substrate heating temperature 100 °c, DC power 1000 w (3.1 W/cm 2 ), argon flow rate l 〇〇 sccm, argon pressure 〇 5 Pa. Next, the A1-based alloy film was etched by photolithography to form a gate wiring width of 50//m and a gate electrode width of 15/zm (see Fig. 6). The photolithography operation conditions are as follows: the surface resisting agent on the surface of the A1 alloy film (TFR-970: manufactured by Tokyo Ohka Kogyo Co., Ltd. / coating conditions: 300 O rpm spin coating machine, thickness of the resist after baking 1 //m is the target), pre-baking (l 10 ° C, 1.5 minutes) processing, and a predetermined pattern film is placed for exposure processing (MaskAligner MA-20: Mikasa) )Company system / exposure conditions: 15mJ/cm2). Next, the concentration was 2.38% and the liquid temperature was 23. (: An electrophotographic developer containing tetramethylammonium hydroxide (hereinafter, abbreviated as TMAH developer) is subjected to development treatment, and after development treatment, post-baking is performed by a hot plate. (p〇st-baking) (110 °C, 3 minutes), a phosphoric acid mixed acid etching solution (manufactured by Kanto Chemical Co., Ltd. / 19 319513 200813236 - composition of phosphoric acid: nitric acid: acetic acid: water = 16: 1 : Circuit formation is performed by 2:1 (capacity ratio). By performing circuit formation under the above conditions, the taper angle of the circuit can be controlled to 45 degrees. After the etching process, the stripping liquid is used (ST106: Tokyo Yinghua) Industrial Co., Ltd.) removes the resist, and after forming the gate wiring circuit, forms a film by radio frequency (RF) sputtering to form SiNx as an insulating layer, and has a film thickness of 2200 A. The film formation conditions are as follows: The substrate heating temperature is 350 ° C, the RF power is 1000 W (3.1 W/cm 2 ), the argon flow rate is 90 sccm, the nitrogen flow rate is 10 sccm, and the 10 atmosphere is 0.5 Pa. In addition, an amorphous i-Si film and phosphorus doping are formed by CVD as needed. Miscellaneous n+-Si film. i-Si film (non-doped The film formation conditions of the Si film are: substrate heating temperature 300 ° C, RF power 100 W (0.31 W/cm 2 ), SiH 4 flow rate (10 ° / argon dilution) 300 sccm, film thickness 2000 A. Nitrogen addition n + -Si film (P (phosphorus) doped film) film formation conditions are: substrate heating temperature 200 (:, RF power 100W (0.31W / cm2), SiH4 flow rate (8% argon dilution) 300sccm, and relative to phosphorus (P) component gas flow rate (8% argon gas dilution) 50seem, the nitrogen flow rate (0 seem, 1 seem, 10 seem, 20 seem, 40 seem, 100 seem) is changed to form a thickness of 500 A containing nitrogen n+-Si layer. The nitrogen content of the n+-Si layer formed by the flow rate of each nitrogen gas was analyzed by the measurement method shown in the above Example 1. Thereafter, the same composition as that originally formed on the glass substrate was used. The alloy film is formed on the n+-Si layer and has a film thickness of 2000 A. The film formation conditions are performed under the same conditions as the gate wiring. Next, the source wiring, the drain wiring, and the electrode are formed by photolithography. The conditions of the photolithography operation are the same as those of the aforementioned gate wiring. This 20 319513 200813236 When, after the etching of the A1 alloy film, a layer of n + _si dry etching is dry etching · ▲ member 5〇w to RF power, gas flow 3〇sccm, air pressure ι〇ρ &amp;. For. Then, the resist was removed by a stripping solution (STi〇6: Tokyo Chemical Industry Co., Ltd.). Next, a SiNx insulating film as a passivation layer was formed, and the film thickness was 2,500 Å, which was dried (4). Only the gates, sources, and drains are exposed. The dry etching conditions are as follows: RF power 100W, SF6 gas _ 'Guarí 30sccm, 〇2 gas flow rate 5sccm, pressure i〇pa By the above conditions, a crystal having a channel width of ^m and a channel length of 5/m is formed (refer to Fig. 6). For the evaluation sample prepared in the above manner, the Gn of the switching characteristic of the element is measured by the 3-terminal method. /Gff ratio. The measuring instrument uses the B1500A device manufactured by Agilent Technologies to perform the measurement of ¥§_1 (1), and the 0n/0ff ratio is calculated by the id of 々sa_1 (^, +20V. Also, for Si The evaluation of the diffusion heat resistance was carried out in the same manner as in the example of the example. The fourth table and the f 5 table show the diffusion of the Si semiconductor layer of each composition 'A1 alloy and the content of the germanium. Heat resistance evaluation (Table 4) and 〇n/off ratio measurement results (Table 5). 319513 .21 200813236 w [Table 4] Sample No Alloy composition nitrogen content (atoms/cm3) 3xl017 IxlO18 4xl019 lxl O20 5xl021 2xl022 2-1 A1 150 250 260 300 300 3 00 2-2 Al-5.0at%Ni 200 280 300 320 350 370 2-3 Al-5.0at%Ni-0.4at%B 240 340 360 3 80 400 420 2-4 Al-5.0at%Ni-0.3at%C 220 300 310 350 380 400 2-5 Al -4.0at%Ni-0.6at%La 220 300 320 3 60 3 80 400 2-6 Al-3.0at%Ni-0.4at%B 220 300 320 350 360 3 70 2-7 Al-3.2at%Ni-0.2 At%B 220 3 00 310 330 350 350 2-8 Al-2.0at%Ni-0.4at%B 190 280 300 320 340 350 2-9 Al-0.5at%Ni-0.8at%B 190 280 300 320 33 0 340 (°c) _ [Table 5] Sample No Alloy composition nitrogen content (atoms/cm3) 3xl017 IxlO18 4xl019 IxlO20 5x1021 2x1022 2-1 A1 Cannot measure 4.7xl03 l.OxlO4 5.8xl04 4.1xl04 4.6χ104 2-2 Al -5.0at%Ni cannot measure l.lxlO5 1.4xl05 1.9xl05 2·1χ105 5.2χ104 2-3 Al-5.0at%Ni-0.4at%B 4.4xl04 2.8xl05 2.6xl06 4.4xl06 3.6xl05 2.5χ104 2-4 Al- 5.0at%Ni-0.3at%C 2·3χ103 1.7xl05 2.2xl05 2.5xl05 2.4xl05 6.0χ104 2-5 Al-4.0at%Ni-0.6at%La 3·4χ103 2.7xl05 1.8xl05 2.4xl05 1.9xl05 5.8χ104 2-6 Al-3.0at%Ni-0.4at%B 2·0χ103 3.0xl05 8.8xl05 2.7xl06 5·5χ105 4·1χ104 2-7 Al-3.2at%Ni-0.2at%B 2.2χ103 1.9 Xl05 1.2xl06 L8xl06 7.1xl05 8·1χ104 2-8 Al-2.0at%Ni-0.4at%B Unable to measure 1·3χ105 5.5x10s 1.2x106 4·5χ105 2.5χ104 2-9 Al-0.5at%Ni-0.8at% B cannot measure 1.2xl05 8.9xl05 8. IxlO5 5·7χ105 3.8x104 (on/off ratio)

依據第4表及第5表的結果,當Si半導體層的含氮量 變大時,有Si擴散耐熱比變高的傾向,on/off比亦有變成 為5位數(指on/off比成為105上下的值)的傾向。具體而 言,可清楚明白當含氮量為 1018atoms/cm3量級至 1021atoms/cm3量級時,除了純A1外,on/off比皆變為5 22 319513 200813236 位數以上,Si擴散耐熱性亦變為28(rc以上。然而,當含 氮1變為1022atoms/cm3量級時,〇n/〇ff比卻變為4位數。 .依據第4表及第5表的結果,si半導體層的含氮量以 10〜oms/cm3量級至1〇21at〇ms/cm3量級為佳。此外,從 A1_5.〇at% Ni-〇.4at%B 合金(試料 Νο·2·3)、剔彻% m_〇.4at%B合金(試料N〇 2_6)、Ai_3 2at%见_〇上細合金 (试料 Νο·2_7)、Al_2.〇at% Ni_〇 4at%B 合金(試料 ν〇·2_8) 馨的結果來看,可確認到在1〇19at〇ms/cm3量級或 cm 1級能夠貫現6位數的〇n/〇ff比。依據第丨表至第$ 表=不之結果綜合判斷,可判斷Si半導體層的含氮量為 10 atoms/cm夏級至102iat〇ms/cm3量級係實用上最適合 者。 【圖式簡單說明】 第1圖係TFT的剖面示意圖。 第2圖(A)及第2圖(B)係歐姆特性評價試樣示意圖。 麵 第3圖係Sl擴散耐熱性評價的光學顯微鏡照片。 第4圖係Si擴散耐熱性評價的光學顯微鏡照片。 — 第5圖係顯示由二次離子質譜儀所得之半導體層中的 氮分析結果之概念圖表。 第6「圖係頒示TFT元件的配線結耩之平面概念圖。 【主要元件符號說明】 玻璃基板 覆蓋層 SiNx絕緣膜 電極配線電路層 , 閘極絕緣膜 a-Si半導體層 319513 23 200813236 6 通道保護膜層 Ί 7, 透明電極層 8 9 A1系合金層 n+-Si半導體層 n+-Si半導體層According to the results of the fourth and fifth tables, when the nitrogen content of the Si semiconductor layer is increased, the Si diffusion heat resistance ratio tends to be high, and the on/off ratio is also changed to 5 digits (the on/off ratio becomes The tendency of the value of 105). Specifically, it can be clearly understood that when the nitrogen content is on the order of 1018 atoms/cm 3 to the order of 1021 atoms/cm 3 , the on/off ratio is changed to 5 22 319513 200813236 bits in addition to pure A1, and Si diffusion heat resistance is also It becomes 28 (rc or more. However, when nitrogen-containing 1 becomes the order of 1022 atoms/cm3, the 〇n/〇ff ratio becomes 4 digits. According to the results of Tables 4 and 5, the Si semiconductor layer The nitrogen content is preferably on the order of 10 to oms/cm 3 to 1 〇 21 at 〇 ms / cm 3 . Further, from A1_5. 〇 at% Ni-〇. 4 at% B alloy (sample Νο·2·3), Excision % m_〇.4at%B alloy (sample N〇2_6), Ai_3 2at% see _〇 fine alloy (sample Νο·2_7), Al_2.〇at% Ni_〇4at%B alloy (sample ν 〇·2_8) From the results of Xin, it can be confirmed that the 〇n/〇ff ratio of 6 digits can be achieved at the level of 1〇19at〇ms/cm3 or cm1. According to the third table to the table #= If the result is not comprehensively judged, it can be judged that the nitrogen content of the Si semiconductor layer is 10 atoms/cm to the order of 102iat〇ms/cm3, which is practically suitable. [Simplified Schematic] Fig. 1 is a section of the TFT Schematic. Figure 2 (A) and Figure 2 (B) are ohms. Fig. 3 is an optical micrograph of the evaluation of the diffusion heat resistance of Sl. Fig. 4 is an optical micrograph of the evaluation of the heat of diffusion of Si. - Fig. 5 shows the semiconductor layer obtained by the secondary ion mass spectrometer. The conceptual diagram of the results of nitrogen analysis. The sixth figure shows the plane concept diagram of the wiring junction of the TFT element. [Description of main component symbols] Glass substrate overlay SiNx insulating film electrode wiring circuit layer, gate insulating film a -Si semiconductor layer 319513 23 200813236 6 Channel protective film layer Ί 7, transparent electrode layer 8 9 A1 alloy layer n+-Si semiconductor layer n+-Si semiconductor layer

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Claims (1)

200813236 十、申請專利範圍·· 1. T種凡件之接合結構,係具備:半導體層、及直接接合 於該半導體層的鋁(A1)系合金層,其特徵在:與A1系合 金層直接接合的半導體層為含有氮之矽(Si)。 2. 如申請專利範圍第1項之元件之接合結構,其中,Si 的合氮量為 lXl〇〗8at〇ms/cm3 至 5xl〇21at〇ms/cm3。 3. 如申請專利範圍第1項或第2項之元件之接合結構,其 中,以的含氮量為 lxl〇18at〇ms/cm3 至 ixl〇2〇at()ms/em3。 • 4.如中請專利範圍第1至3項中任-項之it件之接合結 構,其中,半導體層之從與A1系合金層直接接合的表 面侧起1〇0 A以上的深度係由含有氮之Si來形成。 5. 如中請專利範圍第丨至4項中任―項之元件之接合結 構,其中,半導體層係由非晶質的n+-Si或P+-Si形成。 6. 如申請專利範圍第5項之元件之接合結構,其中,半導 體層係含有由磷、,、録中選擇的摻雜劑5xi()17at〇ms/ _ 至 5xl〇2〗atoms/cm3。 7. 如申請專利範圍第2至6項中任一項之元件之接合結 構,其中,A1系合金係含有鎳〇 5沿0/〇至1〇 〇at%。 如申請專利範面第7項之元件之揍合結構,其中,ai 系合金係含有硼〇.lat%至〇.8at%。 9.—種薄膜電晶體,係由具備申讀專利範圍第丨至8項中 任一項之元件之接合結構的元件所形成。 ίο- «it#^^^^ ^ α^ ^^^ + ^ ^ 直接接合於該半導體層的A1系合金層之元件之接合結 319513 25 200813236 t 構^其知'被在·將含有N2、ΝΉ3、N〇X中至少任一者 t體$人至以化學氣相蒸鍍法使要作為半導體層的 Sl成膜時的成膜氣體環境中而成膜。 η·如:請專利範圍第10項之元件之形成方法,其中,當 =3有Ν2的氣體導入而使要作為半導體層的si成膜 枯,將氮分壓比設為〇·〇〇1%至2〇%而開始成膜。 12·如申請專利範圍第1〇項之元件之形成方法,其中,當 _ 將含有Ν2的氣體導入而使要作為半導體層的Sj成膜 時’自成膜途中將氮分壓比調整成〇.〇〇1%至2〇%。 13.—種元件之形成方法,係用以形成具備有半導體層、及 直接接合於該半導體層的A1系合金層之元件之接合結 構,其特徵在:於使要作為半導體層的Si成膜後,在 氮氣體環境中進行200°C至500°C的熱處理。 14·一種濺鍍靶,係用以形成申請專利範圍第7項之元件之 接合結構,其為含有鎳0.5at%至lO.Oat%的A1系合金濺 鍍靶。 26 319513200813236 X. Patent Application Scope 1. The joint structure of the T type includes a semiconductor layer and an aluminum (A1) alloy layer directly bonded to the semiconductor layer, which is characterized by: directly with the A1 alloy layer The bonded semiconductor layer is nitrogen-containing germanium (Si). 2. The joint structure of the component of claim 1 wherein the nitrogen content of Si is lXl 〇 8 at 〇 ms / cm 3 to 5 x l 〇 21 at 〇 / cm 3 . 3. For the joint structure of the components of claim 1 or 2, the nitrogen content is lxl〇18at〇ms/cm3 to ixl〇2〇at()ms/em3. 4. The joint structure of the member of any one of the first to third aspects of the patent range, wherein the depth of the semiconductor layer from the surface side directly bonded to the A1 alloy layer is greater than 1 Å. Formed with nitrogen containing nitrogen. 5. The bonding structure of the element of any one of the items of the fourth to fourth aspect of the invention, wherein the semiconductor layer is formed of amorphous n+-Si or P+-Si. 6. The joint structure of the component of claim 5, wherein the semiconductor layer contains a dopant selected from the group consisting of phosphorus, and 5X () 17 at 〇 ms / _ to 5 x 1 ato 2 atoms / cm 3 . 7. The joint structure of the element of any one of claims 2 to 6, wherein the A1 alloy contains nickel iridium 5 along 0/〇 to 1〇 % at%. For example, the composite structure of the component of the seventh aspect of the patent application, wherein the ai alloy system contains borax. lat% to at. 8 at%. 9. A thin film transistor formed by an element having a joint structure of an element of any one of the patents of the first to eighth aspects. Οο- «it#^^^^ ^ α^ ^^^ + ^ ^ The junction of the element directly bonded to the A1 alloy layer of the semiconductor layer 319513 25 200813236 t The structure is known to be contained in N2 At least one of ΝΉ3 and N〇X is formed into a film in a film forming gas atmosphere when S1 is to be formed as a semiconductor layer by chemical vapor deposition. η·如: The method of forming the component of the tenth item of the patent range, wherein when the gas having Ν2 is introduced, the Si film to be used as the semiconductor layer is formed, and the nitrogen partial pressure ratio is set to 〇·〇〇1. Film formation started from % to 2%. 12. The method of forming an element according to the first aspect of the invention, wherein when the gas containing Ν2 is introduced and the Sj is to be formed as a semiconductor layer, the nitrogen partial pressure ratio is adjusted to 〇 during the film formation. .〇〇1% to 2〇%. A method of forming a device for forming a bonding structure of an element including a semiconductor layer and an A1 alloy layer directly bonded to the semiconductor layer, characterized in that a film is formed as a semiconductor layer. Thereafter, heat treatment at 200 ° C to 500 ° C is performed in a nitrogen atmosphere. A sputtering target for forming a bonding structure of an element of the seventh aspect of the patent application, which is an A1 alloy sputtering target containing 0.5 at% to 1.0% of nickel. 26 319513
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