TW200746234A - Semiconductor die having a protective periphery region and method for forming - Google Patents

Semiconductor die having a protective periphery region and method for forming

Info

Publication number
TW200746234A
TW200746234A TW095137551A TW95137551A TW200746234A TW 200746234 A TW200746234 A TW 200746234A TW 095137551 A TW095137551 A TW 095137551A TW 95137551 A TW95137551 A TW 95137551A TW 200746234 A TW200746234 A TW 200746234A
Authority
TW
Taiwan
Prior art keywords
forming
semiconductor die
ring
periphery region
die
Prior art date
Application number
TW095137551A
Other languages
English (en)
Inventor
Yuan Yuan
Chu-Chung Lee
Tu-Anh N Tran
Paul M Winebarger
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200746234A publication Critical patent/TW200746234A/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
TW095137551A 2005-10-18 2006-10-12 Semiconductor die having a protective periphery region and method for forming TW200746234A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/252,409 US20070087067A1 (en) 2005-10-18 2005-10-18 Semiconductor die having a protective periphery region and method for forming

Publications (1)

Publication Number Publication Date
TW200746234A true TW200746234A (en) 2007-12-16

Family

ID=37948409

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095137551A TW200746234A (en) 2005-10-18 2006-10-12 Semiconductor die having a protective periphery region and method for forming

Country Status (4)

Country Link
US (1) US20070087067A1 (zh)
CN (1) CN101501855A (zh)
TW (1) TW200746234A (zh)
WO (1) WO2007047058A2 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI822189B (zh) * 2021-08-05 2023-11-11 台灣積體電路製造股份有限公司 積體電路晶片以及用於製造互連結構的方法

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7618249B2 (en) * 2006-09-22 2009-11-17 Asm Technology Singapore Pte Ltd. Memory card molding apparatus and process
KR100995558B1 (ko) 2007-03-22 2010-11-22 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치 및 반도체 장치의 제조 방법
US8373254B2 (en) 2008-07-29 2013-02-12 Taiwan Semiconductor Manufacturing Company, Ltd. Structure for reducing integrated circuit corner peeling
JP5439901B2 (ja) * 2009-03-31 2014-03-12 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP5509908B2 (ja) * 2010-02-19 2014-06-04 富士電機株式会社 半導体装置およびその製造方法
JP5830843B2 (ja) * 2010-03-24 2015-12-09 富士通セミコンダクター株式会社 半導体ウエハとその製造方法、及び半導体チップ
CN102779812A (zh) * 2011-05-10 2012-11-14 重庆万道光电科技有限公司 一种高压及功率器件场限环的新型保护环
US9640456B2 (en) * 2013-03-15 2017-05-02 Taiwan Semiconductor Manufacturing Company Limited Support structure for integrated circuitry
CN105336711B (zh) 2014-06-19 2019-03-15 恩智浦美国有限公司 采用低k值介电材料的管芯边缘密封
CN105374765B (zh) * 2014-09-02 2018-05-04 中芯国际集成电路制造(上海)有限公司 一种芯片密封环结构及其制作方法
US9589912B1 (en) 2015-08-27 2017-03-07 Globalfoundries Inc. Integrated circuit structure with crack stop and method of forming same
US9589911B1 (en) 2015-08-27 2017-03-07 Globalfoundries Inc. Integrated circuit structure with metal crack stop and methods of forming same
US10395936B2 (en) 2017-04-24 2019-08-27 International Business Machines Corporation Wafer element with an adjusted print resolution assist feature
US10312201B1 (en) 2017-11-30 2019-06-04 Taiwan Semiconductor Manufacturing Company, Ltd. Seal ring for hybrid-bond
CN110767664B (zh) * 2019-10-31 2022-08-26 京东方科技集团股份有限公司 一种显示基板及其制作方法、显示装置

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100190927B1 (ko) * 1996-07-18 1999-06-01 윤종용 슬릿이 형성된 금속막을 구비한 반도체 칩 장치
US5834829A (en) * 1996-09-05 1998-11-10 International Business Machines Corporation Energy relieving crack stop
US6028347A (en) * 1996-12-10 2000-02-22 Digital Equipment Corporation Semiconductor structures and packaging methods
US6365958B1 (en) * 1998-02-06 2002-04-02 Texas Instruments Incorporated Sacrificial structures for arresting insulator cracks in semiconductor devices
US6448650B1 (en) * 1998-05-18 2002-09-10 Texas Instruments Incorporated Fine pitch system and method for reinforcing bond pads in semiconductor devices
US6462414B1 (en) * 1999-03-05 2002-10-08 Altera Corporation Integrated circuit package utilizing a conductive structure for interlocking a conductive ball to a ball pad
KR100689129B1 (ko) * 2000-02-15 2007-03-08 가부시키가이샤 히타치세이사쿠쇼 반도체 장치의 제조 방법 및 반도체 제조 장치
US6429502B1 (en) * 2000-08-22 2002-08-06 Silicon Wave, Inc. Multi-chambered trench isolated guard ring region for providing RF isolation
US6734090B2 (en) * 2002-02-20 2004-05-11 International Business Machines Corporation Method of making an edge seal for a semiconductor device
JP3813562B2 (ja) * 2002-03-15 2006-08-23 富士通株式会社 半導体装置及びその製造方法
US6500770B1 (en) * 2002-04-22 2002-12-31 Taiwan Semiconductor Manufacturing Company, Ltd Method for forming a multi-layer protective coating over porous low-k material
JP4088120B2 (ja) * 2002-08-12 2008-05-21 株式会社ルネサステクノロジ 半導体装置
US6972209B2 (en) * 2002-11-27 2005-12-06 International Business Machines Corporation Stacked via-stud with improved reliability in copper metallurgy
US7098676B2 (en) * 2003-01-08 2006-08-29 International Business Machines Corporation Multi-functional structure for enhanced chip manufacturibility and reliability for low k dielectrics semiconductors and a crackstop integrity screen and monitor
US7126225B2 (en) * 2003-04-15 2006-10-24 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method for manufacturing a semiconductor wafer with reduced delamination and peeling
US20050026397A1 (en) * 2003-07-28 2005-02-03 International Business Machines Corporation Crack stop for low k dielectrics
US7265436B2 (en) * 2004-02-17 2007-09-04 Taiwan Semiconductor Manufacturing Company, Ltd. Non-repeated and non-uniform width seal ring structure
US7202550B2 (en) * 2004-06-01 2007-04-10 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated stress relief pattern and registration structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI822189B (zh) * 2021-08-05 2023-11-11 台灣積體電路製造股份有限公司 積體電路晶片以及用於製造互連結構的方法

Also Published As

Publication number Publication date
WO2007047058A2 (en) 2007-04-26
US20070087067A1 (en) 2007-04-19
WO2007047058A3 (en) 2009-04-30
CN101501855A (zh) 2009-08-05

Similar Documents

Publication Publication Date Title
TW200746234A (en) Semiconductor die having a protective periphery region and method for forming
TW200616019A (en) Integrated stress relief pattern and registration structure
SG114665A1 (en) Fan out type wafer level package structure and method of the same
TW200802569A (en) Methods of die sawing and structures formed thereby background of the invention
WO2006107356A3 (en) Method of adding fabrication monitors to integrated circuit chips
WO2004042851A3 (en) Structured silicon anode
EP1683187A4 (en) STRUCTURE STRUCTURES OF SEMICONDUCTOR DEVICE COMPRISING GRANULAR SEMICONDUCTOR MATERIAL
TW200514269A (en) Image sensor having large mirco-lense at the peripheral regions
EP1335411A3 (en) Semiconductor wafer having a thin die and tethers and method therefor
MY146465A (en) Periphery design for charge balance power devices
TW200514239A (en) LDMOS device with isolation guard rings
WO2003061006A3 (en) Stacked die in die bga package
TW200802797A (en) Electronic substrate, semiconductor device, and electronic device
EP2068364A3 (en) Trench MOSFET including buried source electrode
TW200723478A (en) System-in-package structure
WO2004030045A8 (en) Semiconductor device processing
GB2424516B (en) Protecting thin semiconductor wafers during back-grinding in high-volume production
TW200614399A (en) Bumping process
CA111501S (en) Imager device
TW200717704A (en) Method of forming a trench semiconductor device and structure therefor
TW200636842A (en) Manufacturing method for semiconductor chips and semiconductor wafer
TW200620560A (en) A device having multiple silicide types and a method for its fabrication
WO2006047560A3 (en) Direct energy conversion devices with substantially contiguous depletion region
TWI264057B (en) Semiconductor wafer with protection structure against damage during a die separation process
TW200719489A (en) Chip structure and manufacturing method of the same