SG11201702684XA - Mold release film, process for its production, and process for producing semiconductor package - Google Patents

Mold release film, process for its production, and process for producing semiconductor package

Info

Publication number
SG11201702684XA
SG11201702684XA SG11201702684XA SG11201702684XA SG11201702684XA SG 11201702684X A SG11201702684X A SG 11201702684XA SG 11201702684X A SG11201702684X A SG 11201702684XA SG 11201702684X A SG11201702684X A SG 11201702684XA SG 11201702684X A SG11201702684X A SG 11201702684XA
Authority
SG
Singapore
Prior art keywords
production
semiconductor package
release film
mold release
producing semiconductor
Prior art date
Application number
SG11201702684XA
Other languages
English (en)
Inventor
Wataru Kasai
Masami Suzuki
Original Assignee
Asahi Glass Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Glass Co Ltd filed Critical Asahi Glass Co Ltd
Publication of SG11201702684XA publication Critical patent/SG11201702684XA/en

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Classifications

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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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    • B29C33/00—Moulds or cores; Details thereof or accessories therefor
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    • B29C33/68—Release sheets
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/48155—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Laminated Bodies (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
SG11201702684XA 2014-11-20 2015-11-13 Mold release film, process for its production, and process for producing semiconductor package SG11201702684XA (en)

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PCT/JP2015/081989 WO2016080309A1 (ja) 2014-11-20 2015-11-13 離型フィルム、その製造方法および半導体パッケージの製造方法

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US11145631B1 (en) 2018-06-12 2021-10-12 Facebook Technologies, Llc Display devices and methods of making the same
US10921499B1 (en) 2018-06-12 2021-02-16 Facebook Technologies, Llc Display devices and methods for processing light
KR102504837B1 (ko) 2018-07-23 2023-02-28 삼성전자 주식회사 이형 필름 공급 장치를 포함하는 수지 성형 장치
AT521672B1 (de) * 2018-09-10 2022-10-15 Facc Ag Verfahren zur Herstellung eines Faser-Kunststoff-Verbund-Vergleichskörpers und Prüfungsverfahren
JP2020047836A (ja) * 2018-09-20 2020-03-26 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
JP7370537B2 (ja) * 2019-10-16 2023-10-30 株式会社コバヤシ 離型フィルム及び離型フィルムの製造方法
WO2021200409A1 (ja) * 2020-04-02 2021-10-07 日東電工株式会社 耐熱離型シート及び樹脂の加熱溶融を伴う工程を実施する方法
DE112021005920T5 (de) * 2020-11-10 2023-09-07 Nitto Denko Corporation Fluorharzfolie, kautschukformkörper und verfahren zur herstellung eines kautschukformkörpers
KR20220094011A (ko) * 2020-12-28 2022-07-05 (주)이녹스첨단소재 Qfn 반도체 패키지용 마스크 시트

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US4240993A (en) * 1978-08-07 1980-12-23 W. R. Grace & Co. Multi-layer film containing a layer of crosslinked ethylene/vinyl alcohol copolymer
JP4521704B2 (ja) * 1999-06-30 2010-08-11 三菱樹脂株式会社 離型フィルム
KR100689974B1 (ko) 2000-04-04 2007-03-09 미쓰비시 가가꾸 폴리에스테르 필름 가부시키가이샤 이형 필름
JP2002361643A (ja) 2001-06-01 2002-12-18 Hitachi Chem Co Ltd 半導体モールド用離型シート
JP2004079566A (ja) 2002-08-09 2004-03-11 Hitachi Chem Co Ltd 半導体モールド用離型シート
SG171589A1 (en) * 2006-04-25 2011-06-29 Asahi Glass Co Ltd Release film for semiconductor resin molds
JP5110440B2 (ja) * 2006-08-18 2012-12-26 旭硝子株式会社 半導体樹脂モールド用の離型フィルム
CA2782339C (en) * 2009-12-01 2018-05-22 Kuraray Co., Ltd. Multilayered structure and method for producing the same
EP2865522A4 (en) * 2012-06-26 2016-02-10 Nippon Synthetic Chem Ind LAMINATE, AND CASING AND PRESSURE-SENSITIVE PACKET USING THE SAME

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PH12017500688B1 (en) 2017-10-09
JPWO2016080309A1 (ja) 2017-09-14
KR20170086466A (ko) 2017-07-26
WO2016080309A1 (ja) 2016-05-26
MY186869A (en) 2021-08-26
JP6515933B2 (ja) 2019-05-22
TW201630089A (zh) 2016-08-16
US20170207105A1 (en) 2017-07-20
TWI680516B (zh) 2019-12-21
CN107004609A (zh) 2017-08-01
PH12017500688A1 (en) 2017-10-09
DE112015005259T5 (de) 2017-08-17
US10699916B2 (en) 2020-06-30
CN107004609B (zh) 2019-04-30
KR102411741B1 (ko) 2022-06-21

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