SG109568A1 - Wafer processing method - Google Patents

Wafer processing method

Info

Publication number
SG109568A1
SG109568A1 SG200404546A SG200404546A SG109568A1 SG 109568 A1 SG109568 A1 SG 109568A1 SG 200404546 A SG200404546 A SG 200404546A SG 200404546 A SG200404546 A SG 200404546A SG 109568 A1 SG109568 A1 SG 109568A1
Authority
SG
Singapore
Prior art keywords
processing method
wafer processing
wafer
processing
Prior art date
Application number
SG200404546A
Other languages
English (en)
Inventor
Nagasawa Tadato
Nagai Yusuke
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of SG109568A1 publication Critical patent/SG109568A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Laser Beam Processing (AREA)
SG200404546A 2003-08-12 2004-08-06 Wafer processing method SG109568A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003292190A JP4554901B2 (ja) 2003-08-12 2003-08-12 ウエーハの加工方法

Publications (1)

Publication Number Publication Date
SG109568A1 true SG109568A1 (en) 2005-03-30

Family

ID=34131704

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200404546A SG109568A1 (en) 2003-08-12 2004-08-06 Wafer processing method

Country Status (5)

Country Link
US (1) US7179724B2 (de)
JP (1) JP4554901B2 (de)
CN (1) CN100416767C (de)
DE (1) DE102004038339B4 (de)
SG (1) SG109568A1 (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4647228B2 (ja) * 2004-04-01 2011-03-09 株式会社ディスコ ウェーハの加工方法
CN100399540C (zh) * 2005-08-30 2008-07-02 中美矽晶制品股份有限公司 复合晶片结构的制造方法
US20070111480A1 (en) * 2005-11-16 2007-05-17 Denso Corporation Wafer product and processing method therefor
US20070155131A1 (en) * 2005-12-21 2007-07-05 Intel Corporation Method of singulating a microelectronic wafer
JP2007242787A (ja) * 2006-03-07 2007-09-20 Disco Abrasive Syst Ltd ウエーハの分割方法
JP2008042110A (ja) * 2006-08-10 2008-02-21 Disco Abrasive Syst Ltd ウエーハの分割方法
JP2008283025A (ja) * 2007-05-11 2008-11-20 Disco Abrasive Syst Ltd ウエーハの分割方法
JP2008294191A (ja) * 2007-05-24 2008-12-04 Disco Abrasive Syst Ltd ウエーハの分割方法
JP5307384B2 (ja) * 2007-12-03 2013-10-02 株式会社ディスコ ウエーハの分割方法
JP5160868B2 (ja) * 2007-12-06 2013-03-13 株式会社ディスコ 基板への改質層形成方法
JP2009200140A (ja) * 2008-02-20 2009-09-03 Disco Abrasive Syst Ltd 半導体チップの製造方法
JP5495511B2 (ja) * 2008-05-27 2014-05-21 株式会社ディスコ ウエーハの分割方法
JP2009290052A (ja) * 2008-05-30 2009-12-10 Disco Abrasive Syst Ltd ウエーハの分割方法
DE102008033352A1 (de) * 2008-07-16 2010-01-21 Concentrix Solar Gmbh Solarzellenchips mit neuer Geometrie und Verfahren zu deren Herstellung
JP2010045117A (ja) * 2008-08-11 2010-02-25 Disco Abrasive Syst Ltd 光デバイスウエーハの加工方法
JP2010045151A (ja) * 2008-08-12 2010-02-25 Disco Abrasive Syst Ltd 光デバイスウエーハの加工方法
KR101571585B1 (ko) * 2008-11-13 2015-11-24 시바우라 메카트로닉스 가부시끼가이샤 기판 처리 장치 및 기판 처리 방법
JP2011129740A (ja) * 2009-12-18 2011-06-30 Disco Abrasive Syst Ltd ウエーハ分割装置およびレーザー加工機
DE102010009015A1 (de) * 2010-02-24 2011-08-25 OSRAM Opto Semiconductors GmbH, 93055 Verfahren zum Herstellen einer Mehrzahl von optoelektronischen Halbleiterchips
JP2011243875A (ja) * 2010-05-20 2011-12-01 Disco Abrasive Syst Ltd サファイアウェーハの分割方法
JP5715370B2 (ja) * 2010-10-08 2015-05-07 株式会社ディスコ 検出方法
JP2012089721A (ja) * 2010-10-21 2012-05-10 Toshiba Corp 半導体装置の製造方法、半導体装置
CN102981374B (zh) * 2012-12-11 2014-08-20 上海现代先进超精密制造中心有限公司 探测板组的胶合方法和夹具
CN103400779B (zh) * 2013-07-09 2014-09-03 程君 一种半导体显示面板的制造方法
JP6017388B2 (ja) * 2013-09-09 2016-11-02 株式会社東芝 半導体装置の製造方法
JP2016174092A (ja) * 2015-03-17 2016-09-29 株式会社ディスコ 光デバイスチップの製造方法
JP6479532B2 (ja) * 2015-03-30 2019-03-06 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2017054843A (ja) 2015-09-07 2017-03-16 株式会社ディスコ ウェーハの加工方法
JP6856335B2 (ja) * 2016-09-06 2021-04-07 株式会社ディスコ 加工装置
JP2018207010A (ja) * 2017-06-07 2018-12-27 株式会社ディスコ デバイスチップの製造方法
CN110524410B (zh) * 2019-09-12 2021-02-26 中国电子科技集团公司第二十六研究所 一种批量加工闪烁体晶条的方法
JP7460386B2 (ja) * 2020-02-14 2024-04-02 株式会社ディスコ 被加工物の加工方法

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US3970819A (en) * 1974-11-25 1976-07-20 International Business Machines Corporation Backside laser dicing system
US4325182A (en) * 1980-08-25 1982-04-20 General Electric Company Fast isolation diffusion
WO1998013862A1 (fr) * 1996-09-24 1998-04-02 Mitsubishi Denki Kabushiki Kaisha Dispositif a semi-conducteur et son procede de fabrication
JP2001284292A (ja) * 2000-03-31 2001-10-12 Toyoda Gosei Co Ltd 半導体ウエハーのチップ分割方法
JP2001313350A (ja) * 2000-04-28 2001-11-09 Sony Corp チップ状電子部品及びその製造方法、並びにその製造に用いる疑似ウエーハ及びその製造方法
JP4659300B2 (ja) * 2000-09-13 2011-03-30 浜松ホトニクス株式会社 レーザ加工方法及び半導体チップの製造方法
JP4617559B2 (ja) * 2000-10-30 2011-01-26 富士電機システムズ株式会社 電力用半導体素子の製造方法
JP2002222777A (ja) * 2001-01-29 2002-08-09 Murata Mfg Co Ltd 半導体装置及びその製造方法
JP3866978B2 (ja) * 2002-01-08 2007-01-10 富士通株式会社 半導体装置の製造方法
JP2004079889A (ja) * 2002-08-21 2004-03-11 Disco Abrasive Syst Ltd 半導体ウェーハの製造方法
DE10256247A1 (de) * 2002-11-29 2004-06-09 Andreas Jakob Schichtverbund aus einer Trennschicht und einer Schutzschicht zum Schutze und zum Handling eines Wafers beim Dünnen, bei der Rückseitenbeschichtung und beim Vereinzeln
US6936497B2 (en) * 2002-12-24 2005-08-30 Intel Corporation Method of forming electronic dies wherein each die has a layer of solid diamond
JP2005019525A (ja) * 2003-06-24 2005-01-20 Disco Abrasive Syst Ltd 半導体チップの製造方法

Also Published As

Publication number Publication date
CN100416767C (zh) 2008-09-03
DE102004038339B4 (de) 2011-04-07
US20050037541A1 (en) 2005-02-17
US7179724B2 (en) 2007-02-20
JP2005064232A (ja) 2005-03-10
CN1581443A (zh) 2005-02-16
JP4554901B2 (ja) 2010-09-29
DE102004038339A1 (de) 2005-03-17

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