SE8403302D0 - MANUFACTURING TRANSISTOR - Google Patents

MANUFACTURING TRANSISTOR

Info

Publication number
SE8403302D0
SE8403302D0 SE8403302A SE8403302A SE8403302D0 SE 8403302 D0 SE8403302 D0 SE 8403302D0 SE 8403302 A SE8403302 A SE 8403302A SE 8403302 A SE8403302 A SE 8403302A SE 8403302 D0 SE8403302 D0 SE 8403302D0
Authority
SE
Sweden
Prior art keywords
mosfets
manufacturing transistor
fabricating
aperture
image
Prior art date
Application number
SE8403302A
Other languages
Swedish (sv)
Other versions
SE8403302L (en
Inventor
A C Ipri
L L Jastrzebski
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of SE8403302D0 publication Critical patent/SE8403302D0/en
Publication of SE8403302L publication Critical patent/SE8403302L/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

A method for fabricating a plurality of relatively closely spaced MOSFETs is disclosed. A field oxide (54) having a plurality of vertical-walled apertures (56) is formed on the surface (52) of a silicon substrate (50), and a monocrystalline semiconductor region (58) is grown epitaxially within each aperture. MOSFETs are then formed in these semiconductor regions. <IMAGE>
SE8403302A 1983-06-22 1984-06-20 MANUFACTURING TRANSISTOR SE8403302L (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US50680483A 1983-06-22 1983-06-22

Publications (2)

Publication Number Publication Date
SE8403302D0 true SE8403302D0 (en) 1984-06-20
SE8403302L SE8403302L (en) 1984-12-23

Family

ID=24016078

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8403302A SE8403302L (en) 1983-06-22 1984-06-20 MANUFACTURING TRANSISTOR

Country Status (5)

Country Link
DE (1) DE3422495A1 (en)
FR (1) FR2549294A1 (en)
GB (1) GB2142185A (en)
IT (1) IT1174192B (en)
SE (1) SE8403302L (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4942449A (en) * 1988-03-28 1990-07-17 General Electric Company Fabrication method and structure for field isolation in field effect transistors on integrated circuit chips
KR890017771A (en) * 1988-05-20 1989-12-18 강진구 Semiconductor device manufacturing method
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2059116C3 (en) * 1970-12-01 1974-11-21 Siemens Ag, 1000 Berlin Und 8000 Muenchen Method for manufacturing a semiconductor component
US3861968A (en) * 1972-06-19 1975-01-21 Ibm Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition
US4536842A (en) * 1982-03-31 1985-08-20 Tokyo Shibaura Denki Kabushiki Kaisha System for measuring interfloor traffic for group control of elevator cars

Also Published As

Publication number Publication date
SE8403302L (en) 1984-12-23
DE3422495A1 (en) 1985-01-10
IT8421384A1 (en) 1985-12-13
GB2142185A (en) 1985-01-09
IT8421384A0 (en) 1984-06-13
GB8414923D0 (en) 1984-07-18
FR2549294A1 (en) 1985-01-18
IT1174192B (en) 1987-07-01

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Legal Events

Date Code Title Description
NAV Patent application has lapsed

Ref document number: 8403302-6

Effective date: 19860527