SE8306071D0 - PUT FOR IMAGE SILICON Dioxide - Google Patents

PUT FOR IMAGE SILICON Dioxide

Info

Publication number
SE8306071D0
SE8306071D0 SE8306071A SE8306071A SE8306071D0 SE 8306071 D0 SE8306071 D0 SE 8306071D0 SE 8306071 A SE8306071 A SE 8306071A SE 8306071 A SE8306071 A SE 8306071A SE 8306071 D0 SE8306071 D0 SE 8306071D0
Authority
SE
Sweden
Prior art keywords
silicon dioxide
layer
high dielectric
dielectric strength
image silicon
Prior art date
Application number
SE8306071A
Other languages
Swedish (sv)
Other versions
SE500975C2 (en
SE8306071L (en
Inventor
L Faraone
R D Vibronek
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of SE8306071D0 publication Critical patent/SE8306071D0/en
Publication of SE8306071L publication Critical patent/SE8306071L/en
Publication of SE500975C2 publication Critical patent/SE500975C2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32105—Oxidation of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

A method of forming a layer of silicon dioxide having a high dielectric strength and low leakage current comprises depositing an amorphous silicon layer on a substrate at a temperature of less than 580 DEG C and oxidizing a portion of the amorphous silicon layer. This silicon dioxide layer may be incorporated in a semiconductor device having a high dielectric strength.
SE8306071A 1982-11-12 1983-11-04 Methods of preparing an insulating dielectric layer of silica on a silicon layer by precipitation of an amorphous silicon layer on a substrate at a temperature lower than about 580 degrees C SE500975C2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US44137282A 1982-11-12 1982-11-12

Publications (3)

Publication Number Publication Date
SE8306071D0 true SE8306071D0 (en) 1983-11-04
SE8306071L SE8306071L (en) 1984-05-13
SE500975C2 SE500975C2 (en) 1994-10-10

Family

ID=23752622

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8306071A SE500975C2 (en) 1982-11-12 1983-11-04 Methods of preparing an insulating dielectric layer of silica on a silicon layer by precipitation of an amorphous silicon layer on a substrate at a temperature lower than about 580 degrees C

Country Status (6)

Country Link
JP (1) JPH06101466B2 (en)
DE (1) DE3340583A1 (en)
FR (1) FR2536208B1 (en)
GB (1) GB2131407B (en)
IT (1) IT1171798B (en)
SE (1) SE500975C2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4814291A (en) * 1986-02-25 1989-03-21 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making devices having thin dielectric layers
US4874716A (en) * 1986-04-01 1989-10-17 Texas Instrument Incorporated Process for fabricating integrated circuit structure with extremely smooth polysilicone dielectric interface
EP0281233A1 (en) * 1987-01-30 1988-09-07 AT&T Corp. Improved formation of dielectric on deposited silicon
US5851871A (en) * 1987-12-23 1998-12-22 Sgs-Thomson Microelectronics, S.R.L. Process for manufacturing integrated capacitors in MOS technology
EP0608503B1 (en) * 1989-02-14 1997-05-28 Seiko Epson Corporation A semiconductor device and its manufacturing method
EP0545585A3 (en) * 1991-12-03 1996-11-06 American Telephone & Telegraph Integrated circuit fabrication comprising a locos process
US5712177A (en) * 1994-08-01 1998-01-27 Motorola, Inc. Method for forming a reverse dielectric stack
US5665620A (en) * 1994-08-01 1997-09-09 Motorola, Inc. Method for forming concurrent top oxides using reoxidized silicon in an EPROM
US6635110B1 (en) * 1999-06-25 2003-10-21 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
CN112992672B (en) * 2019-12-16 2022-10-14 山东有研半导体材料有限公司 Preparation method of silicon-based silicon dioxide back sealing film

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3900345A (en) * 1973-08-02 1975-08-19 Motorola Inc Thin low temperature epi regions by conversion of an amorphous layer
JPS5910060B2 (en) * 1976-03-01 1984-03-06 株式会社日立製作所 Manufacturing method of semiconductor device
IT1089298B (en) * 1977-01-17 1985-06-18 Mostek Corp PROCEDURE FOR MANUFACTURING A SEMICONDUCTIVE DEVICE
US4166919A (en) * 1978-09-25 1979-09-04 Rca Corporation Amorphous silicon solar cell allowing infrared transmission
JPS55115341A (en) * 1979-02-28 1980-09-05 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device
JPS5676537A (en) * 1979-11-27 1981-06-24 Fujitsu Ltd Manufacture of semiconductor device
US4479831A (en) * 1980-09-15 1984-10-30 Burroughs Corporation Method of making low resistance polysilicon gate transistors and low resistance interconnections therefor via gas deposited in-situ doped amorphous layer and heat-treatment
US4358326A (en) * 1980-11-03 1982-11-09 International Business Machines Corporation Epitaxially extended polycrystalline structures utilizing a predeposit of amorphous silicon with subsequent annealing
US4441249A (en) * 1982-05-26 1984-04-10 Bell Telephone Laboratories, Incorporated Semiconductor integrated circuit capacitor

Also Published As

Publication number Publication date
DE3340583A1 (en) 1984-05-17
SE500975C2 (en) 1994-10-10
IT1171798B (en) 1987-06-10
GB2131407B (en) 1987-02-04
DE3340583C2 (en) 1993-04-29
JPH06101466B2 (en) 1994-12-12
GB8329380D0 (en) 1983-12-07
SE8306071L (en) 1984-05-13
FR2536208A1 (en) 1984-05-18
GB2131407A (en) 1984-06-20
JPS59103347A (en) 1984-06-14
IT8323691A0 (en) 1983-11-11
FR2536208B1 (en) 1987-03-20

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