RU2015136239A - Архитектура создания гибких корпусов - Google Patents
Архитектура создания гибких корпусов Download PDFInfo
- Publication number
- RU2015136239A RU2015136239A RU2015136239A RU2015136239A RU2015136239A RU 2015136239 A RU2015136239 A RU 2015136239A RU 2015136239 A RU2015136239 A RU 2015136239A RU 2015136239 A RU2015136239 A RU 2015136239A RU 2015136239 A RU2015136239 A RU 2015136239A
- Authority
- RU
- Russia
- Prior art keywords
- crystal
- substrate
- layer
- flexible
- crystals
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5387—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73259—Bump and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/822—Applying energy for connecting
- H01L2224/82201—Compression bonding
- H01L2224/82203—Thermocompression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Claims (55)
1. Способ, содержащий этапы, на которых:
заделывают некоторое множество кремниевых кристаллов в гибкую подложку;
формируют гибкий прокладочный слой поверх заделанных кристаллов;
формируют тонкопленочный теплораспространяющий слой поверх подложки, противоположный гибкому прокладочному слою;
придают форму подложке с кристаллами и прокладкой; и
отверждают подложку, имеющую приданную форму.
2. Корпус, содержащий:
некоторое множество кремниевых кристаллов, заделанных в гибкой подложке;
гибкий прокладочный слой поверх заделанных кристаллов;
тонкопленочный теплораспространяющий слой поверх подложки, противоположный гибкому прокладочному слою,
причем гибкой подложке с кристаллами и прокладкой придана искривленная форма, и гибкая подложка отверждена так, что гибкая подложка сохраняет свою форму.
3. Корпус по п. 2, в котором гибкая прокладка содержит эластомер, несущий металлический слой.
4. Корпус по п. 2, в котором гибкая прокладка содержит множество чередующихся металлических и диэлектрических слоев.
5. Корпус по п. 2, в котором тонкопленочный теплораспространяющий слой содержит композит на основе меди.
6. Корпус по п. 2, дополнительно содержащий тонкопленочный теплораспространяющий слой поверх второй подложки, противоположный гибкой прокладке.
7. Электронная вычислительная система, содержащая:
источник электропитания;
устройство отображения; и
полупроводниковый модуль вычислительного устройства, имеющий некоторое множество кремниевых кристаллов, заделанных в гибкую подложку, гибкий прокладочный слой поверх заделанных кристаллов, и тонкопленочный теплораспространяющий слой поверх подложки, противоположный гибкому прокладочному слою, причем гибкой подложке с кристаллами и прокладкой придана искривленная форма, и гибкая подложка отверждена так, что гибкая подложка сохраняет свою форму.
8. Способ, содержащий этапы, на которых:
прикрепляют некоторое множество кристаллов к подложке;
заформовывают прикрепленные кристаллы;
формируют металлические контактные площадки и трассировку на формовочном компаунде; и
соединяют, по меньшей мере, один кристалл из этого множества кристаллов со сформированными металлическими контактными площадками и трассировкой.
9. Корпус, содержащий:
некоторый первый кристалл;
некоторый первый слой формовочного компаунда поверх первого кристалла;
слой межсоединений поверх первого слоя формовочного компаунда;
некоторый второй кристалл поверх этого слоя межсоединений и имеющий электрическое сопряжение с этим слоем межсоединений; и
некоторый второй слой формовочного компаунда поверх второго кристалла.
10. Корпус по п. 9, в котором первый кристалл имеет электрическое сопряжение с этим слоем межсоединений через проходящее через кремний сквозное отверстие в первом кристалле, которое простирается от верхней поверхности первого кристалла к схемам внутри первого кристалла, и второй кристалл имеет электрическое сопряжение с этим слоем межсоединений через монтажные площадки, сформированные на донной части второго кристалла.
11. Корпус по п. 9, дополнительно содержащий гибкую подложку под первым кристаллом, при этом гибкая подложка является теплопроводной и имеет тепловое сопряжение с первым кристаллом.
12. Корпус по п. 9, в котором второй кристалл не находится над первым кристаллом, и второй кристалл смещен от первого кристалла в боковом направлении.
13. Корпус по п. 9, дополнительно содержащий область электрического контакта поверх первого формовочного компаунда, сопряженную со слоем межсоединений, для соединения второго кристалла с внешним устройством.
14. Электронная вычислительная система, содержащая:
источник электропитания;
устройство отображения; и
полупроводниковый модуль вычислительного устройства, имеющий некоторый первый кристалл, некоторый первый слой формовочного компаунда поверх первого кристалла, слой межсоединений поверх первого слоя формовочного некоторый второй кристалл поверх этого слоя межсоединений и имеющий электрическое сопряжение с этим слоем межсоединений, и некоторый второй слой формовочного компаунда поверх второго кристалла.
15. Способ, содержащий этапы, на которых:
прикрепляют некоторое множество кристаллов к подложке;
заформовывают прикрепленные кристаллы и подложку посредством теплопроводного формовочного компаунда; и
наносят поверх формовочного компаунда теплопроводный слой в качестве теплораспределителя.
16. Корпус, содержащий:
подложку;
кристалл на подложке и соединенный с подложкой;
теплопроводный формовочный компаунд поверх кристалла и подложки; и
теплораспределитель поверх формовочного компаунда.
17. Корпус по п. 16, в котором формовочный компаунд наполнен теплопроводными материалами.
18. Корпус по п. 16, в котором теплораспределитель выполнен из теплопроводного материала, такого как медь или алюминий.
19. Корпус по п. 16, дополнительно содержащий теплопроводное сквозное отверстие через формованную часть для того, чтобы соединять теплораспределитель с подложкой.
20. Электронная вычислительная система, содержащая:
источник электропитания;
устройство отображения; и
полупроводниковый модуль вычислительного устройства, имеющий: подложку, кристалл на подложке и соединенный с подложкой, теплопроводный формовочный компаунд поверх кристалла и подложки и теплораспределитель поверх формовочного компаунда;
второй кристалл.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2014/057648 WO2016048347A1 (en) | 2014-09-26 | 2014-09-26 | Flexible packaging architecture |
Publications (2)
Publication Number | Publication Date |
---|---|
RU2015136239A true RU2015136239A (ru) | 2017-03-03 |
RU2623697C2 RU2623697C2 (ru) | 2017-06-28 |
Family
ID=55581664
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
RU2015136239A RU2623697C2 (ru) | 2014-09-26 | 2014-09-26 | Архитектура создания гибких корпусов |
Country Status (9)
Country | Link |
---|---|
US (1) | US10396038B2 (ru) |
EP (1) | EP3022765A4 (ru) |
JP (1) | JP6152486B2 (ru) |
KR (2) | KR102157942B1 (ru) |
CN (1) | CN105659375B (ru) |
BR (1) | BR112015020625A2 (ru) |
RU (1) | RU2623697C2 (ru) |
TW (1) | TWI634630B (ru) |
WO (1) | WO2016048347A1 (ru) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10553515B2 (en) | 2016-04-28 | 2020-02-04 | Intel Corporation | Integrated circuit structures with extended conductive pathways |
US10256219B2 (en) | 2016-09-08 | 2019-04-09 | Intel Corporation | Forming embedded circuit elements in semiconductor package assembles and structures formed thereby |
WO2018063196A1 (en) * | 2016-09-28 | 2018-04-05 | Intel IP Corporation | Systems, methods, and apparatuses for implementing reduced height semiconductor packages for mobile electronics |
US11276667B2 (en) * | 2016-12-31 | 2022-03-15 | Intel Corporation | Heat removal between top and bottom die interface |
DE102017203381A1 (de) * | 2017-03-02 | 2018-04-05 | Robert Bosch Gmbh | Mikroelektronische Bauelementanordnung und entsprechendes Herstellungsverfahren |
US10515927B2 (en) * | 2017-04-21 | 2019-12-24 | Applied Materials, Inc. | Methods and apparatus for semiconductor package processing |
US10347574B2 (en) * | 2017-09-28 | 2019-07-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated fan-out packages |
US10734318B2 (en) * | 2017-11-14 | 2020-08-04 | Intel Corporation | Folded semiconductor package architectures and methods of assembling same |
KR102460720B1 (ko) | 2017-11-16 | 2022-10-31 | 삼성전자주식회사 | 반도체 소자 패키지를 포함하는 전자 장치 |
KR102016449B1 (ko) * | 2017-12-01 | 2019-09-02 | 한국생산기술연구원 | 복합구조의 플렉서블한 전자모듈 및 이의 제조방법 |
KR20200067607A (ko) * | 2018-12-04 | 2020-06-12 | 삼성전기주식회사 | 인쇄회로기판 |
KR102653499B1 (ko) | 2019-06-28 | 2024-03-29 | 삼성전자주식회사 | 반도체 패키지 |
CN111463187B (zh) * | 2020-04-13 | 2022-03-18 | 清华大学 | 基于***级封装的柔性装置及其制造方法 |
CN111463189B (zh) * | 2020-04-13 | 2022-03-18 | 清华大学 | 基于***级封装的柔性装置及其制造方法 |
DE102020206769B3 (de) | 2020-05-29 | 2021-06-10 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein | Mikroelektronische anordnung und verfahren zur herstellung derselben |
US20220157680A1 (en) * | 2020-11-19 | 2022-05-19 | Apple Inc. | Flexible Package Architecture Concept in Fanout |
CN113555326A (zh) * | 2021-06-03 | 2021-10-26 | 珠海越亚半导体股份有限公司 | 可润湿侧面的封装结构与其制作方法及垂直封装模块 |
CN114093770A (zh) | 2021-10-27 | 2022-02-25 | 珠海越亚半导体股份有限公司 | 埋嵌封装结构及其制作方法 |
Family Cites Families (103)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2949283A (en) | 1956-05-11 | 1960-08-16 | Millard F Smith | Apparatus for heat transfer |
US3307783A (en) | 1964-03-04 | 1967-03-07 | John A Wiebelt | Thermostatic surface |
US3359145A (en) | 1964-12-28 | 1967-12-19 | Monsanto Res Corp | Electrically conducting adhesive |
US3762946A (en) | 1971-10-21 | 1973-10-02 | Minnesota Mining & Mfg | Small particle loaded electrically conductive adhesive tape |
US4170677A (en) | 1977-11-16 | 1979-10-09 | The United States Of America As Represented By The Secretary Of The Army | Anisotropic resistance bonding technique |
US4548862A (en) | 1984-09-04 | 1985-10-22 | Minnesota Mining And Manufacturing Company | Flexible tape having bridges of electrically conductive particles extending across its pressure-sensitive adhesive layer |
US4644101A (en) | 1985-12-11 | 1987-02-17 | At&T Bell Laboratories | Pressure-responsive position sensor |
US4737112A (en) | 1986-09-05 | 1988-04-12 | American Telephone And Telegraph Company, At&T Bell Laboratories | Anisotropically conductive composite medium |
SU1489397A1 (ru) | 1987-03-06 | 1995-04-20 | Отделение Всесоюзного научно-исследовательского института электромеханики | Магниточувствительный датчик для бесконтактного двигателя |
US5471151A (en) | 1990-02-14 | 1995-11-28 | Particle Interconnect, Inc. | Electrical interconnect using particle enhanced joining of metal surfaces |
US5126286A (en) | 1990-10-05 | 1992-06-30 | Micron Technology, Inc. | Method of manufacturing edge connected semiconductor die |
US5353498A (en) * | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
US5455445A (en) | 1994-01-21 | 1995-10-03 | Kulite Semiconductor Products, Inc. | Multi-level semiconductor structures having environmentally isolated elements |
KR100389743B1 (ko) | 1994-01-27 | 2003-10-04 | 록타이트(아일랜드) 리미티드 | 두세트의전도체사이에이방성전도성경로및결합을제공하기위한조성물및방법 |
TW277152B (ru) | 1994-05-10 | 1996-06-01 | Hitachi Chemical Co Ltd | |
US5509815A (en) | 1994-06-08 | 1996-04-23 | At&T Corp. | Solder medium for circuit interconnection |
JP2692648B2 (ja) | 1995-06-01 | 1997-12-17 | 日本電気株式会社 | 屋外機器用筐体 |
US5668409A (en) | 1995-06-05 | 1997-09-16 | Harris Corporation | Integrated circuit with edge connections and method |
US5661042A (en) | 1995-08-28 | 1997-08-26 | Motorola, Inc. | Process for electrically connecting electrical devices using a conductive anisotropic material |
JPH11514300A (ja) | 1995-10-06 | 1999-12-07 | ブラウン ユニバーシティ リサーチ ファウンデーション | はんだ付けの方法及び配合物 |
US5786979A (en) | 1995-12-18 | 1998-07-28 | Douglass; Barry G. | High density inter-chip connections by electromagnetic coupling |
US5916641A (en) | 1996-08-01 | 1999-06-29 | Loctite (Ireland) Limited | Method of forming a monolayer of particles |
US6479890B1 (en) * | 1998-01-22 | 2002-11-12 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. | Semiconductor microsystem embedded in flexible foil |
US6016250A (en) | 1998-01-30 | 2000-01-18 | Credence Systems Corporation | Self-balancing thermal control device for integrated circuits |
US5975922A (en) | 1998-03-09 | 1999-11-02 | Lucent Technologies Inc. | Device containing directionally conductive composite medium |
US5973923A (en) | 1998-05-28 | 1999-10-26 | Jitaru; Ionel | Packaging power converters |
US6524115B1 (en) * | 1999-08-20 | 2003-02-25 | 3M Innovative Properties Company | Compliant interconnect assembly |
US6264476B1 (en) | 1999-12-09 | 2001-07-24 | High Connection Density, Inc. | Wire segment based interposer for high frequency electrical connection |
US6219243B1 (en) | 1999-12-14 | 2001-04-17 | Intel Corporation | Heat spreader structures for enhanced heat removal from both sides of chip-on-flex packaged units |
US6330157B1 (en) | 1999-12-21 | 2001-12-11 | International Business Machines Corporation | Variable thermal exchanger and method thereof |
JP4604307B2 (ja) | 2000-01-27 | 2011-01-05 | ソニー株式会社 | 撮像装置とその製造方法及びカメラシステム |
US6325552B1 (en) | 2000-02-14 | 2001-12-04 | Cisco Technology, Inc. | Solderless optical transceiver interconnect |
US6586836B1 (en) * | 2000-03-01 | 2003-07-01 | Intel Corporation | Process for forming microelectronic packages and intermediate structures formed therewith |
US6611050B1 (en) | 2000-03-30 | 2003-08-26 | International Business Machines Corporation | Chip edge interconnect apparatus and method |
US6346750B1 (en) | 2000-04-28 | 2002-02-12 | Micron Technology, Inc. | Resistance-reducing conductive adhesives for attachment of electronic components |
US7033184B2 (en) | 2001-06-14 | 2006-04-25 | Paricon Technologies Corporation | Electrical interconnect device incorporating anisotropically conductive elastomer and flexible circuit |
US6628522B2 (en) | 2001-08-29 | 2003-09-30 | Intel Corporation | Thermal performance enhancement of heat sinks using active surface features for boundary layer manipulations |
US6574114B1 (en) | 2002-05-02 | 2003-06-03 | 3M Innovative Properties Company | Low contact force, dual fraction particulate interconnect |
EP1553621A4 (en) | 2002-08-09 | 2005-08-10 | Jsr Corp | CONNECTORS WITH ANISOTROPIC CONDUCTIVITY, CONDUCTIVE PASTE COMPOSITION, SONY MEMBER, WAFER INSPECTION DEVICE AND WAFER SEARCHING METHOD |
WO2004107441A1 (en) | 2003-05-28 | 2004-12-09 | Infineon Technologies Ag | An integrated circuit package employing a flexible substrate |
US7439158B2 (en) | 2003-07-21 | 2008-10-21 | Micron Technology, Inc. | Strained semiconductor by full wafer bonding |
US7612443B1 (en) | 2003-09-04 | 2009-11-03 | University Of Notre Dame Du Lac | Inter-chip communication |
DE20317436U1 (de) | 2003-11-10 | 2004-01-22 | Magcode Ag | Elektrische Verbindungsvorrichtung |
US7180173B2 (en) | 2003-11-20 | 2007-02-20 | Taiwan Semiconductor Manufacturing Co. Ltd. | Heat spreader ball grid array (HSBGA) design for low-k integrated circuits (IC) |
US7215018B2 (en) | 2004-04-13 | 2007-05-08 | Vertical Circuits, Inc. | Stacked die BGA or LGA component assembly |
JP2005303099A (ja) | 2004-04-14 | 2005-10-27 | Hitachi High-Technologies Corp | プラズマ処理装置およびプラズマ処理方法 |
US7309838B2 (en) | 2004-07-15 | 2007-12-18 | Oki Electric Industry Co., Ltd. | Multi-layered circuit board assembly with improved thermal dissipation |
CN1731915B (zh) | 2004-08-04 | 2010-11-10 | 冲电气工业株式会社 | 多层电路板装置 |
JP2006108431A (ja) * | 2004-10-06 | 2006-04-20 | Sharp Corp | 半導体装置 |
US20060091538A1 (en) | 2004-11-04 | 2006-05-04 | Kabadi Ashok N | Low profile and tight pad-pitch land-grid-array (LGA) socket |
JP4800606B2 (ja) * | 2004-11-19 | 2011-10-26 | Okiセミコンダクタ株式会社 | 素子内蔵基板の製造方法 |
US7525194B2 (en) | 2005-07-27 | 2009-04-28 | Palo Alto Research Center Incorporated | System including self-assembled interconnections |
US7662708B2 (en) | 2005-07-27 | 2010-02-16 | Palo Alto Research Center Incorporated | Self-assembled interconnection particles |
US20070065984A1 (en) * | 2005-09-22 | 2007-03-22 | Lau Daniel K | Thermal enhanced package for block mold assembly |
US20070158807A1 (en) | 2005-12-29 | 2007-07-12 | Daoqiang Lu | Edge interconnects for die stacking |
FI119456B (fi) | 2006-01-31 | 2008-11-14 | Polar Electro Oy | Liitinmekanismi |
US7999383B2 (en) | 2006-07-21 | 2011-08-16 | Bae Systems Information And Electronic Systems Integration Inc. | High speed, high density, low power die interconnect system |
EP1936468A1 (en) | 2006-12-22 | 2008-06-25 | Siemens Aktiengesellschaft | Bi-metallic elements for adjusting a cooling channel |
KR20080069484A (ko) | 2007-01-23 | 2008-07-28 | 삼성전자주식회사 | 플렉시블 기판을 이용한 적층형 반도체 패키지 |
US8623265B2 (en) | 2007-02-06 | 2014-01-07 | World Properties, Inc. | Conductive polymer foams, method of manufacture, and articles thereof |
CN101600758B (zh) | 2007-02-06 | 2012-07-04 | 环球产权公司 | 导电聚合物泡沫及其制造方法和用途 |
JP4363450B2 (ja) | 2007-02-23 | 2009-11-11 | 日本電気株式会社 | ディスクアレイ装置 |
US7675164B2 (en) | 2007-03-06 | 2010-03-09 | International Business Machines Corporation | Method and structure for connecting, stacking, and cooling chips on a flexible carrier |
JP4319229B2 (ja) * | 2007-03-29 | 2009-08-26 | シャープ株式会社 | 半導体装置 |
US7696013B2 (en) | 2007-04-19 | 2010-04-13 | Eastman Kodak Company | Connecting microsized devices using ablative films |
US8445325B2 (en) | 2007-05-04 | 2013-05-21 | Stats Chippac, Ltd. | Package-in-package using through-hole via die on saw streets |
DE102007027901A1 (de) | 2007-06-18 | 2008-12-24 | Robert Bosch Gmbh | Leistungselektronikmodul |
US20080315388A1 (en) | 2007-06-22 | 2008-12-25 | Shanggar Periaman | Vertical controlled side chip connection for 3d processor package |
US7868445B2 (en) | 2007-06-25 | 2011-01-11 | Epic Technologies, Inc. | Integrated structures and methods of fabrication thereof with fan-out metallization on a chips-first chip layer |
US20110024890A1 (en) | 2007-06-29 | 2011-02-03 | Stats Chippac, Ltd. | Stackable Package By Using Internal Stacking Modules |
US7550901B2 (en) | 2007-09-27 | 2009-06-23 | Intel Corporation | Piezoelectric fan, cooling device containing same, and method of cooling a microelectronic device using same |
US20090321044A1 (en) | 2008-06-30 | 2009-12-31 | Alcatel-Lucent Technologies Inc. | Active heat sink designs |
KR101486984B1 (ko) | 2008-10-30 | 2015-01-30 | 삼성전자주식회사 | 가변 저항 메모리 소자 및 그 형성방법 |
KR20100058909A (ko) | 2008-11-25 | 2010-06-04 | 삼성전자주식회사 | 가변저항 메모리 소자의 형성방법 |
EP2382661B1 (en) | 2008-12-30 | 2021-08-11 | STMicroelectronics Srl | Integrated electronic device with transceiving antenna and magnetic interconnection |
US7989942B2 (en) | 2009-01-20 | 2011-08-02 | Altera Corporation | IC package with capacitors disposed on an interposal layer |
TWI462676B (zh) | 2009-02-13 | 2014-11-21 | Senju Metal Industry Co | The solder bumps for the circuit substrate are formed using the transfer sheet |
US20100270668A1 (en) | 2009-04-28 | 2010-10-28 | Wafer-Level Packaging Portfolio Llc | Dual Interconnection in Stacked Memory and Controller Module |
US8236610B2 (en) | 2009-05-26 | 2012-08-07 | International Business Machines Corporation | Forming semiconductor chip connections |
CN101907266A (zh) * | 2009-06-05 | 2010-12-08 | 旭丽电子(广州)有限公司 | 具有防水功能的可挠式光束导引模块 |
GB0915473D0 (en) | 2009-09-07 | 2009-10-07 | St Microelectronics Res & Dev | Improvements in or relating to CMOS sensors |
KR20110052880A (ko) | 2009-11-13 | 2011-05-19 | 삼성전자주식회사 | 플립 칩 패키지 및 그의 제조 방법 |
KR20110054348A (ko) * | 2009-11-17 | 2011-05-25 | 삼성전기주식회사 | 전자소자 내장형 인쇄회로기판 및 그 제조방법 |
WO2011064552A1 (en) | 2009-11-30 | 2011-06-03 | Isis Innovation Limited | Conjugates for delivery of biologically active compounds |
JP5381696B2 (ja) | 2009-12-25 | 2014-01-08 | ソニー株式会社 | 回路基板積層モジュールおよび電子機器 |
KR101131289B1 (ko) | 2010-03-08 | 2012-03-30 | 삼성전기주식회사 | 전자부품 내장형 리지드-플렉시블 기판 및 그 제조방법 |
US20110278351A1 (en) | 2010-05-11 | 2011-11-17 | Aleksandar Aleksov | Magnetic particle attachment material |
US8609532B2 (en) | 2010-05-26 | 2013-12-17 | Intel Corporation | Magnetically sintered conductive via |
WO2012002272A1 (ja) * | 2010-06-29 | 2012-01-05 | シャープ株式会社 | 可撓性表示装置および可撓性表示装置の製造方法 |
KR101191976B1 (ko) | 2010-10-26 | 2012-10-17 | 한국생산기술연구원 | 플렉서블 임베디드 제조를 위한 연속식 칩 본딩용 가변직경 롤을 이용하는 연속적 칩 본딩 장치 |
JP2012114334A (ja) | 2010-11-26 | 2012-06-14 | Nec Casio Mobile Communications Ltd | キャビティ基板を備える半導体モジュール、その不良解析方法、及び該半導体モジュールの製造方法 |
KR20120079742A (ko) | 2011-01-05 | 2012-07-13 | 삼성전자주식회사 | 폴디드 적층 패키지 및 그 제조방법 |
US9155881B2 (en) | 2011-05-06 | 2015-10-13 | Iridium Medical Technology Co, Ltd. | Non-planar chip assembly |
JP2012256737A (ja) | 2011-06-09 | 2012-12-27 | Sony Corp | 半導体装置及び半導体装置の製造方法 |
JP5893917B2 (ja) | 2011-12-28 | 2016-03-23 | 日東電工株式会社 | 電子部品用樹脂シート、電子部品用樹脂シートの製造方法、及び、半導体装置の製造方法 |
JP6171280B2 (ja) | 2012-07-31 | 2017-08-02 | 味の素株式会社 | 半導体装置の製造方法 |
KR102031731B1 (ko) * | 2012-12-18 | 2019-10-14 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조방법 |
KR102110984B1 (ko) | 2013-03-04 | 2020-05-14 | 삼성전자주식회사 | 적층형 반도체 패키지 |
US8998454B2 (en) * | 2013-03-15 | 2015-04-07 | Sumitomo Electric Printed Circuits, Inc. | Flexible electronic assembly and method of manufacturing the same |
KR20140130922A (ko) | 2013-05-02 | 2014-11-12 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
KR102105902B1 (ko) * | 2013-05-20 | 2020-05-04 | 삼성전자주식회사 | 방열 부재를 갖는 적층 반도체 패키지 |
KR20150070749A (ko) * | 2013-12-17 | 2015-06-25 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
KR101833155B1 (ko) | 2013-12-19 | 2018-02-27 | 인텔 코포레이션 | 플렉시블하게-랩핑된 집적 회로 다이 |
-
2014
- 2014-09-26 KR KR1020187000945A patent/KR102157942B1/ko active IP Right Grant
- 2014-09-26 JP JP2016550460A patent/JP6152486B2/ja active Active
- 2014-09-26 BR BR112015020625A patent/BR112015020625A2/pt unknown
- 2014-09-26 RU RU2015136239A patent/RU2623697C2/ru not_active IP Right Cessation
- 2014-09-26 CN CN201480010686.0A patent/CN105659375B/zh active Active
- 2014-09-26 WO PCT/US2014/057648 patent/WO2016048347A1/en active Application Filing
- 2014-09-26 KR KR1020157023069A patent/KR20160047423A/ko active Search and Examination
- 2014-09-26 EP EP14882778.5A patent/EP3022765A4/en not_active Withdrawn
- 2014-09-26 US US15/505,901 patent/US10396038B2/en active Active
-
2015
- 2015-08-25 TW TW104127741A patent/TWI634630B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
WO2016048347A1 (en) | 2016-03-31 |
JP6152486B2 (ja) | 2017-06-21 |
EP3022765A4 (en) | 2017-04-26 |
US10396038B2 (en) | 2019-08-27 |
US20170345763A1 (en) | 2017-11-30 |
BR112015020625A2 (pt) | 2017-07-18 |
KR102157942B1 (ko) | 2020-09-21 |
TW201622081A (zh) | 2016-06-16 |
CN105659375A (zh) | 2016-06-08 |
TWI634630B (zh) | 2018-09-01 |
CN105659375B (zh) | 2021-08-24 |
EP3022765A1 (en) | 2016-05-25 |
KR20180008887A (ko) | 2018-01-24 |
JP2016539512A (ja) | 2016-12-15 |
RU2623697C2 (ru) | 2017-06-28 |
KR20160047423A (ko) | 2016-05-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
RU2015136239A (ru) | Архитектура создания гибких корпусов | |
JP2016054298A5 (ja) | 半導体装置および電子機器 | |
JP2013222966A5 (ru) | ||
DE602005000085D1 (de) | Epoxidharzzusammensetzung zum einkapseln von Halbleitern, Halbleiter davon und Herstellungsverfahren von Halbleitern | |
JP2015099802A5 (ru) | ||
JP2014179611A5 (ru) | ||
JP2011171287A5 (ja) | フレキシブル発光装置、電子機器 | |
EP4276892A3 (en) | Semiconductor element, method for producing same, and electronic device | |
SG11201907932UA (en) | Semiconductor memory device | |
EP2988325A3 (en) | Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof | |
US10734301B2 (en) | Semiconductor package with floating heat spreader and process for making the same | |
JP2009105297A5 (ru) | ||
JP2016072492A5 (ru) | ||
JP2017108130A5 (ru) | ||
EP2866257A3 (en) | Printed circuit board and manufacturing method thereof and semiconductor pacakge using the same | |
JP2017017238A5 (ru) | ||
JP2014053603A5 (ru) | ||
JP2020522117A5 (ru) | ||
JP2021057373A5 (ru) | ||
JP2013251545A5 (ru) | ||
JPWO2015104834A1 (ja) | 電力半導体装置 | |
JP2016152399A5 (ru) | ||
JP2015192144A (ja) | フレキシブル基板上の電気回路 | |
CN106068559A (zh) | 绝缘基板及半导体装置 | |
JP2015185773A5 (ru) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | The patent is invalid due to non-payment of fees |
Effective date: 20180927 |