NL8300045A - Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn. - Google Patents

Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn. Download PDF

Info

Publication number
NL8300045A
NL8300045A NL8300045A NL8300045A NL8300045A NL 8300045 A NL8300045 A NL 8300045A NL 8300045 A NL8300045 A NL 8300045A NL 8300045 A NL8300045 A NL 8300045A NL 8300045 A NL8300045 A NL 8300045A
Authority
NL
Netherlands
Prior art keywords
unit
line
gate
requesting
units
Prior art date
Application number
NL8300045A
Other languages
English (en)
Dutch (nl)
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of NL8300045A publication Critical patent/NL8300045A/nl

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/374Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a self-select method with individual priority code comparator
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Software Systems (AREA)
  • Bus Control (AREA)
  • Telephonic Communication Services (AREA)
  • Small-Scale Networks (AREA)
NL8300045A 1982-01-07 1983-01-06 Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn. NL8300045A (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/337,674 US4488218A (en) 1982-01-07 1982-01-07 Dynamic priority queue occupancy scheme for access to a demand-shared bus
US33767482 1982-01-07

Publications (1)

Publication Number Publication Date
NL8300045A true NL8300045A (nl) 1983-08-01

Family

ID=23321528

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8300045A NL8300045A (nl) 1982-01-07 1983-01-06 Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn.

Country Status (8)

Country Link
US (1) US4488218A (de)
KR (1) KR880002197B1 (de)
CA (1) CA1193688A (de)
DE (1) DE3300261A1 (de)
FR (1) FR2519442B1 (de)
GB (1) GB2114788B (de)
NL (1) NL8300045A (de)
SE (1) SE450301B (de)

Families Citing this family (65)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4642630A (en) * 1982-12-28 1987-02-10 At&T Bell Laboratories Method and apparatus for bus contention resolution
CA1219091A (en) * 1983-01-10 1987-03-10 Ulrich Killat Method of and arrangement for controlling access to a time-division multiplex message transmission path
EP0121030B1 (de) * 1983-03-29 1987-11-11 International Business Machines Corporation Arbitervorrichtung für die Zuweisung eines gemeinsamen Betriebsmittels an eine ausgewählte Einheit eines Datenverarbeitungssystems
US4593282A (en) * 1983-04-14 1986-06-03 At&T Information Systems Inc. Network protocol for integrating synchronous and asynchronous traffic on a common serial data bus
JPS607538A (ja) * 1983-06-27 1985-01-16 Dainippon Screen Mfg Co Ltd デ−タ転送制御方法
US4569046A (en) * 1983-07-18 1986-02-04 Northern Telecom Limited Method of, and a terminal for, transmitting bytes to a bus
US4626843A (en) * 1983-09-27 1986-12-02 Trw Inc. Multi-master communication bus system with parallel bus request arbitration
US4641266A (en) * 1983-11-28 1987-02-03 At&T Bell Laboratories Access-arbitration scheme
US4941086A (en) * 1984-02-02 1990-07-10 International Business Machines Corporation Program controlled bus arbitration for a distributed array processing system
US4745548A (en) * 1984-02-17 1988-05-17 American Telephone And Telegraph Company, At&T Bell Laboratories Decentralized bus arbitration using distributed arbiters having circuitry for latching lockout signals gated from higher priority arbiters
DE3535436A1 (de) * 1984-10-05 1986-04-10 Mitsubishi Denki K.K., Tokio/Tokyo Arbitrationssystem fuer einen datenbus
US4704606A (en) * 1984-11-13 1987-11-03 American Telephone And Telegraph Company And At&T Information Systems Inc. Variable length packet switching system
US4631534A (en) * 1984-11-13 1986-12-23 At&T Information Systems Inc. Distributed packet switching system
US4656627A (en) * 1984-11-21 1987-04-07 At&T Company Multiphase packet switching system
JPS61141065A (ja) * 1984-12-14 1986-06-28 Mitsubishi Electric Corp 画像表示信号発生装置
US4745600A (en) * 1985-07-09 1988-05-17 Codex Corporation Network collision detection and avoidance apparatus
US5047917A (en) * 1985-07-12 1991-09-10 The California Institute Of Technology Apparatus for intrasystem communications within a binary n-cube including buffer lock bit
US4760515A (en) * 1985-10-28 1988-07-26 International Business Machines Corporation Arbitration apparatus for determining priority of access to a shared bus on a rotating priority basis
US4745598A (en) * 1985-11-27 1988-05-17 General Electric Company Method and apparatus for maintaining a dynamic logical ring in a token passing LAN
US4740956A (en) * 1985-12-30 1988-04-26 Ibm Corporation Linear-space signalling for a circuit-switched network
US4788640A (en) * 1986-01-17 1988-11-29 Intel Corporation Priority logic system
US5283903A (en) * 1986-12-25 1994-02-01 Nec Corporation Priority selector
US5257374A (en) * 1987-11-18 1993-10-26 International Business Machines Corporation Bus flow control mechanism
US5093807A (en) 1987-12-23 1992-03-03 Texas Instruments Incorporated Video frame storage system
US5587962A (en) * 1987-12-23 1996-12-24 Texas Instruments Incorporated Memory circuit accommodating both serial and random access including an alternate address buffer register
EP0324662A3 (de) * 1988-01-15 1990-01-17 EVANS & SUTHERLAND COMPUTER CORPORATION Kreuzschienensystem für gesteuerte Datenübertragung
US4991084A (en) * 1988-02-05 1991-02-05 International Business Machines Corporation N×M round robin order arbitrating switching matrix system
US4965716A (en) * 1988-03-11 1990-10-23 International Business Machines Corporation Fast access priority queue for managing multiple messages at a communications node or managing multiple programs in a multiprogrammed data processor
JP2633900B2 (ja) * 1988-04-22 1997-07-23 株式会社日立製作所 共通バス制御方法
US5377189A (en) * 1989-06-02 1994-12-27 British Telecommunications Public Limited Company Hybrid data communications systems
JPH0387958A (ja) * 1989-06-30 1991-04-12 Nec Corp バスロツク制御方式
EP0426413B1 (de) * 1989-11-03 1997-05-07 Compaq Computer Corporation Multiprozessorarbitrierung in für Einzelprozessor bestimmten Arbitrierungsschemas
FR2654281A1 (fr) * 1989-11-08 1991-05-10 Alcatel Business Systems Procede et dispositif de resolution de contention pour central telephonique a petite ou moyenne capacite.
KR940002905B1 (en) * 1989-12-15 1994-04-07 Ibm Apparatus for conditioning priority arbitration in buffered direct memory addressing
US5414818A (en) * 1990-04-06 1995-05-09 Mti Technology Corporation Method and apparatus for controlling reselection of a bus by overriding a prioritization protocol
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US6751696B2 (en) 1990-04-18 2004-06-15 Rambus Inc. Memory device having a programmable register
US5243703A (en) * 1990-04-18 1993-09-07 Rambus, Inc. Apparatus for synchronously generating clock signals in a data processing system
US5301330A (en) * 1990-10-12 1994-04-05 Advanced Micro Devices, Inc. Contention handling apparatus for generating user busy signal by logically summing wait output of next higher priority user and access requests of higher priority users
US5689657A (en) * 1991-03-30 1997-11-18 Deutsche Itt Industries Gmbh Apparatus and methods for bus arbitration in a multimaster system
US5546587A (en) * 1991-05-30 1996-08-13 Tandem Computers Incorporated Decentralized bus arbitration system which continues to assert bus request signal to preclude other from asserting bus request signal until information transfer on the bus has been completed
US5371863A (en) * 1991-05-30 1994-12-06 Tandem Computers Incorporated High speed processor bus extension
JPH0594409A (ja) * 1991-10-02 1993-04-16 Nec Eng Ltd バス調停システム
US5375223A (en) * 1993-01-07 1994-12-20 International Business Machines Corporation Single register arbiter circuit
US5717947A (en) * 1993-03-31 1998-02-10 Motorola, Inc. Data processing system and method thereof
JPH08511384A (ja) * 1993-04-16 1996-11-26 データ トランスレイション,インコーポレイテッド コンピュータのためのビデオ周辺機器
US6006020A (en) * 1993-04-16 1999-12-21 Media 100 Inc. Video peripheral circuitry exercising bus master control over a bus of a host computer
US5548771A (en) * 1993-11-02 1996-08-20 Motorola Inc. Multi-processor data processing system having multiple ports coupled to multiple interface circuits
US5603046A (en) * 1993-11-02 1997-02-11 Motorola Inc. Method for complex data movement in a multi-processor data processing system
US5732079A (en) * 1995-12-22 1998-03-24 Cisco Technology, Inc. Method and apparatus for skewing the start of transmission on multiple data highways
US6061348A (en) * 1995-12-22 2000-05-09 Cisco Technology, Inc. Method and apparatus for dynamically allocating bandwidth for a time division multiplexed data bus
US6115374A (en) * 1995-12-22 2000-09-05 Cisco Technology, Inc. Method and apparatus for dynamically assigning bandwidth for a time division multiplexing data bus
US6058449A (en) * 1997-07-31 2000-05-02 Motorola, Inc. Fault tolerant serial arbitration system
US6157970A (en) * 1997-09-24 2000-12-05 Intel Corporation Direct memory access system using time-multiplexing for transferring address, data, and control and a separate control line for serially transmitting encoded DMA channel number
US5991841A (en) * 1997-09-24 1999-11-23 Intel Corporation Memory transactions on a low pin count bus
US6131127A (en) * 1997-09-24 2000-10-10 Intel Corporation I/O transactions on a low pin count bus
US6119189A (en) * 1997-09-24 2000-09-12 Intel Corporation Bus master transactions on a low pin count bus
US6996120B2 (en) * 2001-03-14 2006-02-07 Siemens Communications, Inc. Methods for improving bus performance and bandwidth utilization of a parallel bus LAN
US7305008B2 (en) * 2001-03-14 2007-12-04 Siemens Communications, Inc. Parallel bus LAN
US7707339B2 (en) * 2007-12-18 2010-04-27 Freescale Semiconductor, Inc. Data arbitration on a bus to determine an extreme value
US8032678B2 (en) * 2008-11-05 2011-10-04 Mediatek Inc. Shared resource arbitration
US20110113172A1 (en) * 2009-11-12 2011-05-12 Himax Technologies Limited Utilization-enhanced shared bus system and bus arbitration method
US8612649B2 (en) 2010-12-17 2013-12-17 At&T Intellectual Property I, L.P. Validation of priority queue processing
US9208109B2 (en) * 2011-06-01 2015-12-08 Altera Corporation Memory controllers with dynamic port priority assignment capabilities
US8706936B2 (en) 2011-11-14 2014-04-22 Arm Limited Integrated circuit having a bus network, and method for the integrated circuit

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4871547A (de) * 1971-12-27 1973-09-27 Hitachi Ltd
GB1365838A (en) * 1972-04-21 1974-09-04 Ibm Data handling system
US3983540A (en) * 1975-09-08 1976-09-28 Honeywell Inc. Rapid bus priority resolution
US4171536A (en) * 1976-05-03 1979-10-16 International Business Machines Corporation Microprocessor system
US4096571A (en) * 1976-09-08 1978-06-20 Codex Corporation System for resolving memory access conflicts among processors and minimizing processor waiting times for access to memory by comparing waiting times and breaking ties by an arbitrary priority ranking
SE414087B (sv) * 1977-02-28 1980-07-07 Ellemtel Utvecklings Ab Anordning i ett datorsystem vid utsendning av signaler fran en processor till en eller flera andra processorer varvid prioriterade signaler sends direkt utan tidsfordrojning och oprioriterade signalers ordningsfoljd ...
US4161779A (en) * 1977-11-30 1979-07-17 Burroughs Corporation Dynamic priority system for controlling the access of stations to a shared device
US4330857A (en) * 1980-02-29 1982-05-18 Ibm Corporation Dynamically variable priority, variable position channels in a TDMA burst
DE3009308A1 (de) * 1980-03-11 1981-10-01 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zum uebertragen von datensignalen
US4358829A (en) * 1980-04-14 1982-11-09 Sperry Corporation Dynamic rank ordered scheduling mechanism
US4385350A (en) * 1980-07-16 1983-05-24 Ford Aerospace & Communications Corporation Multiprocessor system having distributed priority resolution circuitry
EP0048767B1 (de) * 1980-09-27 1985-03-20 Ibm Deutschland Gmbh Prioritätsstufengesteuerte Unterbrechungseinrichtung

Also Published As

Publication number Publication date
GB2114788B (en) 1985-09-18
DE3300261A1 (de) 1983-07-14
FR2519442B1 (fr) 1985-07-12
GB8300265D0 (en) 1983-02-09
DE3300261C2 (de) 1989-12-14
FR2519442A1 (fr) 1983-07-08
SE8207442D0 (sv) 1982-12-28
SE8207442L (sv) 1983-07-08
KR880002197B1 (ko) 1988-10-17
CA1193688A (en) 1985-09-17
US4488218A (en) 1984-12-11
SE450301B (sv) 1987-06-15
GB2114788A (en) 1983-08-24
KR840003566A (ko) 1984-09-08

Similar Documents

Publication Publication Date Title
NL8300045A (nl) Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn.
NL8300040A (nl) Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn.
US7350004B2 (en) Resource management device
EP0383475A2 (de) Arbitrierung von gemeinsamen Betriebsmitteln
US5706446A (en) Arbitration system for bus requestors with deadlock prevention
JP2559906B2 (ja) アービトレーション・システム及び方法
US4621342A (en) Arbitration circuitry for deciding access requests from a multiplicity of components
NL8300041A (nl) Schakeling voor het toewijzen van toegang tot een voor opvragen gedeelde lijn.
GB2114789A (en) Shared facility allocation system
US5555413A (en) Computer system and method with integrated level and edge interrupt requests at the same interrupt priority
US4744023A (en) Processor access control arrangement in a multiprocessor system
US6178475B1 (en) Multimedia system employing timers to properly allocate bus access
US9529751B2 (en) Requests and data handling in a bus architecture
US4974148A (en) Bus arbiter with equitable priority scheme
WO1999013405A1 (en) A fully-pipelined fixed-latency communications system with a real-time dynamic bandwidth allocation
US4682282A (en) Minimum latency tie-breaking arbitration logic circuitry
US4556939A (en) Apparatus for providing conflict-free highway access
EP0327203B1 (de) Nichtblockierender NxM-Arbitrierungsschalter mit grosser Bandbreite
US5471639A (en) Apparatus for arbitrating for a high speed direct memory access bus
JPH05504014A (ja) チャネル選択アービトレーション
CA2145553C (en) Multi-processor system including priority arbitrator for arbitrating request issued from processors
US5293493A (en) Preemption control for central processor with cache
EP0307793A2 (de) Bustreiber- und Dekodierungsschaltung
JP2000276437A (ja) Dma制御装置
KR100261730B1 (ko) 다중 프로세서 시스템에 있어서 인터럽트 버스 중재방법

Legal Events

Date Code Title Description
BA A request for search or an international-type search has been filed
BB A search report has been drawn up
A85 Still pending on 85-01-01
BV The patent application has lapsed