NL1018956A1 - Ge´ntegreerde schakeling bevattende een diepe put en dienovereenkomstige werkwijzen. - Google Patents

Ge´ntegreerde schakeling bevattende een diepe put en dienovereenkomstige werkwijzen.

Info

Publication number
NL1018956A1
NL1018956A1 NL1018956A NL1018956A NL1018956A1 NL 1018956 A1 NL1018956 A1 NL 1018956A1 NL 1018956 A NL1018956 A NL 1018956A NL 1018956 A NL1018956 A NL 1018956A NL 1018956 A1 NL1018956 A1 NL 1018956A1
Authority
NL
Netherlands
Prior art keywords
integrated circuit
deep well
circuit containing
corresponding methods
methods
Prior art date
Application number
NL1018956A
Other languages
English (en)
Other versions
NL1018956C2 (nl
Inventor
Christopher Boguslaw Kocon
Original Assignee
Fairchild Semiconductor
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor filed Critical Fairchild Semiconductor
Publication of NL1018956A1 publication Critical patent/NL1018956A1/nl
Application granted granted Critical
Publication of NL1018956C2 publication Critical patent/NL1018956C2/nl

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/407Recessed field plates, e.g. trench field plates, buried field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thyristors (AREA)
NL1018956A 2000-09-19 2001-09-14 Geïntegreerde schakeling bevattende een diepe put en dienovereenkomstige werkwijzen. NL1018956C2 (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US66402400 2000-09-19
US09/664,024 US6534828B1 (en) 2000-09-19 2000-09-19 Integrated circuit device including a deep well region and associated methods

Publications (2)

Publication Number Publication Date
NL1018956A1 true NL1018956A1 (nl) 2002-03-21
NL1018956C2 NL1018956C2 (nl) 2004-11-30

Family

ID=24664196

Family Applications (1)

Application Number Title Priority Date Filing Date
NL1018956A NL1018956C2 (nl) 2000-09-19 2001-09-14 Geïntegreerde schakeling bevattende een diepe put en dienovereenkomstige werkwijzen.

Country Status (7)

Country Link
US (1) US6534828B1 (nl)
JP (1) JP2002164542A (nl)
DE (1) DE10145045A1 (nl)
FR (1) FR2814282A1 (nl)
IT (1) ITMI20011952A1 (nl)
NL (1) NL1018956C2 (nl)
TW (1) TW538533B (nl)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW543146B (en) * 2001-03-09 2003-07-21 Fairchild Semiconductor Ultra dense trench-gated power device with the reduced drain-source feedback capacitance and miller charge
JP4024503B2 (ja) * 2001-09-19 2007-12-19 株式会社東芝 半導体装置及びその製造方法
US7161208B2 (en) * 2002-05-14 2007-01-09 International Rectifier Corporation Trench mosfet with field relief feature
JP3971327B2 (ja) 2003-03-11 2007-09-05 株式会社東芝 絶縁ゲート型半導体装置
US7279743B2 (en) * 2003-12-02 2007-10-09 Vishay-Siliconix Closed cell trench metal-oxide-semiconductor field effect transistor
TWI222685B (en) * 2003-12-18 2004-10-21 Episil Technologies Inc Metal oxide semiconductor device and fabricating method thereof
GB0403934D0 (en) * 2004-02-21 2004-03-24 Koninkl Philips Electronics Nv Trench-gate semiconductor devices and the manufacture thereof
US7262111B1 (en) * 2004-09-07 2007-08-28 National Semiconductor Corporation Method for providing a deep connection to a substrate or buried layer in a semiconductor device
GB0419867D0 (en) 2004-09-08 2004-10-13 Koninkl Philips Electronics Nv Semiconductor devices and methods of manufacture thereof
US7265415B2 (en) * 2004-10-08 2007-09-04 Fairchild Semiconductor Corporation MOS-gated transistor with reduced miller capacitance
KR100552827B1 (ko) * 2004-12-22 2006-02-21 동부아남반도체 주식회사 깊은 웰과 게이트 산화막을 동시에 형성하는 고전압반도체 소자의 제조 방법
JP5047805B2 (ja) * 2005-11-22 2012-10-10 新電元工業株式会社 トレンチゲートパワー半導体装置
WO2009102684A2 (en) * 2008-02-14 2009-08-20 Maxpower Semiconductor Inc. Semiconductor device structures and related processes
US8704295B1 (en) 2008-02-14 2014-04-22 Maxpower Semiconductor, Inc. Schottky and MOSFET+Schottky structures, devices, and methods
JP6047297B2 (ja) * 2012-04-09 2016-12-21 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3334290B2 (ja) * 1993-11-12 2002-10-15 株式会社デンソー 半導体装置
JP3260944B2 (ja) * 1993-12-15 2002-02-25 三菱電機株式会社 電圧駆動型サイリスタおよびその製造方法
JP3307785B2 (ja) * 1994-12-13 2002-07-24 三菱電機株式会社 絶縁ゲート型半導体装置
US6140678A (en) * 1995-06-02 2000-10-31 Siliconix Incorporated Trench-gated power MOSFET with protective diode
EP0746042B1 (en) 1995-06-02 2004-03-31 SILICONIX Incorporated Bidirectional blocking trench power MOSFET
JP2988871B2 (ja) * 1995-06-02 1999-12-13 シリコニックス・インコーポレイテッド トレンチゲートパワーmosfet
GB2314206A (en) * 1996-06-13 1997-12-17 Plessey Semiconductors Ltd Preventing voltage breakdown in semiconductor devices
JP3904648B2 (ja) * 1997-01-31 2007-04-11 株式会社ルネサステクノロジ 半導体装置
US6096608A (en) * 1997-06-30 2000-08-01 Siliconix Incorporated Bidirectional trench gated power mosfet with submerged body bus extending underneath gate trench
US6084264A (en) 1998-11-25 2000-07-04 Siliconix Incorporated Trench MOSFET having improved breakdown and on-resistance characteristics

Also Published As

Publication number Publication date
US6534828B1 (en) 2003-03-18
ITMI20011952A0 (it) 2001-09-18
JP2002164542A (ja) 2002-06-07
FR2814282A1 (fr) 2002-03-22
ITMI20011952A1 (it) 2003-03-18
TW538533B (en) 2003-06-21
DE10145045A1 (de) 2002-08-01
NL1018956C2 (nl) 2004-11-30

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Legal Events

Date Code Title Description
AD1A A request for search or an international type search has been filed
AD1A A request for search or an international type search has been filed
RD2N Patents in respect of which a decision has been taken or a report has been made (novelty report)
PD2B A search report has been drawn up
MM Lapsed because of non-payment of the annual fee

Effective date: 20151001