NL1014455A1 - DRAM-celcondensator en vervaardigingswijze daarvan. - Google Patents

DRAM-celcondensator en vervaardigingswijze daarvan.

Info

Publication number
NL1014455A1
NL1014455A1 NL1014455A NL1014455A NL1014455A1 NL 1014455 A1 NL1014455 A1 NL 1014455A1 NL 1014455 A NL1014455 A NL 1014455A NL 1014455 A NL1014455 A NL 1014455A NL 1014455 A1 NL1014455 A1 NL 1014455A1
Authority
NL
Netherlands
Prior art keywords
manufacture
dram cell
cell capacitor
capacitor
dram
Prior art date
Application number
NL1014455A
Other languages
English (en)
Other versions
NL1014455C2 (nl
Inventor
Yoo Sang Hwang
Sang-Ho Song
Tae Young Chung
Byung Jun Park
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of NL1014455A1 publication Critical patent/NL1014455A1/nl
Application granted granted Critical
Publication of NL1014455C2 publication Critical patent/NL1014455C2/nl

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895Local interconnects; Local pads, as exemplified by patent document EP0896365
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/50Peripheral circuit region structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
NL1014455A 1999-04-12 2000-02-21 DRAM-celcondensator en vervaardigingswijze daarvan. NL1014455C2 (nl)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR19990012801 1999-04-12
KR19990012801 1999-04-12
KR1019990033767A KR100308622B1 (ko) 1999-04-12 1999-08-17 디램 셀 캐패시터 및 제조 방법
KR19990033767 1999-08-17

Publications (2)

Publication Number Publication Date
NL1014455A1 true NL1014455A1 (nl) 2000-10-13
NL1014455C2 NL1014455C2 (nl) 2003-11-04

Family

ID=26634923

Family Applications (1)

Application Number Title Priority Date Filing Date
NL1014455A NL1014455C2 (nl) 1999-04-12 2000-02-21 DRAM-celcondensator en vervaardigingswijze daarvan.

Country Status (6)

Country Link
US (2) US6479343B1 (nl)
JP (1) JP4900987B2 (nl)
KR (1) KR100308622B1 (nl)
DE (1) DE10007018B4 (nl)
GB (1) GB2349015B (nl)
NL (1) NL1014455C2 (nl)

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KR100338958B1 (ko) * 2000-08-31 2002-06-01 박종섭 반도체 소자의 커패시터 형성 방법
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US20100012996A1 (en) * 2008-07-16 2010-01-21 Promos Technologies Inc. Dynamic random access memory structure
KR20100095242A (ko) * 2009-02-20 2010-08-30 삼성전자주식회사 반도체 소자 및 그 제조 방법
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KR101810531B1 (ko) * 2011-11-23 2017-12-20 삼성전자 주식회사 반도체 장치 및 그 제조 방법
KR101917816B1 (ko) 2012-05-08 2019-01-29 에스케이하이닉스 주식회사 캐패시터 및 그 제조 방법
US9178080B2 (en) * 2012-11-26 2015-11-03 Taiwan Semiconductor Manufacturing Co., Ltd. Deep trench structure for high density capacitor
US9978829B2 (en) 2012-11-26 2018-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Low impedance high density deep trench capacitor
CN103972153B (zh) * 2013-01-31 2016-08-24 华邦电子股份有限公司 接触孔插塞的制造方法
US9041154B2 (en) * 2013-03-06 2015-05-26 Nanya Technology Corp. Contact structure and semiconductor memory device using the same
JP2015084400A (ja) 2013-09-18 2015-04-30 マイクロン テクノロジー, インク. 半導体装置及びその製造方法
KR102246277B1 (ko) * 2014-03-14 2021-04-29 에스케이하이닉스 주식회사 반도체 소자 및 그 제조 방법
US9378778B1 (en) 2015-06-14 2016-06-28 Darryl G. Walker Package including a plurality of stacked semiconductor devices including a capacitance enhanced through via and method of manufacture
CN113496954B (zh) * 2020-04-08 2023-08-29 长鑫存储技术有限公司 存储器的形成方法及存储器
US11469140B2 (en) 2020-08-25 2022-10-11 Nanya Technology Corporation Semiconductor device having a landing pad with spacers and method for fabricating the same
KR20230107027A (ko) 2022-01-07 2023-07-14 삼성전자주식회사 반도체 소자

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Also Published As

Publication number Publication date
DE10007018A1 (de) 2000-10-19
JP4900987B2 (ja) 2012-03-21
DE10007018B4 (de) 2011-12-22
GB0004163D0 (en) 2000-04-12
KR20000067767A (ko) 2000-11-25
US6670663B2 (en) 2003-12-30
JP2000299448A (ja) 2000-10-24
GB2349015B (en) 2003-12-31
GB2349015A (en) 2000-10-18
US20030008469A1 (en) 2003-01-09
NL1014455C2 (nl) 2003-11-04
KR100308622B1 (ko) 2001-11-01
US6479343B1 (en) 2002-11-12

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RD2N Patents in respect of which a decision has been taken or a report has been made (novelty report)

Effective date: 20030902

PD2B A search report has been drawn up
MK Patent expired because of reaching the maximum lifetime of a patent

Effective date: 20200220