MA43370B1 - Procédé pour incorporation circuit intégré flip chip - Google Patents

Procédé pour incorporation circuit intégré flip chip

Info

Publication number
MA43370B1
MA43370B1 MA43370A MA43370A MA43370B1 MA 43370 B1 MA43370 B1 MA 43370B1 MA 43370 A MA43370 A MA 43370A MA 43370 A MA43370 A MA 43370A MA 43370 B1 MA43370 B1 MA 43370B1
Authority
MA
Morocco
Prior art keywords
smart card
vertical plane
contact pad
substrate
incorporating
Prior art date
Application number
MA43370A
Other languages
English (en)
Inventor
Eng Seng Ng
Sze Yong Pang
Original Assignee
Eng Seng Ng
Smartflex Tech Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eng Seng Ng, Smartflex Tech Pte Ltd filed Critical Eng Seng Ng
Publication of MA43370B1 publication Critical patent/MA43370B1/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07722—Physical layout of the record carrier the record carrier being multilayered, e.g. laminated sheets
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Credit Cards Or The Like (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

Des modes de réalisation de l'invention concernent des procédés de fabrication d'un dispositif intelligent (200), par ex. Carte à puce et configurations pour les périphériques de carte à puce avec une fiabilité et une durée de vie accrues et une finition améliorée. Dans le dispositif de carte à puce comprenant des couches de substrat stratifiées (220, 240) interposant un film flexible (230) portant un motif conducteur, au moins une puce à bascule (250) destinée à faire fonctionner le dispositif de carte à puce est intégrée à un premier substrat (220) de telle sorte que le premier substrat assure une encapsulation sur la au moins une puce retournée, dans lequel la au moins une puce retournée (250) est agencée en une position dans un premier plan vertical; et un plot de contact (260), destiné à établir une connexion électrique lorsque le dispositif de carte à puce est inséré dans un lecteur de carte à puce, est disposé en une position dans un deuxième plan vertical, le premier plan vertical ne chevauchant pas le deuxième plan vertical. . La pastille de contact (260) est projetée à travers une cavité dans un second substrat pour former un plan uniforme continu depuis une surface externe des couches de substrat stratifiées vers la pastille de contact (260).
MA43370A 2015-12-04 2016-11-22 Procédé pour incorporation circuit intégré flip chip MA43370B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201562263105P 2015-12-04 2015-12-04
PCT/SG2016/050574 WO2017095329A1 (fr) 2015-12-04 2016-11-22 Procédé d'incorporation de puce retournée de circuit intégré
EP16809206.2A EP3384434B1 (fr) 2015-12-04 2016-11-22 Procédé pour incorporation circuit intégré flip chip

Publications (1)

Publication Number Publication Date
MA43370B1 true MA43370B1 (fr) 2019-10-31

Family

ID=57530791

Family Applications (1)

Application Number Title Priority Date Filing Date
MA43370A MA43370B1 (fr) 2015-12-04 2016-11-22 Procédé pour incorporation circuit intégré flip chip

Country Status (19)

Country Link
US (2) US10558906B2 (fr)
EP (1) EP3384434B1 (fr)
JP (1) JP6544759B2 (fr)
KR (1) KR101897944B1 (fr)
CN (1) CN108292373B (fr)
AU (1) AU2016361882B2 (fr)
BR (2) BR122019027776B1 (fr)
CA (1) CA3002778C (fr)
ES (1) ES2747913T3 (fr)
HU (1) HUE045755T2 (fr)
MA (1) MA43370B1 (fr)
MX (1) MX2018005155A (fr)
PH (1) PH12018500683A1 (fr)
PL (1) PL3384434T3 (fr)
PT (1) PT3384434T (fr)
RU (1) RU2667741C1 (fr)
UA (1) UA118640C2 (fr)
WO (1) WO2017095329A1 (fr)
ZA (1) ZA201802189B (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3063555B1 (fr) * 2017-03-03 2021-07-09 Linxens Holding Carte a puce et procede de fabrication d’une carte a puce
KR102107795B1 (ko) * 2018-11-22 2020-05-28 주식회사 엔에이블 플렉시블 기판을 이용한 스마트 카드 제조방법
DE102019202718B4 (de) 2019-02-28 2020-12-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Dünnes Dual-Folienpackage und Verfahren zum Herstellen desselben
DE102019202721B4 (de) 2019-02-28 2021-03-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. 3d-flexfolien-package
DE102019202716B4 (de) * 2019-02-28 2020-12-24 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Flex-folien-package mit coplanarer topologie für hochfrequenzsignale und verfahren zum herstellen eines derartigen flex-folien-packages
DE102019202715A1 (de) 2019-02-28 2020-09-03 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Folienbasiertes package mit distanzausgleich
EP4042329B1 (fr) * 2020-08-05 2023-06-07 Smartflex Technology Pte Ltd Carte à puce à del et ses procédés de fabrication
DE102021001579A1 (de) 2021-03-25 2022-09-29 Giesecke+Devrient Mobile Security Gmbh Chipkarte und Verfahren zur Herstellung einer Chipkarte
CN117616422A (zh) * 2021-07-16 2024-02-27 爱创达身份智能卡有限公司 芯片模块及其形成方法
US11960951B1 (en) * 2022-09-23 2024-04-16 Capital One Services, Llc Transaction card with multiple orientations

Family Cites Families (13)

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Publication number Priority date Publication date Assignee Title
US5837153A (en) * 1997-01-15 1998-11-17 Kawan; Joseph C. Method and system for creating and using a logotype contact module with a smart card
US6832730B2 (en) * 2001-07-27 2004-12-21 Storcard, Inc. Smart card with rotating storage
DE10303740B4 (de) * 2003-01-30 2006-09-14 Infineon Technologies Flash Gmbh & Co. Kg Sicherheitsspeicherkarte und Herstellungsverfahren
US9430732B2 (en) * 2014-05-08 2016-08-30 Tego, Inc. Three-dimension RFID tag with opening through structure
US20070290048A1 (en) * 2006-06-20 2007-12-20 Innovatier, Inc. Embedded electronic device and method for manufacturing an embedded electronic device
CN102231193B (zh) * 2011-07-06 2013-05-08 黄艳 一种双界面智能卡
US9390364B2 (en) * 2011-08-08 2016-07-12 Féinics Amatech Teoranta Transponder chip module with coupling frame on a common substrate for secure and non-secure smartcards and tags
JP5482746B2 (ja) 2011-08-25 2014-05-07 大日本印刷株式会社 カード、カードの製造方法
FR2980015B1 (fr) * 2011-09-08 2013-11-22 Sansystems Dispositif electronique a puce et procede de fabrication par bobines
US20140042230A1 (en) * 2012-08-09 2014-02-13 Infineon Technologies Ag Chip card module with separate antenna and chip card inlay using same
WO2014082401A1 (fr) * 2012-11-30 2014-06-05 Xue Yuan Carte à puce bi-interface et procédé de fabrication de celle-ci
FR2999753B1 (fr) * 2012-12-13 2015-02-13 Oberthur Technologies Procede de fabrication par lamination en continu de cartes a microcircuit du type a contact
EP2784724A3 (fr) * 2013-03-27 2015-04-22 Féinics AmaTech Teoranta Dépôt sélectif de particules magnétiques et utilisation de matériau magnétique comme support pour déposer d'autres particules

Also Published As

Publication number Publication date
KR101897944B1 (ko) 2018-09-12
UA118640C2 (uk) 2019-02-11
PH12018500683B1 (en) 2018-10-15
JP6544759B2 (ja) 2019-07-17
JP2019500749A (ja) 2019-01-10
PT3384434T (pt) 2019-10-28
RU2667741C1 (ru) 2018-09-24
US10685275B2 (en) 2020-06-16
CN108292373B (zh) 2019-07-23
US20180300597A1 (en) 2018-10-18
US10558906B2 (en) 2020-02-11
WO2017095329A1 (fr) 2017-06-08
EP3384434B1 (fr) 2019-08-21
HUE045755T2 (hu) 2020-01-28
CA3002778C (fr) 2018-09-18
BR112018011000A2 (pt) 2018-12-04
ES2747913T3 (es) 2020-03-12
CN108292373A (zh) 2018-07-17
ZA201802189B (en) 2019-08-28
BR122019027776B1 (pt) 2020-10-20
AU2016361882B2 (en) 2018-11-01
MX2018005155A (es) 2018-08-15
CA3002778A1 (fr) 2017-06-08
PH12018500683A1 (en) 2018-10-15
BR112018011000B1 (pt) 2020-10-20
AU2016361882A1 (en) 2018-04-19
PL3384434T3 (pl) 2020-01-31
KR20180069000A (ko) 2018-06-22
EP3384434A1 (fr) 2018-10-10
US20200134413A1 (en) 2020-04-30

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