KR970072459A - 박막 트랜지스터의 제조방법 및 이를 이용한 액정 표시장치의 제조방법 - Google Patents

박막 트랜지스터의 제조방법 및 이를 이용한 액정 표시장치의 제조방법 Download PDF

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KR970072459A
KR970072459A KR1019970012306A KR19970012306A KR970072459A KR 970072459 A KR970072459 A KR 970072459A KR 1019970012306 A KR1019970012306 A KR 1019970012306A KR 19970012306 A KR19970012306 A KR 19970012306A KR 970072459 A KR970072459 A KR 970072459A
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film
thin film
film transistor
passivation
manufacturing
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이주형
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윤종용
삼성전자 주식회사
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Priority to US08/835,588 priority patent/US6277678B1/en
Priority to JP9092797A priority patent/JP4376323B2/ja
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Abstract

향상된 특성을 갖는 박막 트랜지스터의 제조방법과, 이를 이용한 액정 표시장치의 제조방법에 대해 개시되어 있다. 이 박막 트랜지스터의 제조방법에 의하면, 기판상에 게이트, 소오스 및 드레인을 구비하는 박막 트랜지스터를 형성한다. 그 결과물상에, 수분을 함유하는 절연막을 이용하여 패시베이션막을 형성한다. 이 패시베이션막을 열처리함으로써, 패시베이션막에 함유된 수분을 박막 트랜지스터로 확신시킨다. 이 패시베이션막을 에치백함으로써, 박막 트랜지스터 또는 금속라인에 의해 단차가 형성된 결과물의 표면을 평탄화한다.

Description

박막 트랜지스터의 제조방법 및 이를 이용한 액정 표시장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (19)

  1. (a) 기판상에 게이트, 소오스 및 드레인을 구비하는 박막 트랜지스터를 형성하는 단계; (b) 결과물상에, 수분을 함유하는 절연막을 이용하여 패시베이션막을 형성하는 단계; (c) 상기 패시배이션막을 열처리함으로써, 상기 패시베이션막에 함유된 수분을 상기 박막 트랜지스터로 확산시키는 단계; 및 (d) 상기 패시베이션막을 에치백함으로써, 상기 박막 트랜지스터 또는 금속라인에 의해 단차가 형성된 결과물의 표면을 평탄화하는 단계를 포함하는 것을 특징으로 하는 박막 트랜지스터의 제조방법.
  2. 제1항에 있어서, 상기 패시베이션막은, 스핀 온 글래스(SOG)막으로 형성하는 것을 특징으로 하는 박막 트랜지스터의 제조방법.
  3. 제1항에 있어서, 상기 패시베이션막은, 1,000Å∼3,000Å 정도의 두께로 형성하는 것을 특징으로 하는 박막 트랜지스터의 제조방법.
  4. 제1항에 있어서, 상기 (c)단계는, 300℃∼400℃ 정도의 온도에서 이루어지는 것을 특징으로 하는 박막 트랜지스터의 제조방법.
  5. 제1항에 있어서, 상기 (d)단계 후에, (e) 상기 패시베이션막 상에, 질화막 및 산화막과 질화막의 복합막으로 이루어진 그룹에서 선택된 어느 하나로 이루어진 절연막을 형성하는 단계를 더 구비하는 것을 특징으로 하는 박막 트랜지스터의 제조방법.
  6. 제5항에 있어서, 상기 (e)단계 후에, 상기 절연막이 형성된 기판을 열처리하여, 상기 박막 트랜지스터로 확산된 수분속의 수소가 재배열되도록 하고, 상기 패시베이션막의 스트레스를 완화시키는 단계를 더 구비하는 것을 특징으로 하는 박막 트랜지스터의 제조방법.
  7. 제6항에 있어서, 상기 열처리하는 단계는, 150℃∼200℃정도의 온도에서 이루어지는 것을 특징으로 하는 박막 트랜지스터의 제조방법.
  8. (a) 기판상에 게이트전극, 소오스전극 및 드레인전극을 구비하는 박막 트랜지스터를 형성하는 단계; (b) 결과물상에, 수분을 함유하는 절연막을 코팅하여 패시베이션막을 형성하는 단계; (c) 상기 패시배이션막을 열처리함으로써, 상기 패시베이션막에 함유된 수분을 상기 박막 트랜지스터로 확산시키는 단계; (d) 상기 패시베이션막을 에치백함으로써, 상기 박막 트랜지스터 또는 금속라인에 의해 단차가 형성된 결과물의 표면을 평탄화하는 단계, (e) 평탄화된 결과물의 전면에 절연막을 형성하는 단계; (f) 상기 절연막 및 패시베이션막을 부분적으로 식각하여, 상기 드레인전극을 노출시키는 콘택홀을 형성하는 단계; 및 (g) 상기 콘택홀을 통해 상기 드레인전극과 연결된 화소전극을 형성하는 단계를 포함하는 것을 특징으로 하는 박막 트랜지스터-액정 표시장치의 제조방법.
  9. 제8항에 있어서, 상기 (a)단계는, (i) 기판상에 비정질 실리콘막을 증착한 후 결정화하여 반도체막을 형성하는 단계; (ii) 상기 반도체막을 패터닝하여 반도체막 패턴을 형성하는 단계; (iii) 상기 반도체 막 패턴이 형성된 기판 상에 게이트절연막 및 게이트 전극을 차례로 형성하는 단계; (iv) 상기 반도체막 패턴에 불순물이온을 주입하여 소오스 및 드레인을 형성하는 단계; (v) 소오스 및 드레인이 형성된 결과물상에, 상기 소오스 및 드레인을 노출시키는 콘택홀이 형성된 층간절연막을 형성하는 단계; 및 (vi) 상기 층간졀연막상에, 상기 소오스 및 드레인과 각각 연결된 소오스전극 및 드레인전극을 형성하는 단계로 이루어진 것을 특징으로 하는 박막 트랜지스터-액정 표시장치의 제조방법.
  10. 제9항에 있어서, 상기 (i)단계에서, 상기 비정질실리콘막을 레이저를 이용하여 결정화하는 것을 특징으로 하는 박막 트랜지스터-액정표시장치의 제조방법.
  11. 제9항에 있어서, 상기 (iv) 단계는, 이온 샤워도핑(ion shower doping) 방법을 사용하여 이루어지는 것을 특징으로 하는 박막 트랜지스터-액정 표시장치의 제조방법.
  12. 제8항에 있어서, 상기 (b)단계에서 상기 패시베이션막을 스핀 온 글래스(Spin On Glass : SOG)막으로 형성하는 것을 특징으로 하는 박막 트랜지스터-액정 표시장치의 제조방법.
  13. 제8항에 있어서, 상기 패시베이션막은, 1,000Å∼3,000Å 정도의 두께로 형성하는 것을 특징으로 하는 박막 트랜지스터-액정 표시장치의 제조방법.
  14. 제8항에 있어서, 상기 (c)단계는, 300℃∼400℃정도의 온도에서 이루어지는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 제조방법.
  15. 제8항에 있어서, 상기 (e)단계에서, 상기 절연막은 질화막 및 산화막과 질화막의 복합막으로 이루어진 그룹에서 선택된 어느 하나로 형성하는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 제조방법.
  16. 제8항에 있어서, 상기 (d)단계 전에, 상기 (b)단계와 (c)단계를 1회 이상 반복하여 실시하는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 제조방법.
  17. 제8항에 있어서, 상기 (e)단계 또는 (g)단계 후에, 상기 절연막이 형성된 기판을 열처리하여, 상기 박막 트랜지스터로 확산된 수분속의 수소가 재배열되도록 하고, 상기 패시베이션막의 스트레스를 완화시키는 단계를 더 구비하는 것을 특징으로 하는 박막 트랜지스터-액정 표시장치의 제조방법.
  18. 제17항에 있어서, 상기 열처리하는 단계는, 150℃∼200℃ 정도의 온도에서 이루어지는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 제조방법.
  19. 제8항에 있어서, 상기 (g) 단계에서, 상기 화소전극은 ITO(Indium Tin Oxide; ITO)막으로 형성하는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019970012306A 1996-04-09 1997-04-03 박막 트랜지스터의 제조방법 및 이를 이용한 액정 표시장치의 제조방법 KR100234376B1 (ko)

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US08/835,588 US6277678B1 (en) 1996-04-09 1997-04-09 Methods of manufacturing thin film transistors using insulators containing water
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KR1019970012306A KR100234376B1 (ko) 1996-04-09 1997-04-03 박막 트랜지스터의 제조방법 및 이를 이용한 액정 표시장치의 제조방법
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