KR970050835A - Adaptive Equalizer with Variable Training Rows in Digital Video Cassette Recorder - Google Patents

Adaptive Equalizer with Variable Training Rows in Digital Video Cassette Recorder Download PDF

Info

Publication number
KR970050835A
KR970050835A KR1019950060920A KR19950060920A KR970050835A KR 970050835 A KR970050835 A KR 970050835A KR 1019950060920 A KR1019950060920 A KR 1019950060920A KR 19950060920 A KR19950060920 A KR 19950060920A KR 970050835 A KR970050835 A KR 970050835A
Authority
KR
South Korea
Prior art keywords
preamble
outputting
signal
data
synchronization signal
Prior art date
Application number
KR1019950060920A
Other languages
Korean (ko)
Other versions
KR100202392B1 (en
Inventor
현광민
이재천
Original Assignee
이우복
사단법인 고등기술연구원 연구조합
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이우복, 사단법인 고등기술연구원 연구조합 filed Critical 이우복
Priority to KR1019950060920A priority Critical patent/KR100202392B1/en
Publication of KR970050835A publication Critical patent/KR970050835A/en
Application granted granted Critical
Publication of KR100202392B1 publication Critical patent/KR100202392B1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10268Improvement or modification of read or write signals bit detection or demodulation methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10481Improvement or modification of read or write signals optimisation methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/22Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing distortions

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

본 발명은 디지털 비디오 카세트 레코더에 관한 것으로서, 입력 신호(6)를 변환 계수(14)에 따라 등화하여 출력하는 피드 포워드부(1)와; 상기 피드 포워드부(1)의 출력의 레벨을 경정하여 검출 데이터(5)로서 출력하는 데이터 결정부(3)와; 상기 검출 데이터(5)로서 출력하는 데이터 결정부(3)와; 상기 검출 데이터(5)로부터 프리 엠블을 검출하여 동기 신호(10)를 선택적으로 출력하는 프리 엠블 검출부(9)와; 상기 동기 신호(10)의 입력에 따라 트랙의 프리 엠블을 훈련 데이터(11)로서 순차적으로 출력하는 프리 엠블 발생부(8)와; 상기 동기 신호(10)에 따라 스위칭되어 검출 데이터(5) 또는 훈련 데이터(11)를 선택적으로 출력하는 기준 신호 스위칭부(2)와; 상기 스위칭부(2)의 출력과 피드 포워드부(1)의 출력간의 차를 계산하여 오차 신호(7)로서 출력하는 에러 계산부(4)와; 상기 동기 신호(10)를 적응 시작 신호(12)로 입력하여 적응 시작 신호 및 오차 신호(7)에 따른 상기 변환 계수(14)를 출력하는 계수 적응부(13)를 구비한다.The present invention relates to a digital video cassette recorder, comprising: a feed forward section (1) for equalizing and outputting an input signal (6) in accordance with a transform coefficient (14); A data determination section (3) for determining the level of the output of the feed forward section (1) and outputting it as detection data (5); A data determination unit 3 outputting the detection data 5; A preamble detection unit (9) for detecting a preamble from the detection data (5) and selectively outputting a synchronization signal (10); A preamble generator (8) for sequentially outputting the preamble of the track as training data (11) in accordance with the input of the synchronization signal (10); A reference signal switching unit (2) for switching in accordance with the synchronization signal (10) to selectively output detection data (5) or training data (11); An error calculator (4) for calculating the difference between the output of the switching section (2) and the output of the feed forward section (1) and outputting it as an error signal (7); And a coefficient adaptation unit 13 for inputting the synchronization signal 10 as an adaptation start signal 12 and outputting the conversion coefficient 14 according to the adaptation start signal and the error signal 7.

따라서, 본 발명은 디지털 VCR에서 특정 훈련 기간 및 훈련열을 둘 필요가 없이 적응형 등화기의 구조를 가지므로 고정형 등화기에 비해 성능 향상되며, 적응형 등화기의 구조가 간단하게 되는 효과가 있다.Therefore, the present invention has the structure of the adaptive equalizer without having to put a specific training period and training sequence in the digital VCR, so that the performance is improved compared to the fixed equalizer, and the structure of the adaptive equalizer is simplified.

Description

디지털 비디오 카세트 레코더에서 가변 훈련열을 갖는 적응형 등화기Adaptive Equalizer with Variable Training Rows in Digital Video Cassette Recorder

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 따른 디지털 비디오 카세트 레코더에서 가변 훈련열을 갖는 적응형 등화기의 블록도.1 is a block diagram of an adaptive equalizer with a variable training sequence in a digital video cassette recorder in accordance with the present invention.

제2도는 본 발명에 따른 디지털 비디오 카세트 레코더에서 가변 훈련열을 갖는 적응형 등화기에 입력되는 신호의 상태를 도시한 도면.2 shows a state of a signal input to an adaptive equalizer having a variable training sequence in a digital video cassette recorder according to the present invention.

제3도는 본 발명에 따른 디지털 비디오 카세트 레코더에서 가변 훈련열을 갖는 적응형 등화기에 구성되는 프리엠블 검출부의 블록도.3 is a block diagram of a preamble detection unit configured in an adaptive equalizer having a variable training sequence in a digital video cassette recorder according to the present invention.

제4도는 본 발명에 따른 디지털 비디오 카세트 레코더에서 가변 훈련열을 갖는 적응형 등화기에 구성되는 프리엠블 발생부의 블록도.4 is a block diagram of a preamble generation unit configured in an adaptive equalizer having a variable training sequence in a digital video cassette recorder according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 피드 포워드부 2 : 기준 신호 스위칭부1: feed forward part 2: reference signal switching part

3 : 데이터 결정부 4 : 에러 계산부3: data determining unit 4: error calculating unit

8 : 프리 엠블 발생부 9 : 프리 엠블 검출부8: preamble generating unit 9: preamble detecting unit

Claims (3)

디지털 비디오 카세트 레코더에 있어서, 입력 신호(6)를 변환 계수(14)에 따라 등화하여 출력하는 피드 포워드부(1)와; 상기 피드 포워드부(1)의 출력의 레벨을 결정하여 검출 데이터(5)로서 출력하는 데이터 결정부(3)와; 상기 검출 데이터(5)로부터 프리 엠블을 검출하여 동기 신호(10)를 선택적으로 출력하는 프리 엠블 검출부(9)와; 상기 동기 신호(10)의 입력에 따라 트랙의 프리 엠블을 훈련 데이터(11)로서 순차적으로 출력하는 프리엠블 발생부(8)와; 상기 동기 신호(10)에 따라 스위칭되어 검출 데이타(5) 또는 훈련데이타(11)를 선택적으로 출력하는 기준 신호 스위칭부(2)와; 상기 스위칭부(2)의 출력과 피드 포워드부(1)의 출력간의 차를 계산하여 오차 신호(7)로서 출력하는 에러 계산부(4)와; 상기 등록 신호(10)를 적응 시작 신호(12)로 입력하여 적응시작 신호 및 오차 신호(7)에 따른 상기 변환 계수(14)를 출력하는 계수 적응부(13)를 구비하는 디지탈 비디오 카세트 레코더에서 가변 훈련열을 갖는 적응형 등화기.A digital video cassette recorder comprising: a feed forward section (1) for equalizing and outputting an input signal (6) in accordance with a transform coefficient (14); A data determination unit (3) which determines the level of the output of the feed forward unit (1) and outputs it as detection data (5); A preamble detection unit (9) for detecting a preamble from the detection data (5) and selectively outputting a synchronization signal (10); A preamble generator (8) for sequentially outputting the preamble of the track as training data (11) according to the input of the synchronization signal (10); A reference signal switching unit (2) for switching according to the synchronization signal (10) and selectively outputting detection data (5) or training data (11); An error calculator (4) for calculating the difference between the output of the switching section (2) and the output of the feed forward section (1) and outputting it as an error signal (7); In the digital video cassette recorder having a coefficient adaptation unit 13 for inputting the registration signal 10 as an adaptation start signal 12 and outputting the conversion coefficient 14 according to the adaptation start signal and the error signal 7. Adaptive equalizer with variable training sequence. 제1항에 있어서, 상기 프리 엠블 검출부(9)는, 트랙별 해당 프리 엠블이 저장되어 있어 현재 입력되는 검출 데이터(5)에 의한 프리 엠블를 판별할 수 있는 트랙별 프리 엠블 검출기(91),(92),(93)와; 검출 데이터(5)의 프리 엠블이 종료하고 데이터가 검출되는지를 판별하는 동기 블록 검출기(94)와; 상기 프리 엠블 검출기(91),(92),(93)의 프리 엠블 및 동기 블록 검출기(94)의 동기 신호에 의하여 실제 데이터가 동기 블록 검출기(94)에 입력되었는지 또는 프리 엠블 검출 오류인지를 판단하여 프리 엠블 동기가 확실한 경우에 동기 신호(10)를 출력하는 프리 엠블 오류 및 동기 블록 입력 판단기(5)를 구비하는 디지털 비디오 카세트 레코더에서 가변 훈련열을 갖는 적응형 등화기.The track preamble detector (91) according to claim 1, wherein the preamble detection unit (9) stores the preamble for each track and can determine the preamble by the detection data (5) currently input. 92), 93; A sync block detector 94 for determining whether the preamble of the detection data 5 is finished and data is detected; The preamble of the preamble detectors 91, 92, and 93 and the synchronization signal of the sync block detector 94 determine whether real data is input to the sync block detector 94 or a preamble detection error. Adaptive equalizer having a variable training sequence in a digital video cassette recorder having a preamble error and a sync block input determiner (5) for outputting a sync signal (10) when preamble synchronization is assured. 제1항 또는 제2항에 있어서, 상기 프리 엠블 발생부(8)는, 상기 동기 신호(10)의 입력시에 트랙별 프리 엠블을 출력하는 프리 엠블 발생기(81),(82),(83)와; 동기 신호(10)에 따라 상기 프리 엠블 발생기(81),(82),(83)의 프리 엠블을 훈련 데이터(11)로서 순차적으로 출력하는 프리 엠블 선택기(84)를 구비하는 디지털 비데오 카세트 레코더에서 가변 훈련열을 갖는 적응형 등화기.The preamble generator (8), (82), (83) according to claim 1 or 2, wherein the preamble generator (8) outputs a preamble for each track upon input of the synchronization signal (10). )Wow; In the digital video cassette recorder having a preamble selector 84 for sequentially outputting the preambles of the preamble generators 81, 82, and 83 as the training data 11 according to the synchronization signal 10. Adaptive equalizer with variable training sequence. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950060920A 1995-12-28 1995-12-28 Adaptive equalizer with variable training array in a digital video cassette recorder KR100202392B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950060920A KR100202392B1 (en) 1995-12-28 1995-12-28 Adaptive equalizer with variable training array in a digital video cassette recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950060920A KR100202392B1 (en) 1995-12-28 1995-12-28 Adaptive equalizer with variable training array in a digital video cassette recorder

Publications (2)

Publication Number Publication Date
KR970050835A true KR970050835A (en) 1997-07-29
KR100202392B1 KR100202392B1 (en) 1999-06-15

Family

ID=19445683

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950060920A KR100202392B1 (en) 1995-12-28 1995-12-28 Adaptive equalizer with variable training array in a digital video cassette recorder

Country Status (1)

Country Link
KR (1) KR100202392B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000020797A (en) * 1998-09-24 2000-04-15 전주범 Apparatus for automatically loading coefficient

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000020797A (en) * 1998-09-24 2000-04-15 전주범 Apparatus for automatically loading coefficient

Also Published As

Publication number Publication date
KR100202392B1 (en) 1999-06-15

Similar Documents

Publication Publication Date Title
EP0847199A4 (en)
KR960035582A (en) Asymmetric signal detector and signal reproducing device using the same
KR930020411A (en) Playback data processing circuit of disc player
KR970050835A (en) Adaptive Equalizer with Variable Training Rows in Digital Video Cassette Recorder
KR940022229A (en) Sync signal generator
MX9801213A (en) Method and device for encoding seamless-connection of telecine-converted video data.
KR970078188A (en) Digital signal multiplexing schedule verification method and device and digital signal multiplexing device
JPH06132923A (en) Digital data receiving circuit
KR100226855B1 (en) Device for detecting sync. signals of a dvcr
KR960038757A (en) Image signal processing device for skew compensation and noise reduction
KR0141204B1 (en) Sync. signal detection apparatus of digital replay system and data convert apparatus
KR960015652A (en) Device for extracting selected composite video signal from time division multiplexed video signal
KR940026914A (en) Signal reproduction device
KR970031825A (en) Data field sync signal and ghost cancellation reference signal generator
KR960032433A (en) Data processing method and apparatus of digital reproduction system
KR960025554A (en) NTSC / PAL-M discrimination circuit and broadcasting method discrimination method
KR970007855A (en) Digital V's Tracking Control
KR950001701A (en) Output device of voice multiple flexible accompaniment system
KR960043875A (en) Symbol clock recovery circuit
KR980004783A (en) Digital Signal Processing Equipment
KR970009249A (en) Image signal processing device for automatic channel search and memory
KR970029460A (en) V-Cal device that has the function to select when copying karaoke
JPH10262223A (en) Data reproducing device for multiplexed tex video signal
KR910008669A (en) Track Jump Control Circuit
JPH0982034A (en) Method and circuit for cancellation of bit slip

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030312

Year of fee payment: 5

LAPS Lapse due to unpaid annual fee