KR960043875A - Symbol clock recovery circuit - Google Patents

Symbol clock recovery circuit Download PDF

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Publication number
KR960043875A
KR960043875A KR1019950013291A KR19950013291A KR960043875A KR 960043875 A KR960043875 A KR 960043875A KR 1019950013291 A KR1019950013291 A KR 1019950013291A KR 19950013291 A KR19950013291 A KR 19950013291A KR 960043875 A KR960043875 A KR 960043875A
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KR
South Korea
Prior art keywords
signal
digital
analog
symbol clock
generating
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Application number
KR1019950013291A
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Korean (ko)
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KR0157530B1 (en
Inventor
김기범
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김광호
삼성전자 주식회사
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Priority to KR1019950013291A priority Critical patent/KR0157530B1/en
Publication of KR960043875A publication Critical patent/KR960043875A/en
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Publication of KR0157530B1 publication Critical patent/KR0157530B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
    • H04N5/211—Ghost signal cancellation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/015—High-definition television systems

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Synchronizing For Television (AREA)
  • Television Systems (AREA)

Abstract

1. 청구범위에 기재된 발명이 속한 기술분야1. TECHNICAL FIELD OF THE INVENTION

디지틀 고선명 텔레비젼의 수신기.Receiver of digital high-definition TV.

2. 발명이 해결하려고 하는 기술적 과제2. The technical problem to be solved by the invention

디지틀 고선명 텔레비젼의 송신측에서 전송된 신호를 수신측에서 그대로 재생하기 위한 심볼 클럭 복구회로를 제공하는데 있다.The present invention provides a symbol clock recovery circuit for reproducing a signal transmitted from a transmitting side of a digital high definition television as it is at the receiving side.

3. 발명의 해결방법의 요지3. Summary of Solution to Invention

수신되는 아나로그신호를 심볼클럭에 의해 심플링하여 디지틀신호로 변환하는 아날로그/다지틀변화수단과, 상기 디지틀신호의 기울기를 검출되여 발생된 기울기 검출신호를 래치출력하는 수단과, 상기 디지틀신호에 포함되어 있는 고스트 및 잡음을 제거한 기준신호와 상기 디지틀신호를 가산하여 왜곡신호를 발생하는 수단과, 상기 기울기 검출신호와 왜곡신호를 승산하여 오차신호를 발생하는 수단과, 상기 오차신호의 크기에 대응하는 심볼 클럭을 발생하여 상기 아날로그/디지틀변환수단으로 공급하는 수단으로 구성한다.Analog / digital change means for converting the received analog signal into a digital signal by simulating it with a symbol clock; means for latching the tilt detection signal generated by detecting the slope of the digital signal; Means for generating a distortion signal by adding an included ghost and noise reference signal and the digital signal, means for generating an error signal by multiplying the slope detection signal and the distortion signal, and corresponding to the magnitude of the error signal Means for generating a symbol clock and supplying it to the analog / digital converting means.

4. 발명의 중요한 용도4. Important uses of the invention

디지틀 고선명 텔레비젼의 송신되기 전의 신호를 수신측에서 그대로 재생한다.A signal before transmission of digital high definition television is reproduced as it is at the receiving end.

Description

심볼 클럭 복구회로Symbol clock recovery circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1 도는 본 발명에 따른 심볼 클럭 복구회로의 구성도.1 is a block diagram of a symbol clock recovery circuit according to the present invention.

Claims (5)

디지틀 고선명 텔레비젼의 심볼 클럭 복귀회로에 있어서, 수신되는 아날로그신호를 심볼클럭에 의해 샘플링하여 디지틀신호로 변환하는 아날로그/다지틀변환수단과; 상기 디지틀신호의 기울기를 검출하여 발생된 기울기 검출신호를 래치출력하는 수단과; 상기 디지틀신호에 포함되어 있는 고스트 및 잡음을 제거한 기준신호와 상기 디지틀신호를 가산하여 왜곡신호를 발생하는 수단과; 상기 기울기 검출신호와 상기 왜곡신호를 승산하여 오차신호를 발생하는 수단과; 상기 오차신호의 크기에 대응하는 상기 심볼 클럭을 발생하여 상기 아날로그/디지틀변환수단으로 공급하는 수단으로 구성된 것을 특징으로 하는 디지틀 고선명 텔레비젼 수신기의 심볼 클럭 복구회로.A symbol clock recovery circuit for digital high definition television, comprising: analog / digital conversion means for sampling a received analog signal by a symbol clock and converting the received analog signal into a digital signal; Means for latching the tilt detection signal generated by detecting the tilt of the digital signal; Means for generating a distortion signal by adding the digital signal and a reference signal from which ghost and noise are included in the digital signal; Means for generating an error signal by multiplying the slope detection signal with the distortion signal; And a means for generating the symbol clock corresponding to the magnitude of the error signal and supplying the symbol clock to the analog / digital converting means. 제 1 항에 있어서, 상기 기울기 검출신호를 래치하여 출력하는 수단이 상기 디지틀신호의 기울기를 검출하여 기울기 검출신호를 발생하는 기울기 검출수단과, 상기 기울기 검출신호를 래치하는 제 2 래치수단으로 구성된 것을 특징으로 하는 디지틀 고선명 텔레비젼 수신기의 심볼 클럭 복구회로.2. The apparatus of claim 1, wherein the means for latching and outputting the tilt detection signal comprises tilt detection means for detecting a tilt of the digital signal to generate a tilt detection signal, and second latch means for latching the tilt detection signal. A symbol clock recovery circuit of a digital high-definition television receiver. 제 1 항에 있어서, 상기 왜곡신호를 발생하는 수단이 상기 디지틀신호에 포함되어 있는 고스트와 잡음을 제거하여 등화신호로 출력하는 수단과, 전송전의 신호가 가지 수 있는 값을 저장하고 있으며 상기 디지틀신호와 비교하여 가장 유사한 신호인 기준신호를 출력하는 수단과, 상기 디지틀신호를 상기 기준신호에 동기시키기 위해 래치하는 제1 래치수단과, 상기 제 1 래치수단에서 래치된 디지틀신호와 상기 기준신호를 가산하여 왜곡신호를 발생하는 수단과, 상기 왜곡신호를 래치하는 제 3 래치수단으로 구성된 것을 특징으로 하는 디지틀 고선명 텔레비젼 수신기의 심볼 클럭 복구회로.2. The apparatus of claim 1, wherein the means for generating the distortion signal includes means for removing ghosts and noise included in the digital signal and outputting the equalized signal, and storing a value that a signal before transmission can have. Means for outputting a reference signal which is the most similar signal in comparison with the first signal, first latch means for latching the digital signal to synchronize the reference signal, and a digital signal latched by the first latch means and the reference signal. And means for generating a distortion signal, and third latching means for latching the distortion signal. 제 1 항에 있어서, 상기 오차신호 발생수단이 상기 래치된 기울기 검출신호와 상기 왜곡신호를 승산하여 오차신호를 발생하는 승산수단과, 상기 오차신호를 래치하는 제 4 래치수단으로 구성된 것을 특징으로 하는 디지틀 고선명 텔레비젼 수신기의 심볼 클럭 복구회로.2. The apparatus of claim 1, wherein the error signal generating means comprises multiplication means for generating an error signal by multiplying the latched tilt detection signal with the distortion signal, and fourth latch means for latching the error signal. Symbol Clock Recovery Circuit in Digital High Definition Television Receiver. 제 1 항에 있어서, 상기 심볼 클럭 공급수단이 상기 오차신호를 아날로그신호로 변환하는 디지틀/아날로그변환수단과, 상기 아날로그신호를 저역통과시켜 누적하는 수단과, 상기 저역통과되어 누적된 아날로그신호의 크기에 대응하는 심볼 클럭으로 변환하여 상기 아날로그/디지틀변환수단으로 공급하는 전압제어수단으로 구성된 것을 특징으로 하는 디지틀 고선명 텔레비젼 수신기의 심볼 클럭 복귀회로.2. The apparatus according to claim 1, wherein the symbol clock supply means converts the error signal into an analog signal, digital / analog converting means, low pass and accumulates the analog signal, and the magnitude of the low pass accumulated analog signal. And a voltage control means for converting the signal into a symbol clock corresponding to and supplying the analog signal to the analog / digital converting means. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950013291A 1995-05-25 1995-05-25 Symbol clock restoration circuit KR0157530B1 (en)

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Application Number Priority Date Filing Date Title
KR1019950013291A KR0157530B1 (en) 1995-05-25 1995-05-25 Symbol clock restoration circuit

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Application Number Priority Date Filing Date Title
KR1019950013291A KR0157530B1 (en) 1995-05-25 1995-05-25 Symbol clock restoration circuit

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KR960043875A true KR960043875A (en) 1996-12-23
KR0157530B1 KR0157530B1 (en) 1998-11-16

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100311522B1 (en) * 1999-07-31 2001-10-18 서평원 Distortion Signal Compensation Method and Device in Digital TV

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102028846B1 (en) 2018-12-28 2019-10-04 (주)아크에이르 Inflammatory and oxidative effects due to burns and skin cell biosynthesis to drug ointment formulations and Inflammation and oxidation inhibition due to burn and abrasion, and ointment formulation and composition

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100311522B1 (en) * 1999-07-31 2001-10-18 서평원 Distortion Signal Compensation Method and Device in Digital TV

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