KR970017920A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

Info

Publication number
KR970017920A
KR970017920A KR1019960042430A KR19960042430A KR970017920A KR 970017920 A KR970017920 A KR 970017920A KR 1019960042430 A KR1019960042430 A KR 1019960042430A KR 19960042430 A KR19960042430 A KR 19960042430A KR 970017920 A KR970017920 A KR 970017920A
Authority
KR
South Korea
Prior art keywords
chip
resin
chip carrier
terminal
bump
Prior art date
Application number
KR1019960042430A
Other languages
English (en)
Other versions
KR100272154B1 (ko
Inventor
요이치 히루타
Original Assignee
니시무로 타이조
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 니시무로 타이조, 가부시키가이샤 도시바 filed Critical 니시무로 타이조
Publication of KR970017920A publication Critical patent/KR970017920A/ko
Application granted granted Critical
Publication of KR100272154B1 publication Critical patent/KR100272154B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29109—Indium [In] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009—Pre-treatment of the bump connector or the bonding area
    • H01L2224/8101—Cleaning the bump connector, e.g. oxide removal step, desmearing
    • H01L2224/81011—Chemical cleaning, e.g. etching, flux
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83102—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0103—Zinc [Zn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01087—Francium [Fr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0133—Ternary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0134—Quaternary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15182—Fan-in arrangement of the internal vias
    • H01L2924/15184—Fan-in arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15192—Resurf arrangement of the internal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

볼그리드 어레이형, 또는 그에 준하는 외부단자를 갖추고, 장치의 소형화와 동시에, 제조비용을 줄일 수 있는 구조를 갖춘 반도체장치를 제공하는 것이다.
본 발명은 반도체 집적회로칩(10)과, 칩(10)과 전기적으로 접속되는 접속용 단자 및 이 접속용 단자에 전기적으로 접속된 범프형 외부단자(22)를 갖춘 칩캐리어(14), 칩(10)의 단자와 칩캐리어(14)의 접속용 단자를 서로 전기적으로 접속하기 위한 접속체(24)를 구비하여 구성된다. 그리고, 범프형 외부단자(22)와 접속체(24)를 서로 같은 종류의 범프재료로 구성하는 동시에, 칩(10)과 칩캐리어(14) 사이에, 칩(10)을 칩캐리어(14)에 고정하기 위한 수지층(20)을 설치한다.

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시형태에 따른 볼그리드 어레이형 반도체장치의 단면도.

Claims (8)

  1. 반도체 집적회로칩과, 상기 칩과 전기적으로 접속되는 접속용 단자 및, 이 접속용 단자에 전기적으로 접속된 범프형 외부단자를 갖춘 칩캐리어 및, 상기 칩의 단자와 상기 칩캐리어의 접속용 단자를 서로 전기적으로 접속하기 위한 접속체를 구비하고, 상기 범프형 외부단자와 상기 접속체가 서로 동종의 범프재료로 구성되고, 또한 상기 칩과 상기 칩캐리어 사이에, 상기 칩을 상기 칩캐리어에 고정하기 위한 고정체가 충전되어 있는 것을 특징으로 하는 반도체장치.
  2. 제1항에 있어서, 상기 칩캐리어에 상기 칩을 테스트할 때에 사용되는 테스트용 단자가 설치되어 있는 것을 특징으로 하는 반도체장치.
  3. 제1항에 있어서, 상기 칩캐리어가 수지계 기판인 것을 특징으로 하는 반도체장치.
  4. 제1항에 있어서, 상기 범프재료는 그 융점이 상기 수지계 기판의 내열온도보다 낮은 재료로부터 선택되고, 상기 고정체는 수지를 포함하고, 이 수지는 그 글래스 전이온도가 상기 범프재료의 융점보다 낮으며, 열팽창계수가 20∼75ppm/℃ 범위, 양율이 3000∼9500Pa의 범위에 있는 것으로부터 선택되는 것을 특징으로 하는 반도체 장치.
  5. 제2항에 있어서, 상기 칩캐리어가 수지계 기판인 것을 특징으로 하는 반도체장치.
  6. 제2항에 있어서, 상기 범프재료는 그 융점이 상기 수지계 기판의 내열온도보다 낮은 재료로부터 선택되고, 상기 고정체는 수지를 포함하고, 이 수지는 그 글래스 전이온도가 상기 범프재료의 융점보다 낮으며, 열팽창계수가 20∼75ppm/℃의 범위, 양율이 3000∼9500pa의 범위에 있는 것으로부터 선택되는 것을 특징으로 하는 반도체 장치.
  7. 제3항에 있어서, 상기 범프재료는 그 융점이 상기 수지계 기판의 내열온도보다 낮은 재료로부터 선택되고, 상기 고정체는 수지를 포함하고, 이 수지는 그 글래스 전이온도가 상기 범프재료의 융점보다 낮으며, 열팽창계수가 20∼75ppm/℃의 범위, 양율이 3000∼9500Pa의 범위에 있는 것으로부터 선택되는 것을 특징으로 하는 반도체 장치.
  8. 반도체 집적회로칩에 설치되어 있는 단자와 칩캐리어에 설치되어 있는 상기 접속용 단자를 전기적으로 접속하기 위한 접속체를 용융시킨 후, 상기 접속체를 고화시키기, 상기 칩과 상기 칩캐리어를 서로 전기적으로 접속하는 단계, 상기 칩을 상기 칩캐리어에 고정하기 위한 고정체를 용융시키고, 상기 고정체를 상기 칩과 상기 칩캐리어 사이의 공간에 충전시킨 후, 상기 고정체를 고화시키고, 상기 칩을 상기 칩캐리어에 고정하는 공정 및, 상기 칩캐리어에, 상기 접속용 단자에 전기적으로 접속되는 범프형 외부단자를 형성하는 공정을 구비하여 이루어진 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960042430A 1995-09-28 1996-09-25 반도체장치 및 그 제조방법 KR100272154B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP95-250928 1995-09-28
JP25092895A JP3311215B2 (ja) 1995-09-28 1995-09-28 半導体装置

Publications (2)

Publication Number Publication Date
KR970017920A true KR970017920A (ko) 1997-04-30
KR100272154B1 KR100272154B1 (ko) 2000-12-01

Family

ID=17215111

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960042430A KR100272154B1 (ko) 1995-09-28 1996-09-25 반도체장치 및 그 제조방법

Country Status (4)

Country Link
US (1) US5998861A (ko)
JP (1) JP3311215B2 (ko)
KR (1) KR100272154B1 (ko)
TW (1) TW348308B (ko)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3500032B2 (ja) * 1997-03-13 2004-02-23 日本特殊陶業株式会社 配線基板及びその製造方法
JP3081559B2 (ja) * 1997-06-04 2000-08-28 ニッコー株式会社 ボールグリッドアレイ型半導体装置およびその製造方法ならびに電子装置
US6448665B1 (en) * 1997-10-15 2002-09-10 Kabushiki Kaisha Toshiba Semiconductor package and manufacturing method thereof
JPH11204692A (ja) * 1998-01-19 1999-07-30 Oki Electric Ind Co Ltd 半導体装置
JPH11340265A (ja) * 1998-05-22 1999-12-10 Sony Corp 半導体装置及びその製造方法
JP3681542B2 (ja) * 1998-07-01 2005-08-10 富士通株式会社 プリント回路基板および多段バンプ用中継基板
JP4564113B2 (ja) * 1998-11-30 2010-10-20 株式会社東芝 微粒子膜形成方法
JP4130508B2 (ja) * 1999-01-22 2008-08-06 富士通株式会社 半田接合方法及び電子装置の製造方法
JP2000260792A (ja) * 1999-03-10 2000-09-22 Toshiba Corp 半導体装置
JP4058198B2 (ja) * 1999-07-02 2008-03-05 富士通株式会社 半導体装置の製造方法
JP3334693B2 (ja) 1999-10-08 2002-10-15 日本電気株式会社 半導体装置の製造方法
JP3450238B2 (ja) 1999-11-04 2003-09-22 Ｎｅｃエレクトロニクス株式会社 半導体装置及びその製造方法
KR100788011B1 (ko) * 1999-12-21 2007-12-21 어드밴스드 마이크로 디바이시즈, 인코포레이티드 플립 칩 접속부를 신뢰성 있게 하기 위해 솔더를 사용한유기 패키지
KR100398716B1 (ko) * 2000-06-12 2003-09-19 가부시키가이샤 히타치세이사쿠쇼 반도체 모듈 및 반도체 장치를 접속한 회로 기판
JP3613167B2 (ja) * 2000-10-12 2005-01-26 株式会社村田製作所 パッド電極の接続状態の検査方法
US6564986B1 (en) * 2001-03-08 2003-05-20 Xilinx, Inc. Method and assembly for testing solder joint fractures between integrated circuit package and printed circuit board
US6486554B2 (en) 2001-03-30 2002-11-26 International Business Machines Corporation Molded body for PBGA and chip-scale packages
DE10124770C1 (de) * 2001-05-21 2002-10-17 Infineon Technologies Ag Verfahren zur Kontaktierung eines elektrischen Bauelementes mit einem eine Leiterstruktur aufweisenden Substrat
US6762489B2 (en) 2001-11-20 2004-07-13 International Business Machines Corporation Jogging structure for wiring translation between grids with non-integral pitch ratios in chip carrier modules
US6911726B2 (en) * 2002-06-07 2005-06-28 Intel Corporation Microelectronic packaging and methods for thermally protecting package interconnects and components
US6680530B1 (en) 2002-08-12 2004-01-20 International Business Machines Corporation Multi-step transmission line for multilayer packaging
TWI284581B (en) * 2002-09-18 2007-08-01 Ebara Corp Bonding material and bonding method
JP4110992B2 (ja) 2003-02-07 2008-07-02 セイコーエプソン株式会社 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法
JP2004349495A (ja) 2003-03-25 2004-12-09 Seiko Epson Corp 半導体装置、電子デバイス、電子機器および半導体装置の製造方法
US7218007B2 (en) * 2004-09-28 2007-05-15 Intel Corporation Underfill material to reduce ball limiting metallurgy delamination and cracking potential in semiconductor devices
JP2006210852A (ja) * 2005-01-31 2006-08-10 Toshiba Corp 表面実装型回路部品を実装する回路基板及びその製造方法
US20070045845A1 (en) * 2005-08-31 2007-03-01 Anand Lal Ball grid array interface structure and method
TWI286829B (en) * 2006-01-17 2007-09-11 Via Tech Inc Chip package
JP4830744B2 (ja) 2006-09-15 2011-12-07 パナソニック株式会社 電子部品実装用接着剤及び電子部品実装構造体
US8569876B2 (en) * 2006-11-22 2013-10-29 Tessera, Inc. Packaged semiconductor chips with array
JP2008226926A (ja) * 2007-03-08 2008-09-25 Sumitomo Bakelite Co Ltd 液状封止樹脂組成物、半導体装置および半導体装置の製造方法
US8557700B2 (en) 2008-05-09 2013-10-15 Invensas Corporation Method for manufacturing a chip-size double side connection package
US20100052122A1 (en) * 2008-08-27 2010-03-04 Advanced Semiconductor Engineering, Inc. Wire bodning package structure
JP5029587B2 (ja) * 2008-12-09 2012-09-19 パナソニック株式会社 電子部品実装構造および電子部品実装方法
KR101565551B1 (ko) 2009-01-07 2015-11-03 삼성전자 주식회사 플립칩 실장체 및 상기 플립칩 실장 방법
JP5316261B2 (ja) * 2009-06-30 2013-10-16 富士通株式会社 マルチチップモジュールおよびプリント基板ユニット並びに電子機器
JP2011018749A (ja) * 2009-07-08 2011-01-27 Olympus Corp 電子装置と電子装置の製造方法
US9640437B2 (en) 2010-07-23 2017-05-02 Tessera, Inc. Methods of forming semiconductor elements using micro-abrasive particle stream
US8847380B2 (en) 2010-09-17 2014-09-30 Tessera, Inc. Staged via formation from both sides of chip
US8610259B2 (en) 2010-09-17 2013-12-17 Tessera, Inc. Multi-function and shielded 3D interconnects
US8736066B2 (en) 2010-12-02 2014-05-27 Tessera, Inc. Stacked microelectronic assemby with TSVS formed in stages and carrier above chip
US8587126B2 (en) 2010-12-02 2013-11-19 Tessera, Inc. Stacked microelectronic assembly with TSVs formed in stages with plural active chips
US9137903B2 (en) * 2010-12-21 2015-09-15 Tessera, Inc. Semiconductor chip assembly and method for making same
US8709933B2 (en) 2011-04-21 2014-04-29 Tessera, Inc. Interposer having molded low CTE dielectric
JP5509295B2 (ja) * 2012-11-02 2014-06-04 パナソニック株式会社 半導体装置
JP6219695B2 (ja) * 2013-11-27 2017-10-25 京セラ株式会社 配線基板およびそれを備えた半導体装置
JP6387522B2 (ja) * 2014-12-03 2018-09-12 パナソニックＩｐマネジメント株式会社 実装構造体
TWI609465B (zh) * 2015-12-17 2017-12-21 頎邦科技股份有限公司 散熱封裝構造
US10181447B2 (en) 2017-04-21 2019-01-15 Invensas Corporation 3D-interconnect
US11127706B2 (en) * 2018-09-28 2021-09-21 Intel Corporation Electronic package with stud bump electrical connections
JP7500994B2 (ja) * 2020-02-27 2024-06-18 セイコーエプソン株式会社 半導体装置
US12040284B2 (en) 2021-11-12 2024-07-16 Invensas Llc 3D-interconnect with electromagnetic interference (“EMI”) shield and/or antenna

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62136865A (ja) * 1985-12-11 1987-06-19 Hitachi Ltd モジユ−ル実装構造
US4999699A (en) * 1990-03-14 1991-03-12 International Business Machines Corporation Solder interconnection structure and process for making
JPH0430544A (ja) * 1990-05-28 1992-02-03 Hitachi Ltd 半導体集積回路装置
JP3150351B2 (ja) * 1991-02-15 2001-03-26 株式会社東芝 電子装置及びその製造方法
US5334857A (en) * 1992-04-06 1994-08-02 Motorola, Inc. Semiconductor device with test-only contacts and method for making the same
JPH06295935A (ja) * 1993-04-07 1994-10-21 Hitachi Ltd 半導体パッケージ
EP0657932B1 (en) * 1993-12-13 2001-09-05 Matsushita Electric Industrial Co., Ltd. Chip package assembly and method of production
JPH07193184A (ja) * 1993-12-27 1995-07-28 Fujitsu Ltd マルチチップモジュールの製造方法及びマルチチップモジュール
KR100194130B1 (ko) * 1994-03-30 1999-06-15 니시무로 타이죠 반도체 패키지
JP3233535B2 (ja) * 1994-08-15 2001-11-26 株式会社東芝 半導体装置及びその製造方法
US5542174A (en) * 1994-09-15 1996-08-06 Intel Corporation Method and apparatus for forming solder balls and solder columns
US5710695A (en) * 1995-11-07 1998-01-20 Vlsi Technology, Inc. Leadframe ball grid array package

Also Published As

Publication number Publication date
JP3311215B2 (ja) 2002-08-05
TW348308B (en) 1998-12-21
US5998861A (en) 1999-12-07
KR100272154B1 (ko) 2000-12-01
JPH0992685A (ja) 1997-04-04

Similar Documents

Publication Publication Date Title
KR970017920A (ko) 반도체장치 및 그 제조방법
US6257215B1 (en) Resin-sealed electronic apparatus for use in internal combustion engines
CN100521199C (zh) 散热电子装置及其形成方法
KR970077572A (ko) 접착필름을 갖는 회로테이프, 반도체장치 및 그의 제조방법
KR960019670A (ko) 반도체칩 패키지 및 그의 제조 방법
KR970053206A (ko) 반도체 장치 및 그 제조 방법
JP3725296B2 (ja) 測定抵抗体を有する温度センサ
US20140262498A1 (en) Interconnect Device and Assemblies Made Therewith
JPS62276838A (ja) 半導体装置
KR940022755A (ko) 반도체 장치 및 그 제조방법과 반도체장치용 리드프레임(Lead frame)
KR950021435A (ko) 수지 봉지형 반도체 장치 및 그 제조 방법
JPH0613508A (ja) 熱インターフェース
WO2002016897A3 (en) High temperature circuit structures
US6293803B1 (en) Zee electrical interconnect
GB2188485A (en) Integrated circuit chip mounting and packaging assembly
JP2001015682A (ja) 樹脂封止型電子装置
JPS6151838A (ja) 半導体装置
KR880005683A (ko) Lsi칩 실장(實裝)구조체
CN100565852C (zh) 具有芯片级封装外壳的半导体器件
KR970024043A (ko) 금속성 전자 부품 패키지 장치(metallic electronic component package device)
RU2145732C1 (ru) Модуль интегральной схемы
JPS61259470A (ja) 半導体チツプに直接相互連結させるための圧着式電気ソケツト
CA2017080C (en) Semiconductor device package structure
US5990565A (en) Flip chip package
US6020638A (en) Packaging structure of BGA type semiconductor device mounted on circuit substrate

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
AMND Amendment
E601 Decision to refuse application
AMND Amendment
J201 Request for trial against refusal decision
E902 Notification of reason for refusal
B701 Decision to grant
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030801

Year of fee payment: 4

LAPS Lapse due to unpaid annual fee