KR960030339A - 반도체장치 및 그 제조공정 - Google Patents
반도체장치 및 그 제조공정 Download PDFInfo
- Publication number
- KR960030339A KR960030339A KR1019960001977A KR19960001977A KR960030339A KR 960030339 A KR960030339 A KR 960030339A KR 1019960001977 A KR1019960001977 A KR 1019960001977A KR 19960001977 A KR19960001977 A KR 19960001977A KR 960030339 A KR960030339 A KR 960030339A
- Authority
- KR
- South Korea
- Prior art keywords
- thin film
- refractory metal
- semiconductor device
- metal thin
- silicon substrate
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims abstract 8
- 239000010409 thin film Substances 0.000 claims abstract description 37
- 239000003870 refractory metal Substances 0.000 claims abstract 33
- 230000008018 melting Effects 0.000 claims abstract 7
- 238000002844 melting Methods 0.000 claims abstract 7
- 239000002210 silicon-based material Substances 0.000 claims abstract 7
- 238000000034 method Methods 0.000 claims abstract 6
- 125000005843 halogen group Chemical group 0.000 claims abstract 5
- 229910021332 silicide Inorganic materials 0.000 claims abstract 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract 4
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 11
- 229910052710 silicon Inorganic materials 0.000 claims 11
- 239000010703 silicon Substances 0.000 claims 11
- 239000010410 layer Substances 0.000 claims 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 4
- 239000010408 film Substances 0.000 claims 4
- 229910001507 metal halide Inorganic materials 0.000 claims 4
- 150000005309 metal halides Chemical class 0.000 claims 4
- 150000002736 metal compounds Chemical class 0.000 claims 3
- 230000015572 biosynthetic process Effects 0.000 claims 2
- 238000005229 chemical vapour deposition Methods 0.000 claims 2
- 239000011229 interlayer Substances 0.000 claims 2
- 239000000203 mixture Substances 0.000 claims 2
- 238000007670 refining Methods 0.000 claims 2
- 238000001179 sorption measurement Methods 0.000 claims 2
- 125000001309 chloro group Chemical group Cl* 0.000 claims 1
- 238000000151 deposition Methods 0.000 claims 1
- 238000009792 diffusion process Methods 0.000 claims 1
- 239000011888 foil Substances 0.000 claims 1
- 239000007789 gas Substances 0.000 claims 1
- 239000012535 impurity Substances 0.000 claims 1
- 238000009832 plasma treatment Methods 0.000 claims 1
- XJDNKRIXUMDJCW-UHFFFAOYSA-J titanium tetrachloride Chemical group Cl[Ti](Cl)(Cl)Cl XJDNKRIXUMDJCW-UHFFFAOYSA-J 0.000 claims 1
- 230000004888 barrier function Effects 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
- H01L29/41783—Raised source or drain electrodes self aligned with the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
실리콘계재료층과 실리콘계재료층상에 성막된 적층구조와를 포함하는 반도체장치로, 상기 적층구조는 고융점금속박막 및/또는 고융점규화금속박막으로 이루어지게 되며, 여기서 각각의 고융점금속박막 및/또는 고융점규화금속박막의 할로겐원자함량이 각각의 고융점금속박막 및/또는 고융점규화금속박막의 양을 기초로 중량비 1% 이하에 있다. 본 발명에 따르면, 그러한 반도체장치를 제조하는 공정이 또한 제공된다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 티타늄박막과 질화티타늄박막이 차례로 접촉공동의 내부면상에 배리어금속층으로써 성막되며, 또한 배선층이 상기 배리어금속층상에 성막되는 본 발명에 따르는 반도체웨이퍼의 일실시예를 개략적으로 나타내는 단면도.
Claims (15)
- 실리콘계재료층과; 상기 실리콘계재료층상에 형성되는 것으로 고융점금속박막 및/또는 고융점규화금속박막으로 이루어지게 되는 적층구조와;를 포함하며, 여기서 각각의 상기 고융점금속박막 및/또는 상기 고융점규화금속박막의 할로겐원자함량이 각각의 상기 고융점금속박막 및/또는 상기 고융점규화금속박막의 양을 기초로 중량비 1% 이하인 것을 특징으로 하여 구성된 반도체장치.
- 제1항에 있어서, 상기 고융점금속박막 및/또는 상기 고융점규화금속박막의 할로겐원자함량이 각각의 상기 고융점금속박막 및/또는 상기 고융점규화금속박막의 양을 기초로 중량비 0.2~0.7%의 범위내에 있는 것을 특징으로 하여 구성된 반도체장치.
- 제1항에 있어서, 상기 고융점금속박막 및/또는 상기 고융점규화금속박막상에 성막된 고융점금속컴파운드박막을 더한층 포함하여 구성된 것을 특징으로 하는 반도체장치.
- 제1항에 있어서, 상기 실리콘계재료층은 실리콘기판과 그위에 형성된 층간절연층과로 이루어지며, 상기 층간절연층은 상기 실리콘기판과 대향하는 접촉공동을 가지며, 상기 적층구조가 적어도 상기 접촉공동의 저면부에 성막되는 것을 특징으로 하여 구성된 반도체장치.
- 제1항에 있어서, 상기 적층구조는 그 표면에 가까운 위치에 선택적으로 부설된 상기 실리콘계재료층의 불순물확산영역 또는 상기 실리콘계재료층에 부설된 게이트전극상에 셀프-어라인(self-aligned)식으로 성막되는 것을 특징으로 하여 구성된 반도체장치.
- 제1항에 있어서, 상기 고융점금속박막 및/또는 상기 고융점규화금속박막은 상기 고융점금속으로써는 티타늄을 상기 할로겐원자로써는 염소원자를 포함하는 것을 특징으로 하여 구성된 반도체장치.
- 제2항에 있어서, 상기 고융점금속컴파운드박막은 질화티타늄박막인 것을 특징으로 하여 구성된 반도체장치.
- 상기 고융점금속박막의 성막시, 수소가스로부터 유도된 제1리액터의 상기 실리콘기판에 대한 흡착반응이 상기 고융점금속할로겐화물에서 유도된 제2리액터의 상기 실리콘기판에 대한 흡착반응과 비교할 때 보다 우선적으로 수행되도록 초과량의 수소가스를 공급함으로써, 고융점금속할로겐화물에서 적어도 하나의 할로겐원자를 제거시킴으로써 얻어진 제3리액터의 성막이 촉진되게 되는 단계를 포함하는 것을 특징으로 하여, 내부실리콘재료층이 그 적어도 한 부분에 노출되어 있는 실리콘기판과, 고융점금속할로겐화물과 수소가스의 혼합물이 사용되는 플라즈마 화학적기상성장(CVD)법을 사용하여 상기 실리콘기판상에 성막된 고융점금속박막과를 포함하여 구성된 반도체장치를 제조하는 공정.
- 제8항에 있어서, 상기 고융점금속박막의 성막시 상기 실리콘기판에 바이어스전압을 가하는 것을 특징으로 하는 반도체장치 제조공정.
- 제8항에 있어서, 고융점금속박막의 성막 후에 상기 고융점금속박막상에 고융점금속컴파운드박막을 성막시키는 단계를 더한층 포함하는 것을 특징으로 하는 반도체장치 제조공정.
- 제8항에 있어서, 상기 내부실리콘재료층이 노출된 영역상에 성막된 상기 고융점금속박막을 실리사이드화 시킴으로써 고융점규화금속박막을 제조하게 되는 단계를 더한층 포함하는 것을 특징으로 하는 반도체장치 제조공정.
- 제8항에 있어서, 상기 고융점금속할로겐화물은 4염화티타늄이고 상기 제조된 고융점금속박막은 티타늄박막인 것을 특징으로 하는 반도체장치 제조공정.
- 제10항에 있어서, 상기 제조된 고융점금속박막이 질화티타늄박막인 것을 특징으로 하는 반도체장치 제조공정.
- 제8항에 있어서, 상기 실리콘기판상에 상기 고융점금속박막을 성막하기에 앞서 상기 실리콘기판의 표면에서 자연산화층을 제거시키는 단계와; 상기 실리콘기판이 대기와 접촉하게 되는 것을 방지하면서 상기 고융점금속박막의 상기 성막을 수행하는 단계와; 를 더한층 포함하는 것을 특징으로 하는 반도체장치 제조공정.
- 제14항에 있어서, 상기 자연산화층의 상기 제거는 수소가스와 회토류가스와의 혼합물을 사용하는 플라즈마처리에 의해 수행되는 것을 특징으로 하는 반도체장치 제조공정.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7014688A JPH08213343A (ja) | 1995-01-31 | 1995-01-31 | 半導体装置およびその製造方法 |
JP95-014688 | 1995-01-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR960030339A true KR960030339A (ko) | 1996-08-17 |
Family
ID=11868146
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960001977A KR960030339A (ko) | 1995-01-31 | 1996-01-29 | 반도체장치 및 그 제조공정 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5831335A (ko) |
JP (1) | JPH08213343A (ko) |
KR (1) | KR960030339A (ko) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5700716A (en) * | 1996-02-23 | 1997-12-23 | Micron Technology, Inc. | Method for forming low contact resistance contacts, vias, and plugs with diffusion barriers |
US5789317A (en) * | 1996-04-12 | 1998-08-04 | Micron Technology, Inc. | Low temperature reflow method for filling high aspect ratio contacts |
US5661085A (en) * | 1996-06-17 | 1997-08-26 | Chartered Semiconductor Manufacturing Pte, Ltd. | Method for forming a low contact leakage and low contact resistance integrated circuit device electrode |
US5725739A (en) * | 1996-07-08 | 1998-03-10 | Micron Technology, Inc. | Low angle, low energy physical vapor deposition of alloys |
US6040010A (en) | 1996-09-10 | 2000-03-21 | Micron Technology, Inc. | Catalytic breakdown of reactant gases in chemical vapor deposition |
JP4101901B2 (ja) * | 1997-04-25 | 2008-06-18 | シャープ株式会社 | 半導体装置の製造方法 |
US6020259A (en) * | 1997-05-01 | 2000-02-01 | Mosel Vitelic, Inc. | Method of forming a tungsten-plug contact for a semiconductor device |
TW353206B (en) | 1997-05-17 | 1999-02-21 | United Microelectronics Corp | Process for producing self-aligned salicide having high temperature stability |
US6107192A (en) * | 1997-12-30 | 2000-08-22 | Applied Materials, Inc. | Reactive preclean prior to metallization for sub-quarter micron application |
JP3514423B2 (ja) | 1998-10-23 | 2004-03-31 | 沖電気工業株式会社 | TiSi2層の形成方法 |
US5998873A (en) * | 1998-12-16 | 1999-12-07 | National Semiconductor Corporation | Low contact resistance and low junction leakage metal interconnect contact structure |
US6614082B1 (en) | 1999-01-29 | 2003-09-02 | Micron Technology, Inc. | Fabrication of semiconductor devices with transition metal boride films as diffusion barriers |
JP3403357B2 (ja) | 1999-06-03 | 2003-05-06 | 株式会社半導体先端テクノロジーズ | 配線形成方法及び配線形成装置 |
US6114735A (en) * | 1999-07-02 | 2000-09-05 | Micron Technology, Inc. | Field effect transistors and method of forming field effect transistors |
US6284611B1 (en) * | 1999-12-20 | 2001-09-04 | Taiwan Semiconductor Manufacturing Company | Method for salicide process using a titanium nitride barrier layer |
US6759325B2 (en) | 2000-05-15 | 2004-07-06 | Asm Microchemistry Oy | Sealing porous structures |
US6482733B2 (en) | 2000-05-15 | 2002-11-19 | Asm Microchemistry Oy | Protective layers prior to alternating layer deposition |
KR100385947B1 (ko) * | 2000-12-06 | 2003-06-02 | 삼성전자주식회사 | 원자층 증착 방법에 의한 박막 형성 방법 |
EP1421607A2 (en) | 2001-02-12 | 2004-05-26 | ASM America, Inc. | Improved process for deposition of semiconductor films |
US7186630B2 (en) | 2002-08-14 | 2007-03-06 | Asm America, Inc. | Deposition of amorphous silicon-containing films |
US7153772B2 (en) * | 2003-06-12 | 2006-12-26 | Asm International N.V. | Methods of forming silicide films in semiconductor devices |
US7208398B2 (en) * | 2004-03-17 | 2007-04-24 | Texas Instruments Incorporated | Metal-halogen physical vapor deposition for semiconductor device defect reduction |
US7816236B2 (en) * | 2005-02-04 | 2010-10-19 | Asm America Inc. | Selective deposition of silicon-containing films |
US7608549B2 (en) * | 2005-03-15 | 2009-10-27 | Asm America, Inc. | Method of forming non-conformal layers |
WO2007078802A2 (en) * | 2005-12-22 | 2007-07-12 | Asm America, Inc. | Epitaxial deposition of doped semiconductor materials |
US8278176B2 (en) | 2006-06-07 | 2012-10-02 | Asm America, Inc. | Selective epitaxial formation of semiconductor films |
JP5309454B2 (ja) | 2006-10-11 | 2013-10-09 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
JP5211503B2 (ja) | 2007-02-16 | 2013-06-12 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
US8367548B2 (en) * | 2007-03-16 | 2013-02-05 | Asm America, Inc. | Stable silicide films and methods for making the same |
US7759199B2 (en) | 2007-09-19 | 2010-07-20 | Asm America, Inc. | Stressor for engineered strain on channel |
US7939447B2 (en) | 2007-10-26 | 2011-05-10 | Asm America, Inc. | Inhibitors for selective deposition of silicon containing films |
US7655543B2 (en) * | 2007-12-21 | 2010-02-02 | Asm America, Inc. | Separate injection of reactive species in selective formation of films |
US8278205B2 (en) * | 2008-03-12 | 2012-10-02 | Tokyo Electron Limited | Semiconductor device and method for manufacturing the same |
US8486191B2 (en) | 2009-04-07 | 2013-07-16 | Asm America, Inc. | Substrate reactor with adjustable injectors for mixing gases within reaction chamber |
JP2011100962A (ja) * | 2009-10-09 | 2011-05-19 | Tokyo Electron Ltd | 成膜方法及びプラズマ処理装置 |
US8367528B2 (en) | 2009-11-17 | 2013-02-05 | Asm America, Inc. | Cyclical epitaxial deposition and etch |
US8809170B2 (en) | 2011-05-19 | 2014-08-19 | Asm America Inc. | High throughput cyclical epitaxial deposition and etch process |
US10714334B2 (en) * | 2017-11-28 | 2020-07-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Conductive feature formation and structure |
-
1995
- 1995-01-31 JP JP7014688A patent/JPH08213343A/ja active Pending
-
1996
- 1996-01-24 US US08/590,671 patent/US5831335A/en not_active Expired - Fee Related
- 1996-01-29 KR KR1019960001977A patent/KR960030339A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
US5831335A (en) | 1998-11-03 |
JPH08213343A (ja) | 1996-08-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR960030339A (ko) | 반도체장치 및 그 제조공정 | |
US5733816A (en) | Method for depositing a tungsten layer on silicon | |
US5132756A (en) | Method of manufacturing semiconductor devices | |
KR100236668B1 (ko) | 저항 및 결함밀도가 낮은 텅스텐 접점을 실리콘 반도체 웨이퍼에 형성하기위한 방법 | |
US6214714B1 (en) | Method of titanium/titanium nitride integration | |
US5747384A (en) | Process of forming a refractory metal thin film | |
KR900013588A (ko) | 막 형성 방법 | |
KR940016484A (ko) | 반도체장치 및 그 제조방법 | |
KR950000921A (ko) | 고융점 금속질소화물의 증착방법 및 고융점 금속질소화물을 함유하는 전도막의 형성방법 | |
JPH11238698A (ja) | 原子層蒸着工程を用いた金属層形成方法 | |
KR20030044800A (ko) | 저저항 게이트 전극을 구비하는 반도체 장치 | |
JPH0577327B2 (ko) | ||
US4892843A (en) | Method of manufacturing a semiconductor device | |
US20060163677A1 (en) | Methods of forming a semiconductor device having a metal gate electrode and associated devices | |
US20020192396A1 (en) | Method of titanium/titanium nitride integration | |
KR100477816B1 (ko) | 반도체 소자의 티타늄 실리사이드 콘택 형성 방법 | |
KR100510473B1 (ko) | 원자층 증착법을 이용한 반도체소자의 커패시터 상부 전극 형성방법 | |
US6548404B2 (en) | Method and apparatus for manufacturing semiconductor devices | |
US6174805B1 (en) | Titanium film forming method | |
KR100313256B1 (ko) | 반도체장치및그제조방법 | |
JPH08186173A (ja) | 半導体装置の製造方法 | |
KR100623612B1 (ko) | 반도체소자의 금속배선 형성방법 | |
JPH04112529A (ja) | 半導体装置の製造方法 | |
KR100259166B1 (ko) | 반도체 소자의 제조방법 | |
JPH0745554A (ja) | 配線形成方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |