KR960015884A - Lead frame - Google Patents

Lead frame Download PDF

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Publication number
KR960015884A
KR960015884A KR1019940025861A KR19940025861A KR960015884A KR 960015884 A KR960015884 A KR 960015884A KR 1019940025861 A KR1019940025861 A KR 1019940025861A KR 19940025861 A KR19940025861 A KR 19940025861A KR 960015884 A KR960015884 A KR 960015884A
Authority
KR
South Korea
Prior art keywords
lead frame
semiconductor chip
guide ring
chip mounting
mounting plate
Prior art date
Application number
KR1019940025861A
Other languages
Korean (ko)
Other versions
KR0137068B1 (en
Inventor
신원선
김리훈
Original Assignee
황인길
아남산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 황인길, 아남산업 주식회사 filed Critical 황인길
Priority to KR1019940025861A priority Critical patent/KR0137068B1/en
Priority to JP7220236A priority patent/JP2820645B2/en
Priority to US08/520,429 priority patent/US5723899A/en
Publication of KR960015884A publication Critical patent/KR960015884A/en
Application granted granted Critical
Publication of KR0137068B1 publication Critical patent/KR0137068B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01041—Niobium [Nb]

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

본 발명은 리드 프레임에 관한 것으로써, 반도체 패키지의 제조공정에서 사용되는 여러가지 원자제 가운데 하나인 리드 프레임에 가이드 링을 형성시키고, 가이드 링에 반도체 칩의 신호 라인패드, 파워 라인 패드, 그라운드 라인 패드 둥을 와이어로 동시에 연결시켜 주므로써, 반도체 칩의 고집적화에 일조할 수 있는 리드프레임을 제공하고자 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame, in which a guide ring is formed on a lead frame, which is one of various atoms used in the manufacturing process of a semiconductor package, and a signal line pad, power line pad, and ground line pad of a semiconductor chip is formed on the guide ring. By simultaneously connecting the wires with wires, it is intended to provide a lead frame that can contribute to high integration of semiconductor chips.

Description

리드 프레임Lead frame

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 따른 리드 프레임의 일 구현예를 나타내는 평면도,2 is a plan view showing an embodiment of a lead frame according to the present invention;

제3도는 본 발명에 따른 리드 프레임의 다른 구현예를 나타내는 평면도,3 is a plan view showing another embodiment of a lead frame according to the present invention,

제4도는 본 발명에 따른 리드 프레임의 또 다른 구현예를 나타내는 평면도.4 is a plan view showing another embodiment of a lead frame according to the present invention.

Claims (7)

다수의 칩 패드(11)를 가지는 반도체 칩(12)의 상면에 탑재되어 있는 반도체 칩 탑재판(13)와, 이 반도체 칩 탑재판(13)의 각 모서리에 다운셋(14)을 가지면서 일체로 형성되어 있는 타이 바(15)와, 상기 반도체 칩 탑재판(13)의, 사방에 위치되어 있는 다수의 리드(16)로 이루어져 있는 리드 프레임에 있어서, 상기 반도체 칩 탑재판(13)의 각모서리에는 가이드 링(17)이 형성되어 있다. 이 가이드 링(17)의 일부분은 반도체 칩 탑재판(13)과 다수의 리드(16) 사이에 위치되도록 형성되어 있는 것을 특징으로 하는 리드 프레임.The semiconductor chip mounting plate 13 mounted on the upper surface of the semiconductor chip 12 having a plurality of chip pads 11 and the downset 14 at each corner of the semiconductor chip mounting plate 13 are integrated. Each of the semiconductor chip mounting plates 13 has a lead frame including a tie bar 15 formed of a plurality of leads and a plurality of leads 16 located in all directions of the semiconductor chip mounting plate 13. Guide rings 17 are formed at the corners. A part of the guide ring (17) is formed so as to be positioned between the semiconductor chip mounting plate (13) and the plurality of leads (16). 제1항에 있어서, 상기 가이드 링(17)의 일끝단은 일 리드(16)에 일체로 연결되어 있고, 다른 일끝단은 인접하는 가이드 링(17)의 일끝단에 일체로 연결되면서 동시에 일 리드(16)의 일끝단에 일체로 연결되어 있는 것을 특징으로 하는 리드 프레임.According to claim 1, one end of the guide ring 17 is integrally connected to one lead 16, the other end is integrally connected to one end of the adjacent guide ring 17 and at the same time A lead frame, which is integrally connected to one end of (16). 제1항에 있어서, 상기 가이드 링(17)의 일끝단만이 일 리드(16)에 일체로 연결되어 있는 것을 특징으로 하는 리드 프레임.A lead frame according to claim 1, wherein only one end of the guide ring (17) is integrally connected to the one lead (16). 제1항에 있어서, 상기 가이드 링(17)의 양끝만은 인접하는 가이드 링(17)의 끝단에 일체로 서로 연결되어 있는 것을 특징으로 하는 리드 프레임.2. A lead frame according to claim 1, wherein only both ends of the guide ring (17) are integrally connected to each other at the ends of adjacent guide rings (17). 제1항에 있어서, 상기 반도체 칩 탑재판(13)의 양면 혹은 사면에는 적어도 2개 이상의 타이바(15)가 다운셋(14)을 가지면서 연결되어 있는 것을 특징으로 하는 리드 프레임.The lead frame according to claim 1, wherein at least two tie bars (15) are connected to both surfaces or slopes of the semiconductor chip mounting plate (13) with a downset (14). 제1항에 있어서, 상기 가이드 링(17)에는 적어도 1개 이상의 집 패드(11)가 와이어를 매개체로 연결되어 있는 것을 특징으로 하는 리드 프레임.The lead frame according to claim 1, wherein at least one zip pad (11) is connected to the guide ring (17) via a medium. 제1항 또는 제4항에 있어서, 상기 가이드 링(17)의 일부분은 다운셋(14)을 가지면서 연장되어 반도체 칩 탑재판(13)의 각 모서리에 연결되어 있는 것을 특징으로 하는 리드 프레임.The lead frame according to claim 1 or 4, wherein a part of the guide ring (17) extends with a downset (14) and is connected to each corner of the semiconductor chip mounting plate (13). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940025861A 1994-08-30 1994-10-10 Lead frame KR0137068B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019940025861A KR0137068B1 (en) 1994-10-10 1994-10-10 Lead frame
JP7220236A JP2820645B2 (en) 1994-08-30 1995-08-29 Semiconductor lead frame
US08/520,429 US5723899A (en) 1994-08-30 1995-08-29 Semiconductor lead frame having connection bar and guide rings

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940025861A KR0137068B1 (en) 1994-10-10 1994-10-10 Lead frame

Publications (2)

Publication Number Publication Date
KR960015884A true KR960015884A (en) 1996-05-22
KR0137068B1 KR0137068B1 (en) 1998-04-24

Family

ID=19394762

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940025861A KR0137068B1 (en) 1994-08-30 1994-10-10 Lead frame

Country Status (1)

Country Link
KR (1) KR0137068B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970053748A (en) * 1995-12-30 1997-07-31 황인길 Leadframe of Semiconductor Package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970053748A (en) * 1995-12-30 1997-07-31 황인길 Leadframe of Semiconductor Package

Also Published As

Publication number Publication date
KR0137068B1 (en) 1998-04-24

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