KR950034761A - 고전압ㆍ금속 산화물 반도체 장치 및 그 제조 방법 - Google Patents

고전압ㆍ금속 산화물 반도체 장치 및 그 제조 방법 Download PDF

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KR950034761A
KR950034761A KR1019950008215A KR19950008215A KR950034761A KR 950034761 A KR950034761 A KR 950034761A KR 1019950008215 A KR1019950008215 A KR 1019950008215A KR 19950008215 A KR19950008215 A KR 19950008215A KR 950034761 A KR950034761 A KR 950034761A
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drift region
high voltage
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rim
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피터 메이 챠-쿠
말히 새트윈더
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윌리엄 이. 힐러
텍사스 인스트루먼츠 인코포레이티드
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
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    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
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Abstract

고전압 PMOS 트랜지스터(7)은 두꺼운 필드 산화물(43)의 성장 동안에 발생하는 불수물 분리를 보상하기 위해 저 농도로 도핑된 드리프트 영역 림(48)내의 불순물 농도를 조절함으로써 온-저항을 향상시킨다. 고전압 PMOS 장치(7)의 제조동안에, 얕은 수직 접점(230)은 불순물 분리에 의해 필드 산화물(43)내로 형성된다. HV 드리프트 영역 p-탱크 림 조절 영역(220)을 주입 및 어닐링시키으로써, 측방향 접점(250)을 형성하고 필드 산화물(43)아래의 얕은 접점(230)을 분리시킨다. 그러므로, 고전압 PMOS 트랜지스터(7)의 온-저항은 최소화된다.

Description

고전압금속 산화물 반도체 장치 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따라 집적 회로 상에 형성된 HV PMOS 장치를 도시한 집적회로의 횡단면도.

Claims (7)

  1. 고전압 P-채널 금속 산화물 반도체(PMOS)장치를 제조하는 방법에 있어서, 채널 영역에 인접한 저 농도로 도핑된 드리프트 영역을 갖고 고 전압 PMOS 장치를 제공하는 단계; 및 상기 채널 영역의 림(rim)내에 부가적 불순물 농도를 주입하는 단계를 포함하는 것을 특징으로 하는 PMOS 장치 제조 방법.
  2. 고전압 P-채널 금속 산화물 반도체(PMOS)장치를 제조하는 방법에 있어서, n-채널 영역에 인접한 p-형 불순물 농도를 갖는 깊이로 저 농도 도핑된 드리프트 영역 p-탱크를 형성하는 단계; 상기 드리프트 영역 p-탱크의 일부분 위에 고전압 필드 산화물을 성장시키는 단계; 및 상기 필드 산화물 성장 단계에서 발생된 드리프트 영역 림 내의 불순물 농도의 감소가 효과적으로 제거되도록, 상기 채널 영역에 인접한 상기 드리프트 영역내에서 상기 필드 산화물의 일부분 아래에 드리프트 영역 림 조절 영역(adjustment)을 주입하는 단계를 포함하는 것을 특징으로 하는 PMOS 장치 제조 방법.
  3. 제2항에 있어서, 상기 드리프트 영역 p-탱크를 형성하는 상기 단계가 상기 드리프트 영역 p-탱크의 깊이를 대략 5um보다 작게 제한하는 것을 특징으로 하는 PMOS 장치 제조 방법.
  4. 제2항에 있어서, 상기 드리프트 영역 p-탱크를 형성하는 상기 단계가 불순물로 붕소를 사용하며; 상기 드리프트 영역 p-탱크 림 조절 영역을 주입하는 상기 단계가 불순물로 붕소를 사용하는 것을 특징으로 하는 PMOS 장치 제조 방법.
  5. 제2항에 있어서, 상기 고전압 드리프트 영역 p-탱크를 형성하는 상기 단계가 약 1e15/㎤의 붕소 농도보다 더 큰 불순물 농도로 상기 드리프트 영역 p-탱크를 주입하는 단계를 포함하고; 상기 HV PMOS필드 산화물을 성장시키는 상기 단계가 대략 0.6um보다 큰 두께로 상기 필드 산화물을 성장시키는 단계를 포함하며; 상기 고전압 드리프느 영역 p-탱크 림 조절 영역을 주입하는 상기 단계가 약 0.5e13/㎤의 붕소 농도보다 더 큰 불순물 농도로 상기 고전압 드리프트 영역; p-탱크 림을 주입하는 단계를 포함하는 것을 특징으로 하는 PMOS 장치 제조 방법.
  6. 고전압 p-채널 금속 산화물 반도체(PMOS)장치에 있어서, 림과 일정 깊이를 가지며, 반도체 기판 내에 형성된 붕소의 불순물 농도를 고전압 드리프트 영역 p-탱크; 상기 드리프트 영역 p-탱크의 림에 인접한 n-형 채널 영역; 상기 고전압 드리프트 영역의 일부분에 위해 형성된 일정 두께의 고전압 필드 산화물; 상기 채널 영역에 위에 형성되며, 상기 고전압 필드 산화물의 일부분을 덮는 엣지를 갖는 고전압 게이트 산화물; 및 상기 드리프트 영역 p-탱크의 림과 상기 채널 영역 사이의 측방향 접점을 포함하는 것을 특징으로 하는 PMOS 장치 제조 방법.
  7. 제6항에 있어서, 상기 고전압 드리프트 영역 p-탱크의 불순물 농도가 약 1e15/㎤의 붕소 농도보다 더 크며; 상기 드리프트 영역 p-탱크의 깊이가 약 5um이하이며; 상기 필드 산화물의 두께가 약 0.6um이상인 것을 특징으로 하는 PMOS 장치 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950008215A 1994-04-08 1995-04-08 고전압금속산화물반도체장치및그제조방법 KR100396170B1 (ko)

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US (1) US5512495A (ko)
EP (1) EP0676799B1 (ko)
JP (1) JPH07297294A (ko)
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KR100825466B1 (ko) * 2004-08-06 2008-04-28 오스트리아마이크로시스템즈 아게 고전압 ｎｍｏｓ 트랜지스터 및 그것의 제조 방법

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TW305057B (ko) 1997-05-11
EP0676799A3 (en) 1996-06-12
DE69524276T2 (de) 2002-08-08
DE69524276D1 (de) 2002-01-17
JPH07297294A (ja) 1995-11-10
US5512495A (en) 1996-04-30
EP0676799A2 (en) 1995-10-11
KR100396170B1 (ko) 2003-11-14

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