KR950021529A - 평면구조 모스 트랜지스터 및 그 제조방법 - Google Patents
평면구조 모스 트랜지스터 및 그 제조방법 Download PDFInfo
- Publication number
- KR950021529A KR950021529A KR1019930030866A KR930030866A KR950021529A KR 950021529 A KR950021529 A KR 950021529A KR 1019930030866 A KR1019930030866 A KR 1019930030866A KR 930030866 A KR930030866 A KR 930030866A KR 950021529 A KR950021529 A KR 950021529A
- Authority
- KR
- South Korea
- Prior art keywords
- gate
- source
- drain
- insulating film
- film
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims 2
- 239000000758 substrate Substances 0.000 claims abstract 5
- 239000004065 semiconductor Substances 0.000 claims abstract 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 2
- 238000000034 method Methods 0.000 claims 2
- 229910052710 silicon Inorganic materials 0.000 claims 2
- 239000010703 silicon Substances 0.000 claims 2
- 238000005530 etching Methods 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 238000009279 wet oxidation reaction Methods 0.000 claims 1
- 230000003071 parasitic effect Effects 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7834—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a non-planar structure, e.g. the gate or the source or the drain being non-planar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/163—Thick-thin oxides
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/981—Utilizing varying dielectric thickness
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
본 발명은 평면구조 모스 트랜지스터(Fully Planarized Conxave Transistor)에 관한 것으로, 특히 게이트(6), 소스/드레인(3)이 평탄화된 평면구조 모스 트랜지스터에 있어서, 반도체기판(1)상에 LDD 영역(2), 소스/드레인영역(3)이 소정 패턴으로 적층되어 형성되고 ; 상기 소스/드레인영역(3) 측면 및 상부에 절연막(4)이 두텁게 형성되고 ; 상기 소스/드레인(3) 사이에 게이트(6)가 형성되되, 게이트절연막(5)에 의해 소스와 게이트 드레인과 게이트가 상호 절연된 구조를 포함하여 이루는 것을 특징으로 함으로써 본 발명은 두껍게 형성된 산화막이 게이트와 소스, 게이트와 드레인 사이에 존재하게 되어 게이트와 소스, 게이트와 드레인 사이의 기생 축전 용량 값을 감소시킬 수 있어 소자의 동작속도를 개선할 수 있는 효과가 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 평면구조 트랜지스터의 단면도.
Claims (3)
- 게이트(6), 소스/드레인(3)이 평탄화된 평면구조 모스 트랜지스터에 있어서, 반도체기판(1) 상에 LDD 영역(2), 소스/드레인영역(3)이 소정 패턴으로 적층되어 형성되고 ; 상기 소스/드레인영역(3) 측면 및 상부에 절연막(4)이 두텁게 형성되고 ; 상기 소스/드레인(3) 사이에 게이트(6)가 형성되되, 게이트절연막(5)에 의해 소스와 게이트, 드레인과 게이트가 상호 절연된 구조를 포함하여 이루는 것을 특징으로 하는 평면구조 모스 트랜지스터.
- 반도체기판(1) 상에 LDD 영역(2), 소스/드레인영역(3)이 소정 패턴으로 적층되어 형성되고, 상기 소스/드레인영역(3) 측면 및 상부에 절연막(4)이 두텁게 형성되고, 상기 소스/드레인(3) 사이에 게이트(6)가 형성되되, 게이트절연막(5)에 의해 소스와 게이트 드레인과 게이트가 상호 절연된 구조를 포함하는 평면구조 모스트랜지스터 제조방법에 있어서, 반도체기판(1)상에 저농도로 도핑된 막(2′)을 형성하는 단계 ; 상기 저농도로 도핑된 막(2′) 상부에 고농도로 도핑된 막(3′)을 형성하는 단계 ; 상기 고농도로 도핑된 막(3′), 저농도로 도핑된 막(2′)을 선택식각하여 상기 실리콘기판(1)을 소정정도 노출시키는 단계 ; 상기 노출된 실리콘기판(1) 상에 절연막(4)을 두껍게 형성하는 단계 ; 및 전체구조 상부에 게이트절연막(5)을 형성한 후, 게이트 전극(6)을 형성하는 단계를 포함하여 이루어지는 것을 특징으로 하는 평면구조 모스 트랜지스터 제조방법.
- 제2항에 있어서, 상기 절연막(4)은 800 내지 900℃의 낮은 온도로 습식산화(wetoxidation)하는 저온산화공정(low temperature oxidation)을 통해 형성된 산화막인 것을 특징으로 하는 평면구조 모스 트랜지스터 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930030866A KR970009054B1 (ko) | 1993-12-29 | 1993-12-29 | 평면구조 모스 트랜지스터 및 그 제조방법 |
JP6328247A JPH07211906A (ja) | 1993-12-29 | 1994-12-28 | 平面構造トランジスタおよびその製造方法 |
DE4447149A DE4447149B4 (de) | 1993-12-29 | 1994-12-29 | Vollständig eingeebneter Feldeffekttransistor und Verfahren an dessen Herstellung |
US08/753,293 US5677210A (en) | 1993-12-29 | 1996-11-22 | Method of producing a fully planarized concave transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930030866A KR970009054B1 (ko) | 1993-12-29 | 1993-12-29 | 평면구조 모스 트랜지스터 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950021529A true KR950021529A (ko) | 1995-07-26 |
KR970009054B1 KR970009054B1 (ko) | 1997-06-03 |
Family
ID=19373839
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930030866A KR970009054B1 (ko) | 1993-12-29 | 1993-12-29 | 평면구조 모스 트랜지스터 및 그 제조방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5677210A (ko) |
JP (1) | JPH07211906A (ko) |
KR (1) | KR970009054B1 (ko) |
DE (1) | DE4447149B4 (ko) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6127233A (en) * | 1997-12-05 | 2000-10-03 | Texas Instruments Incorporated | Lateral MOSFET having a barrier between the source/drain regions and the channel region |
US6211025B1 (en) * | 1998-08-26 | 2001-04-03 | Advanced Micro Devices, Inc. | Method of making elevated source/drain using poly underlayer |
US6319782B1 (en) | 1998-09-10 | 2001-11-20 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method of fabricating the same |
US6180465B1 (en) * | 1998-11-20 | 2001-01-30 | Advanced Micro Devices | Method of making high performance MOSFET with channel scaling mask feature |
US6534351B2 (en) | 2001-03-19 | 2003-03-18 | International Business Machines Corporation | Gate-controlled, graded-extension device for deep sub-micron ultra-high-performance devices |
FR2827705B1 (fr) * | 2001-07-19 | 2003-10-24 | Commissariat Energie Atomique | Transistor et procede de fabrication d'un transistor sur un substrat sige/soi |
US7098105B2 (en) * | 2004-05-26 | 2006-08-29 | Micron Technology, Inc. | Methods for forming semiconductor structures |
US7442976B2 (en) | 2004-09-01 | 2008-10-28 | Micron Technology, Inc. | DRAM cells with vertical transistors |
US7648871B2 (en) * | 2005-10-21 | 2010-01-19 | International Business Machines Corporation | Field effect transistors (FETS) with inverted source/drain metallic contacts, and method of fabricating same |
EP1786031A1 (en) * | 2005-11-10 | 2007-05-16 | STMicroelectronics S.r.l. | Vertical-gate mos transistor for high voltage applications with variable gate oxide thickness |
US7294554B2 (en) * | 2006-02-10 | 2007-11-13 | International Business Machines Corporation | Method to eliminate arsenic contamination in trench capacitors |
US7476933B2 (en) | 2006-03-02 | 2009-01-13 | Micron Technology, Inc. | Vertical gated access transistor |
US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6394687A (ja) * | 1986-10-09 | 1988-04-25 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
JPS63287064A (ja) * | 1987-05-19 | 1988-11-24 | Fujitsu Ltd | Mis形半導体装置およびその製造方法 |
US5164325A (en) * | 1987-10-08 | 1992-11-17 | Siliconix Incorporated | Method of making a vertical current flow field effect transistor |
US5108937A (en) * | 1991-02-01 | 1992-04-28 | Taiwan Semiconductor Manufacturing Company | Method of making a recessed gate MOSFET device structure |
KR940002400B1 (ko) * | 1991-05-15 | 1994-03-24 | 금성일렉트론 주식회사 | 리세스 게이트를 갖는 반도체장치의 제조방법 |
JPH05144839A (ja) * | 1991-11-20 | 1993-06-11 | Sharp Corp | 半導体装置の製造方法 |
US5382534A (en) * | 1994-06-06 | 1995-01-17 | United Microelectronics Corporation | Field effect transistor with recessed buried source and drain regions |
-
1993
- 1993-12-29 KR KR1019930030866A patent/KR970009054B1/ko not_active IP Right Cessation
-
1994
- 1994-12-28 JP JP6328247A patent/JPH07211906A/ja active Pending
- 1994-12-29 DE DE4447149A patent/DE4447149B4/de not_active Expired - Fee Related
-
1996
- 1996-11-22 US US08/753,293 patent/US5677210A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH07211906A (ja) | 1995-08-11 |
DE4447149A1 (de) | 1995-07-06 |
KR970009054B1 (ko) | 1997-06-03 |
US5677210A (en) | 1997-10-14 |
DE4447149B4 (de) | 2006-10-05 |
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