KR940001159A - 비멀티플렉시드 어드레스 메모리 장치 - Google Patents

비멀티플렉시드 어드레스 메모리 장치 Download PDF

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Publication number
KR940001159A
KR940001159A KR1019920010641A KR920010641A KR940001159A KR 940001159 A KR940001159 A KR 940001159A KR 1019920010641 A KR1019920010641 A KR 1019920010641A KR 920010641 A KR920010641 A KR 920010641A KR 940001159 A KR940001159 A KR 940001159A
Authority
KR
South Korea
Prior art keywords
memory device
row decoder
address
column
multiplexed address
Prior art date
Application number
KR1019920010641A
Other languages
English (en)
Korean (ko)
Inventor
윤세승
김문곤
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019920010641A priority Critical patent/KR940001159A/ko
Priority to JP5147833A priority patent/JPH06103767A/ja
Publication of KR940001159A publication Critical patent/KR940001159A/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
KR1019920010641A 1992-06-19 1992-06-19 비멀티플렉시드 어드레스 메모리 장치 KR940001159A (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019920010641A KR940001159A (ko) 1992-06-19 1992-06-19 비멀티플렉시드 어드레스 메모리 장치
JP5147833A JPH06103767A (ja) 1992-06-19 1993-06-18 半導体メモリ装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920010641A KR940001159A (ko) 1992-06-19 1992-06-19 비멀티플렉시드 어드레스 메모리 장치

Publications (1)

Publication Number Publication Date
KR940001159A true KR940001159A (ko) 1994-01-10

Family

ID=19334907

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920010641A KR940001159A (ko) 1992-06-19 1992-06-19 비멀티플렉시드 어드레스 메모리 장치

Country Status (2)

Country Link
JP (1) JPH06103767A (ja)
KR (1) KR940001159A (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4416372B2 (ja) 2002-02-25 2010-02-17 富士通マイクロエレクトロニクス株式会社 半導体記憶装置
KR100614640B1 (ko) * 2003-09-26 2006-08-22 삼성전자주식회사 워드라인 부분활성화 커맨드를 갖는 반도체메모리장치

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01298596A (ja) * 1988-05-26 1989-12-01 Nec Corp 半導体メモリ装置

Also Published As

Publication number Publication date
JPH06103767A (ja) 1994-04-15

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