KR910013436A - 반도체소자의 제조방법 - Google Patents

반도체소자의 제조방법 Download PDF

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Publication number
KR910013436A
KR910013436A KR1019900020567A KR900020567A KR910013436A KR 910013436 A KR910013436 A KR 910013436A KR 1019900020567 A KR1019900020567 A KR 1019900020567A KR 900020567 A KR900020567 A KR 900020567A KR 910013436 A KR910013436 A KR 910013436A
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KR
South Korea
Prior art keywords
oxide
manufacturing
semiconductor device
conductivity type
semiconductor substrate
Prior art date
Application number
KR1019900020567A
Other languages
English (en)
Other versions
KR940008377B1 (ko
Inventor
시게오 야와타
히데요시 이토
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR910013436A publication Critical patent/KR910013436A/ko
Application granted granted Critical
Publication of KR940008377B1 publication Critical patent/KR940008377B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

내용 없음.

Description

반도체소자의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 방법을 적용시키는 파워 MOS트랜지스터의 요부를 나타낸 단면도.

Claims (1)

  1. 어떤 도전형을 나타내는 고농도 반도체기판(1)의 표면에 불순물농도가 낮은 동일도전형의 기상성장층(2)을 퇴적시킨 후, 산화규소, 알루미나, 규소, 산화 베릴륨, 산화 마그네슘, 산화 게르마늄, 산화 지르코늄 및 산화 티타늄으로 이루어진 군(群)으로부터 선정하는 1종 또는 복수종의 미분말에 의해 노출된 반도체기판의 이면에 손상 혹은 왜층을 형성하는 공정을 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900020567A 1989-12-15 1990-12-14 반도체소자의 제조방법 KR940008377B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP1325627A JPH03185830A (ja) 1989-12-15 1989-12-15 半導体素子の製造方法
JP1-325627 1989-12-15
JP89-325627 1989-12-15

Publications (2)

Publication Number Publication Date
KR910013436A true KR910013436A (ko) 1991-08-08
KR940008377B1 KR940008377B1 (ko) 1994-09-12

Family

ID=18178970

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900020567A KR940008377B1 (ko) 1989-12-15 1990-12-14 반도체소자의 제조방법

Country Status (3)

Country Link
EP (1) EP0432789A1 (ko)
JP (1) JPH03185830A (ko)
KR (1) KR940008377B1 (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3929557B2 (ja) * 1997-07-30 2007-06-13 三菱電機株式会社 半導体装置およびその製造方法
CN107973269A (zh) * 2017-12-18 2018-05-01 中国电子科技集团公司第四十六研究所 一种mems器件用多层结构硅片的制作方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2827704C3 (de) * 1978-06-23 1981-03-19 Erwin Sick Gmbh Optik-Elektronik, 7808 Waldkirch Optische Vorrichtung zur Bestimmung der Lichtaustrittswinkel
US4525239A (en) * 1984-04-23 1985-06-25 Hewlett-Packard Company Extrinsic gettering of GaAs wafers for MESFETS and integrated circuits
EP0251280A3 (en) * 1986-06-30 1989-11-23 Nec Corporation Method of gettering semiconductor wafers with a laser beam

Also Published As

Publication number Publication date
JPH03185830A (ja) 1991-08-13
KR940008377B1 (ko) 1994-09-12
EP0432789A1 (en) 1991-06-19

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