KR910010877A - Ecl 회로 - Google Patents
Ecl 회로 Download PDFInfo
- Publication number
- KR910010877A KR910010877A KR1019900019122A KR900019122A KR910010877A KR 910010877 A KR910010877 A KR 910010877A KR 1019900019122 A KR1019900019122 A KR 1019900019122A KR 900019122 A KR900019122 A KR 900019122A KR 910010877 A KR910010877 A KR 910010877A
- Authority
- KR
- South Korea
- Prior art keywords
- circuit
- ecl
- transistor
- output terminal
- current switch
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
- H03K19/0136—Modifications for accelerating switching in bipolar transistor circuits by means of a pull-up or down element
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 내지 제3도는 본 발명의 각 실시예의 회로도.
Claims (4)
- 논리회로를 구성하는 ECL전류스위치회로(12)와 , 이 ECL 전류스위치회로(12)의 제1출력단에 베이스가, 제1전원에 컬렉터가, 회로출력단에 에미터가 접속된 제1트랜지스터(Q7),상기 회로출력단에 컬렉터가,제2전원에 에미터가 접속된 제2트랜지스터(Q5), 상기 제1전원과 제2트랜지스터의 베이스에 접속되는 정전류원(IBIAS,Q1,RB), 상기 전류스위치회로의 제2출력단과 제2트랜지스터의 베이스사이에 접속되는 캐패시터(Cc)및 , 상기 제2트랜지스터의 베이스와 제2전원사이에 접속된 임피던스(Z,RE,Q12)를 구비한것을 특징으로 하는 ECL회로.
- 제1항에 있어서, 상기 정전류원으로서 PNP트랜지스터(Q11)를 이용한 것을 특징으로 하는 ECL회로.
- 제1항에 있어서, 상기 임피던스로서 저항(RE)과 다이오드(Q12)의 직렬회로를 이용한 것을 특징으로 하는 ECL회로.
- 제1항에 있어서, 상기 제1,제2트랜지스터, 정전류원 캐패시터, 임피던스를 이용한 상기 전류스위치이외의 회로를 상기 전류스위치회로에 대해 대칭적으로 배치하고, 상기 전류스위치회로 이외의 회로의 각 회로 출력단으로부터 상기 반전관계의 신호를 얻는 구성으로 된 것을 특징으로하는 ECL회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP01-311335 | 1989-11-30 | ||
JP1311335A JPH0666678B2 (ja) | 1989-11-30 | 1989-11-30 | Ecl回路 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR910010877A true KR910010877A (ko) | 1991-06-29 |
Family
ID=18015906
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900019122A KR910010877A (ko) | 1989-11-30 | 1990-11-24 | Ecl 회로 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5146116A (ko) |
EP (1) | EP0432577A1 (ko) |
JP (1) | JPH0666678B2 (ko) |
KR (1) | KR910010877A (ko) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0461419A (ja) * | 1990-06-29 | 1992-02-27 | Nec Corp | Ecl回路 |
JP2987971B2 (ja) * | 1991-02-26 | 1999-12-06 | 日本電気株式会社 | レベル変換回路 |
JP2737444B2 (ja) * | 1991-04-30 | 1998-04-08 | 日本電気株式会社 | 高速論理回路 |
JPH04334121A (ja) * | 1991-05-09 | 1992-11-20 | Nec Corp | 能動プルダウン回路 |
US5122686A (en) * | 1991-07-18 | 1992-06-16 | Advanced Micro Devices, Inc. | Power reduction design for ECL outputs that is independent of random termination voltage |
EP0574070B9 (fr) * | 1992-06-10 | 2002-08-28 | Koninklijke Philips Electronics N.V. | Circuit interface de liaison entre microprocesseurs |
US5321320A (en) * | 1992-08-03 | 1994-06-14 | Unisys Corporation | ECL driver with adjustable rise and fall times, and method therefor |
US5506521A (en) * | 1992-08-03 | 1996-04-09 | Unisys Corporation | ECL driver with adjustable rise and fall times, and method therefor |
DE4321483C2 (de) * | 1993-06-28 | 1995-04-20 | Siemens Ag | Leitungstreiberschaltstufe in Stromschaltertechnik |
JP2561003B2 (ja) * | 1993-10-20 | 1996-12-04 | 日本電気株式会社 | アクティブプルダウン型ecl回路 |
JP3497888B2 (ja) * | 1994-06-02 | 2004-02-16 | 株式会社ルネサステクノロジ | 半導体装置 |
JP5205403B2 (ja) * | 2010-03-10 | 2013-06-05 | 株式会社東芝 | 半導体集積回路装置 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3217512A1 (de) * | 1982-05-10 | 1983-11-10 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zur pegelumsetzung |
US4539493A (en) * | 1983-11-09 | 1985-09-03 | Advanced Micro Devices, Inc. | Dynamic ECL circuit adapted to drive loads having significant capacitance |
US4577125A (en) * | 1983-12-22 | 1986-03-18 | Advanced Micro Devices, Inc. | Output voltage driver with transient active pull-down |
US4737663A (en) * | 1984-03-01 | 1988-04-12 | Advanced Micro Devices, Inc. | Current source arrangement for three-level emitter-coupled logic and four-level current mode logic |
US4684831A (en) * | 1984-08-21 | 1987-08-04 | Applied Micro Circuits Corporation | Level shift circuit for interfacing between two different voltage levels using a current mirror circuit |
US4680480A (en) * | 1984-08-31 | 1987-07-14 | Storage Technology Corporation | Output driver circuit for LSI and VLSI ECL chips with an active pulldown |
US4626709A (en) * | 1984-09-28 | 1986-12-02 | Advanced Micro Devices, Inc. | Dynamic push-pull for ECL |
US4687953A (en) * | 1986-04-18 | 1987-08-18 | Advanced Micro Devices, Inc. | Dynamic ECL line driver circuit |
JPS63302620A (ja) * | 1987-06-03 | 1988-12-09 | Toshiba Corp | 出力回路 |
US4926065A (en) * | 1987-11-17 | 1990-05-15 | Applied Micro Circuits Corporation | Method and apparatus for coupling an ECL output signal using a clamped capacitive bootstrap circuit |
US4835420A (en) * | 1987-11-17 | 1989-05-30 | Applied Micro Circuits Corporation | Method and apparatus for signal level conversion with clamped capacitive bootstrap |
KR890016669A (ko) * | 1988-04-02 | 1989-11-29 | 미다 가쓰시게 | 반도체 집적회로 |
-
1989
- 1989-11-30 JP JP1311335A patent/JPH0666678B2/ja not_active Expired - Fee Related
-
1990
- 1990-11-24 KR KR1019900019122A patent/KR910010877A/ko not_active IP Right Cessation
- 1990-11-28 EP EP90122743A patent/EP0432577A1/en not_active Withdrawn
- 1990-11-30 US US07/619,981 patent/US5146116A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH03171921A (ja) | 1991-07-25 |
US5146116A (en) | 1992-09-08 |
JPH0666678B2 (ja) | 1994-08-24 |
EP0432577A1 (en) | 1991-06-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR880010575A (ko) | 논리회로 | |
KR850006783A (ko) | 스위칭 회로 | |
KR890001293A (ko) | 출력 회로 | |
KR840002176A (ko) | 반도체 집적회로 장치 | |
KR910010877A (ko) | Ecl 회로 | |
KR860000719A (ko) | 상보형(相補型)Bi-MIS 게이트회로 | |
KR880012009A (ko) | BiMOS 논리회로 | |
KR890001274A (ko) | 전류미러회로 | |
KR910015108A (ko) | 대수증폭회로 | |
KR880008553A (ko) | 세라믹 필터에 변조기를 결합시키기 위한 집적결합회로 | |
KR910021008A (ko) | 전류전달회로 | |
KR910005574A (ko) | 정 전압회로 | |
KR870008240A (ko) | 기준 전압 회로 | |
KR910008978A (ko) | 출력회로 | |
ATE67906T1 (de) | Ecl-schaltungen. | |
KR850008253A (ko) | 차동 증폭기 | |
KR920003659A (ko) | 저 잡음형 출력 버퍼 회로 | |
KR910015123A (ko) | Ecl논리회로 | |
KR910010866A (ko) | Bi-CMOS회로 | |
KR910010860A (ko) | 출력회로 | |
KR880005743A (ko) | 비교기 | |
KR930003543A (ko) | 전류 거울 회로 | |
KR890017884A (ko) | 인터페이스회로 | |
KR900004107A (ko) | 가속 스위칭 입력회로 | |
KR910021022A (ko) | 히스테리시스회로 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
SUBM | Surrender of laid-open application requested |