KR900009976Y1 - Muting circuitry - Google Patents

Muting circuitry Download PDF

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Publication number
KR900009976Y1
KR900009976Y1 KR2019860003869U KR860003869U KR900009976Y1 KR 900009976 Y1 KR900009976 Y1 KR 900009976Y1 KR 2019860003869 U KR2019860003869 U KR 2019860003869U KR 860003869 U KR860003869 U KR 860003869U KR 900009976 Y1 KR900009976 Y1 KR 900009976Y1
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KR
South Korea
Prior art keywords
swc
resistor
switching circuit
power supply
capacitor
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Application number
KR2019860003869U
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Korean (ko)
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KR870015545U (en
Inventor
김문형
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삼성전자 주식회사
한형수
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Priority to KR2019860003869U priority Critical patent/KR900009976Y1/en
Publication of KR870015545U publication Critical patent/KR870015545U/en
Application granted granted Critical
Publication of KR900009976Y1 publication Critical patent/KR900009976Y1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/34—Muting amplifier when no signal is present or when only weak signals are present, or caused by the presence of noise signals, e.g. squelch systems

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  • Amplifiers (AREA)

Abstract

내용 없음.No content.

Description

뮤팅 회로Muting circuit

제1도는 본 고안의 회로도.1 is a circuit diagram of the present invention.

제2a도는 전원 오프시의 전압 파형도.2A is a voltage waveform diagram at power off.

제2b도는 전원 오프시의 P부분에서의 파형도.FIG. 2B is a waveform diagram at portion P at power off. FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

R1-R5 : 저항 C1-C3 : 콘덴서R1-R5: resistor C1-C3: capacitor

SW : 스위치 D1, D2 : 다이오드SW: switch D1, D2: diode

SWC : 스위칭회로SWC: Switching Circuit

본 고안은 뮤팅회로에 관한 것으로서, 특히 전원이 "오프"시에는 발생되는 잡음을 제거하는 회로에 관한 것이다. 종래에는 전원이 "온"시에만 잡음을 제거하는 뮤팅회로로 구성하였기 때문에 전원을 "오프"하면 잡음이 발생하는 단점이 있었다.The present invention relates to a muting circuit, and more particularly to a circuit for removing noise generated when the power supply is "off". In the related art, since the muting circuit removes noise only when the power supply is "on", noise is generated when the power supply is "off".

본 고안의 목적은 상기한 단점을 해결하기 위하여 안출한 것으로서, 전원이 "오프"시에 발생하는 불규칙한 잡음을 제거하는 회로를 제공하는데 있다.An object of the present invention is to provide a circuit that eliminates the irregular noise generated when the power is "off" to solve the above disadvantages.

이하 첨부도면에 의거하여 본 고안의 실시예를 자세히 설명하면 다음과 같다.Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

제1도는 본 고안의 회로도로서, 전원(B+)이 다이오드(D1)와 점지된 콘덴서(C1)를 거쳐서 스위칭회로(SWC)에 공급한다. 그리고 다이오드(D1)와 스위칭회로(SWC)사이에는 콘덴서(C3)와 스위치(SW) 및 저항(R1)을 직렬로 연하여서 연결한다.FIG. 1 is a circuit diagram of the present invention, and the power supply B + is supplied to the switching circuit SWC via the diode D1 and the capacitor C1 pointed to. The capacitor C3, the switch SW, and the resistor R1 are connected in series between the diode D1 and the switching circuit SWC.

상기한 스위치(SW)와 저항(R1) 사이에 흐르는 신호는 스위칭 회로(SWC)의 입력단(C)에 인가하고, 전원(B+)은 저항(R2)과 콘덴서(C2) 및 접지된 저항을 거쳐 스위칭 회로(SWC)의 입력단(F)에 인가한다.The signal flowing between the switch SW and the resistor R1 is applied to the input terminal C of the switching circuit SWC, and the power source B + supplies the resistor R2, the capacitor C2, and the grounded resistor. It is applied to the input terminal F of the switching circuit SWC.

그리고 저항(R2)은 콘덴서(C2) 사이의 일단은 에미터가 접지와 연결된 트랜지스터(TR)의 콜렉터와 연결하고, 베이스는 제너다이오드(D2)와 연결하여, 이 제너다이오드(D2)의 출력단은 직렬로 연결된 저항(R3,R4)사이의 일단과 연결하고, 이 저항(R3)은 전원과 연결한다.The resistor R2 is connected between the capacitor C2 and the collector of the transistor TR connected to the ground of the emitter, and the base is connected to the zener diode D2, so that the output terminal of the zener diode D2 is It is connected to one end between the resistors R3 and R4 connected in series, and this resistor R3 is connected to the power supply.

이와 같이 구성된 본 고안의 뮤팅회로에 있어서, 전원을 "오프"시에 발생하는 잡음을 제거하는 동작을 제2도에 도시된 파형도를 참조하여 설명한다.In the muting circuit of the present invention configured as described above, an operation of removing noise generated when the power is "off" will be described with reference to the waveform diagram shown in FIG.

스위치(SW)의 동작에 의해서 회로에 인가되는 전원이 "오프"될 때, 다이오드(D1)와 콘덴서(C1)에 의해서 제2a도에 도시된 바와 같이 "T"시간동안 스위칭회로(SWC)에 전원이 공급되고, "P"점의 펄스전압이 제2b도에 도시된 바와 같이 상승하여서 미분회로인 콘덴서(C2)와 저항(R1)에 의해 미분 펄스전압이 스위칭회로(SWC)의 입력단(F)에 인가된다.When the power applied to the circuit is "off" by the operation of the switch SW, the diode D1 and the capacitor C1 are applied to the switching circuit SWC for a "T" time as shown in FIG. 2A. The power is supplied and the pulse voltage at the point " P " rises as shown in Fig. 2b so that the differential pulse voltage is fed to the input circuit F of the switching circuit SWC by the capacitor C2 and the resistor R1 which are differential circuits. Is applied.

이때 스위칭회로(SWC)의 스위치(SW1)는 "오프"되어서 "b"에 연결되고, 스위치(SW2)는 "온"되어서 "a"에 연결된다. 그리고 전원(B+)이 스위칭회로(SWC)에 충분히 인가되도록 다이오드(D1)와 콘덴서(C1)를 사용해서 콘덴서(C1)에 충전된 전압이 외부로 흐르지 못하도록 하였다.At this time, the switch SW1 of the switching circuit SWC is "off" and connected to "b", and the switch SW2 is "on" and connected to "a". The voltage charged in the capacitor C1 is prevented from flowing to the outside by using the diode D1 and the capacitor C1 so that the power source B + is sufficiently applied to the switching circuit SWC.

따라서 스위칭회로(SWC)의 스위치(SW2)는 완전하게 "온"되어서 전원(B+)이 "오프"되면서 발생되는 불규칙한 잡음신호가 스위칭회로(SWC)에 인가되는 신호(Si)와 함게 출력단(B)를 통하여 출력되지 않는다. 이와 동시에 스위칭회로(SWC)에 인가되는 신호(Si)는 스위치(SW2)가 스위칭 "온"되어서 출력단(E)을 거쳐 접지로 흐른다.Therefore, the switch SW2 of the switching circuit SWC is completely "on" so that an irregular noise signal generated when the power source B + is "off" is applied to the switching circuit SWC together with the signal Si which is applied to the output stage ( No output via B). At the same time, the signal Si applied to the switching circuit SWC flows to the ground via the output terminal E when the switch SW2 is switched "on".

이상과 같이 본 고안에 의하면 전원이 "오프"시에도 잡음이 발생되지 않는다.As described above, according to the present invention, noise is not generated even when the power is "off".

Claims (1)

전원이 오프시에도 전원(B+)이 일정시간동안 스위칭회로(SWC)에 공급되도록 스위칭회로(SWC)는 접지콘덴서(C1)와 다이오드(D1)를 통해 전원(B+)에 연결되고, 스위칭회로(SWC)의 스위치(SW1,SW2)를 절환시키도록 에미터가 접지된 트랜지스터(TR)의 콜렉터는 저항(R2)을 통해 전원에 연결됨과 동시에 콘덴서(C2)와 저항(R5)으로 이루어진 미분회로를 통해 스위칭회로(SWC)에 연결되며, 트랜지스터(TR)의 베이스는 제너다이오드(D2)와 접지저항(R4) 및 저항(R3)을 통해 전원(B+)에 연결되어 구성되는 것을 특징으로 하는 뮤팅회로.The switching circuit SWC is connected to the power supply B + through the ground capacitor C1 and the diode D1 so that the power supply B + is supplied to the switching circuit SWC for a predetermined time even when the power is off. The collector of the transistor TR, whose emitter is grounded to switch the switches SW1 and SW2 of the SWC, is connected to the power supply through the resistor R2 and at the same time the differential circuit composed of the capacitor C2 and the resistor R5. Muting circuit, characterized in that connected to the switching circuit (SWC), the base of the transistor (TR) is connected to the power supply (B +) through the zener diode (D2) and ground resistor (R4) and resistor (R3) .
KR2019860003869U 1986-03-28 1986-03-28 Muting circuitry KR900009976Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019860003869U KR900009976Y1 (en) 1986-03-28 1986-03-28 Muting circuitry

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019860003869U KR900009976Y1 (en) 1986-03-28 1986-03-28 Muting circuitry

Publications (2)

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KR870015545U KR870015545U (en) 1987-10-26
KR900009976Y1 true KR900009976Y1 (en) 1990-10-22

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KR2019860003869U KR900009976Y1 (en) 1986-03-28 1986-03-28 Muting circuitry

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KR870015545U (en) 1987-10-26

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