KR900002466A - Method of manufacturing high electron transfer transistor - Google Patents

Method of manufacturing high electron transfer transistor Download PDF

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Publication number
KR900002466A
KR900002466A KR1019880008722A KR880008722A KR900002466A KR 900002466 A KR900002466 A KR 900002466A KR 1019880008722 A KR1019880008722 A KR 1019880008722A KR 880008722 A KR880008722 A KR 880008722A KR 900002466 A KR900002466 A KR 900002466A
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KR
South Korea
Prior art keywords
electron transfer
transfer transistor
high electron
manufacturing high
layer
Prior art date
Application number
KR1019880008722A
Other languages
Korean (ko)
Other versions
KR910004319B1 (en
Inventor
남춘우
이종봉
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to KR1019880008722A priority Critical patent/KR910004319B1/en
Publication of KR900002466A publication Critical patent/KR900002466A/en
Application granted granted Critical
Publication of KR910004319B1 publication Critical patent/KR910004319B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

내용 없음.No content.

Description

고전자 이동 트랜지스터의 제조방법Method of manufacturing high electron transfer transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 2 도는 본 발명에 따른 갈륨비소 이온주입형 고전자 이동 트랜지스터의 공정순서도이다.2 is a process flowchart of a gallium arsenide ion implantation high electron transfer transistor according to the present invention.

Claims (1)

기판(6)위에, 버퍼층(5) 및 알루미늄갈륨비소층(4)를 성장시키는 공정과, 게이트영역에만 알루미늄비소층(4)만 남기고 플라즈마로 식각하는 공정과, 소오스 및 드레인영역에 실리콘(Si)이온을 주입시켜 이온주입층(7)를 형성시키는 공정과, 트랜지스터의 소오스전극, 드레인전극, 게이트전극이 리프트오프방식으로 형성되는 공정과로 된 것을 특징으로 하는 고전자 이동 트랜지스터의 제조방법.Growing the buffer layer 5 and the aluminum gallium arsenide layer 4 on the substrate 6; etching the plasma with only the aluminum arsenide layer 4 remaining in the gate region; and silicon (Si) in the source and drain regions. And a process of forming an ion implantation layer (7) by implanting ions, and forming a source electrode, a drain electrode, and a gate electrode of the transistor by a lift-off method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880008722A 1988-07-14 1988-07-14 Manufacturing method of high electron mobility transistor KR910004319B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019880008722A KR910004319B1 (en) 1988-07-14 1988-07-14 Manufacturing method of high electron mobility transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880008722A KR910004319B1 (en) 1988-07-14 1988-07-14 Manufacturing method of high electron mobility transistor

Publications (2)

Publication Number Publication Date
KR900002466A true KR900002466A (en) 1990-02-28
KR910004319B1 KR910004319B1 (en) 1991-06-25

Family

ID=19276051

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880008722A KR910004319B1 (en) 1988-07-14 1988-07-14 Manufacturing method of high electron mobility transistor

Country Status (1)

Country Link
KR (1) KR910004319B1 (en)

Also Published As

Publication number Publication date
KR910004319B1 (en) 1991-06-25

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