KR850700288A - 동시접합 작업에 적합한 집적회로 리드 프레임 - Google Patents

동시접합 작업에 적합한 집적회로 리드 프레임

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KR850700288A
KR850700288A KR1019850700312A KR850700312A KR850700288A KR 850700288 A KR850700288 A KR 850700288A KR 1019850700312 A KR1019850700312 A KR 1019850700312A KR 850700312 A KR850700312 A KR 850700312A KR 850700288 A KR850700288 A KR 850700288A
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South Korea
Prior art keywords
lead
arrangement
attachment
contact tip
leads
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KR1019850700312A
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English (en)
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KR930002811B1 (ko
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다니엘 제이 퀀
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로버트 씨.워커
모스테크 코오포레이숀
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Publication of KR850700288A publication Critical patent/KR850700288A/ko
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Publication of KR930002811B1 publication Critical patent/KR930002811B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

내용 없음

Description

동시접합 작업에 적합한 집적회로 리드 프레임
제5도는 리드프레임의 일부를 도시한 것이다.
본 내용은 부공개 건이므로 전문 내용을 수록하지 않았음.

Claims (6)

  1. 도전성 리드들의 각각이 집적회로의 외부 소자와 접속하기 위한 외부와, 반도체 칩상의 한 접점과 접속하기 위한 부착부를 갖는 상기 도전성 리드들의 최소한 1리드 배열과, 각각이 상기 리드들의 배열을 연결하고 위치조정하기 위해 상기 외부와 상기 부착부와의 사이에서 상기 리드들의 배열의 치소한 1리드에 부착되어서 상기 리드들의 배열의 상기 부착부가 반도체 칩과 부착하기전에 소정의 위치에 유지되고, 상기 리드들의 배열의 상기 외부가 외부부착에 적합한 구성내에 유지되게 하는 최소한 두개의 위치 조정 부재를 포함한 집적회로용 리드프레임에 있어서, 상기 최소한 1리드의 상기 부착부가 상기 위치 조정부재로부터 접촉립까지 연장한 코넥터부재를 포함하고, 상기 부착부들의 각각의 코넥터부재가 상기 부착부들의 각각의 상기 접촉립이 1접촉팁 배열내의 소정의 위치에 위치되도록 소정의 통로를 따라 연장하고, 상기 코넥터 부재들의 각각이 상기 최소한 2위치 조정부재들에 의해 정의되는 제1평면에 수직인 직선을 따라 상기 부착부들의 각각의 휨을 특징지워주는 실질적으로 동일한 탄성 계수를 갖는 것을 특징으로한 집적회로용 리드프레임.
  2. 제1항에 있어서, 최소한 1리드 배열이 최소한 2리드그룹으로 분리되고, 상기 리드그룹들의 각각이 상기 최소한 2위치 조정부재중의 하나에 의해 위치되고 지지되며, 상기 접촉팁 배열이 상기 최소한 2위치 조정 부재사이에 배치되는데, 상기 리드 그룹들중 제1그룹은 상기 제1리드 그룹의 상기 위치 조정부재의 내부 축상에 상기 제1리드 그룹의 리드들을 부착하는 부착부와, 상기 제1리드 그룹의 상기 위치 조정부재의 외부측에 상기 제1그룹의 상기 리드들의 외부를 갖으며, 상기 접촉팁 배열의 제1축상에 위치되고; 상기 리드그룹들의 다른 하나는 상기 접촉팁 배열의 제2측상에 놓이며, 상기 제2리드1그룹의 상기 위치 조정 부재의 대응 내측에 상기 다른 리드 그룹의 상기 리드들을 부착하는 부착부와, 상기 다른 리드그룹의 상기 위치 조정부재의 대응 외측에 있는 상기 다른 리드 그룹의 상기 리드들의 외부를 갖는 것을 특징으로한 집적 회로용 리드 프레임.
  3. 제1항에 있어서, 상기 부착부들의 상기 접촉 팁들의 각각이 소정의 량만큼 상기 제1평면으로부터 연장하므로, 상기 접촉팁 배열이 상기 제1평면에 실질적으로 평행한 제2평면을 한정하는 것을 특징으로한 집적회로용 리드프레임.
  4. 제2항 또는 제3항에 있어서, 전기도전성 리드들의 상기 리드배열들의 최소한 두개의 스트립 축을 따라 연장한 최소한 한개의 연결용 스트립에 의해 정열되고, 상기 최소한 2리드 배열들에 절단가능하게 부착되어서 상기 최소한 2리드 배열들의 상기 접촉팁 배열들이 최소한 2집적회로 상에서 최소한 두개의 미리 위치된 집적회로의 정열하기에 적합한 소정의 관계로 위치될 수 있어서 상기 최소한 2접촉팁 배열이 상기 최소한 2집적회로 패드 배열에 동시에 접합되는 것을 특징으로한 집적회로용 리드프레임.
  5. 제4항에 있어서, 상기 최소한 2접촉 팁 배열들의 모두는 상기 스트립 축에 수직인 제1소정의 거리씩 정열되고 상기 스트립축을 따라 소정의 분리 거리로 이격되며 : 상기 최소한 2리드 배열들의 인접 배열들의 상기 외부들은, 인접 리드 배열들의 상기 대응 외부들의 제1 및 제2변위 거리씩 상기 스트립축으로부터 변위되도록 상기 스트립축을 따라 오버래핑하여서 상호 분리되므로, 상기 리드 배열들의 하나의 제1및 제2리드그룹들이, 상기 제1 및 제2리드 그룹들의 상기외부들이 인접 배열들의 각각의 인접 제2 및 제1리드 그룹들의 외부들 사이에 놓이도록 일정량씩 상기 스트립축으로부터 변위되는 것을 특징으로 한 직접회로용 리드프레임.
  6. 제5항에 있어서, 제1변위를 가진 제1리드 배열의 부착부들이, 제1변위를 가진 상기 제1리드 배열의 모든 상기 부착부들이 그들의 각각의 외부들로부터 상기 접촉팁 배열의 각각의 위치들로 연장한, 소정의 부착부 길이들의 제1부착 세트를 가지며; 제2변위를 가진 제2리드배열의 부착부들이, 제2변위를 가진 상기 제2리드배열의 모든 상기 부착부들이 그들의 각각의 외부들로부터 상기 접촉팁 배열의 각각의 대응위치들로 연장하는, 소정의 부착부 길이들의 제2부착세트를 가진 것을 특징으로 한 집적회로용 리드프레임.
    ※참고사항:최초출원 내용에 의하여 공개하는 것임.
KR1019850700312A 1984-03-22 1985-03-19 동시 접합 작업에 적합한 집적회로 리드 프레임 KR930002811B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US06/592,144 US4722060A (en) 1984-03-22 1984-03-22 Integrated-circuit leadframe adapted for a simultaneous bonding operation
US592144 1984-03-22
US592,144 1984-03-22
PCT/US1985/000449 WO1985004520A1 (en) 1984-03-22 1985-03-19 Integrated-circuit leadframe adapted for a simultaneous bonding operation

Publications (2)

Publication Number Publication Date
KR850700288A true KR850700288A (ko) 1985-12-26
KR930002811B1 KR930002811B1 (ko) 1993-04-10

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KR1019850700312A KR930002811B1 (ko) 1984-03-22 1985-03-19 동시 접합 작업에 적합한 집적회로 리드 프레임

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Country Link
US (1) US4722060A (ko)
EP (1) EP0177559B1 (ko)
JP (1) JPH0785499B2 (ko)
KR (1) KR930002811B1 (ko)
DE (1) DE3583200D1 (ko)
WO (1) WO1985004520A1 (ko)

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Also Published As

Publication number Publication date
US4722060A (en) 1988-01-26
EP0177559A1 (en) 1986-04-16
DE3583200D1 (de) 1991-07-18
JPS61501540A (ja) 1986-07-24
KR930002811B1 (ko) 1993-04-10
EP0177559A4 (en) 1987-06-01
WO1985004520A1 (en) 1985-10-10
EP0177559B1 (en) 1991-06-12
JPH0785499B2 (ja) 1995-09-13

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