KR20110012455A - Semiconductor device and method of manufacturing the same - Google Patents

Semiconductor device and method of manufacturing the same Download PDF

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Publication number
KR20110012455A
KR20110012455A KR1020090070181A KR20090070181A KR20110012455A KR 20110012455 A KR20110012455 A KR 20110012455A KR 1020090070181 A KR1020090070181 A KR 1020090070181A KR 20090070181 A KR20090070181 A KR 20090070181A KR 20110012455 A KR20110012455 A KR 20110012455A
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KR
South Korea
Prior art keywords
conductive pattern
semiconductor device
contact plug
manufacturing
insulating film
Prior art date
Application number
KR1020090070181A
Other languages
Korean (ko)
Inventor
하가영
Original Assignee
주식회사 하이닉스반도체
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 하이닉스반도체 filed Critical 주식회사 하이닉스반도체
Priority to KR1020090070181A priority Critical patent/KR20110012455A/en
Publication of KR20110012455A publication Critical patent/KR20110012455A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32105—Oxidation of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3211—Nitridation of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material

Abstract

The present invention discloses a semiconductor device and a method of manufacturing the same that can prevent the contact plug from falling over. The disclosed semiconductor device includes a conductive pattern formed on an upper surface of a semiconductor substrate, an interlayer insulating film formed on the conductive pattern, a contact hole formed in an upper end of the interlayer insulating film and the conductive pattern, and the conductive pattern formed in the contact hole. And a contact plug formed to contact.

Description

Semiconductor device and method for manufacturing same {SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a semiconductor device and a method for manufacturing the same that can prevent the contact plug from falling over.

In general, a metal element is formed in the semiconductor element to electrically connect the element and the element, or the interconnection and the interconnection, and a contact plug is formed to connect the upper metal interconnection and the lower metal interconnection.

As the material of the metal wiring, aluminum and tungsten having excellent electrical conductivity have been mainly used, and recently, research into using copper as the next generation metal wiring material has been conducted. Since copper has better electrical conductivity and lower resistance than aluminum and tungsten, when copper is used as the material for the metallization, there is an advantage that the RC signal delay problem can be solved in a highly integrated high speed operation device.

However, in the above-described prior art, as the metal wiring is made of a copper film, a fall phenomenon of the contact plug for connection between the upper and lower metal wiring is caused. This is because the copper film has poor etching property and poor adhesion to the nitride film, and thus the contact plug is not formed properly on the metal wiring made of the copper film. For this reason, in the above-described prior art, the fall of the contact plug is caused, and as a result, the characteristics and reliability of the semiconductor element are degraded.

The present invention provides a semiconductor device and a method of manufacturing the same that can prevent the contact plug from falling over.

In addition, the present invention provides a semiconductor device and a method of manufacturing the same that can improve the characteristics and reliability of the semiconductor device.

A semiconductor device according to an embodiment of the present invention includes a conductive pattern formed on an upper surface of a semiconductor substrate, an interlayer insulating film formed on the conductive pattern, a contact hole formed in an upper end of the interlayer insulating film and the conductive pattern, and the conductive hole in the contact hole. And a contact plug formed to contact the pattern.

The conductive pattern includes a metal wire.

The metal wiring is made of a copper film.

A method of manufacturing a semiconductor device according to an embodiment of the present invention includes forming a conductive pattern on an upper surface of a semiconductor substrate, forming an interlayer insulating film on the conductive pattern, and etching upper ends of the interlayer insulating film and the conductive pattern. Forming a contact hole, and forming a contact plug in contact with the conductive pattern in the contact hole.

The conductive pattern includes a metal wire.

The metal wiring is formed of a copper film.

After forming the conductive pattern and before forming the interlayer insulating layer, forming a mask pattern exposing the contact plug forming region on the conductive pattern; and forming a conductive pattern of the exposed contact plug forming region. Converting an upper end of the portion into an insulating film, and removing the mask pattern.

The step of converting the insulating film to the upper end portion of the conductive pattern portion may include infiltrating silicon into the upper end portion of the conductive pattern portion of the exposed contact plug forming region and nitrogen so that the conductive pattern portion penetrated by the silicon is converted into a silicon nitride film. Processing.

The step of converting the insulating film in the upper end portion of the conductive pattern portion may include injecting silicon into the upper end portion of the conductive pattern portion of the exposed contact plug forming region, and converting the conductive pattern portion into which the silicon penetrates is converted into a silicon oxide film. Processing.

Infiltrating the silicon may be performed by any one of ion implantation, heat treatment, and sputtering.

The oxygen treatment or nitrogen treatment may be performed by any one of chemical vapor deposition (CVD), physical vapor deposition (PVD), heat treatment, and purge processes.

According to an exemplary embodiment of the present invention, the interlayer insulating film and the insulating film may be etched together by converting the copper film portion of the upper portion of the metal wiring corresponding to the contact plug forming region of the metal wiring portion formed of the copper film into an insulating material. Thus, in the present invention, the contact plug can be firmly supported as the lower end of the contact plug is disposed in the upper end of the metal wiring.

Therefore, the present invention can prevent the fall of the contact plug, and through this, it is possible to effectively improve the characteristics and reliability of the semiconductor device.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

1 is a cross-sectional view illustrating a semiconductor device in accordance with an embodiment of the present invention. As illustrated, a metal wiring 102 is formed on an upper portion of a semiconductor substrate 100 having a predetermined lower structure. The metal wiring 102 is made of, for example, a copper film. An interlayer insulating film 112 including a stacked structure of the nitride film 108 and the oxide film 110 formed on the metal wiring 102 is formed, and an upper end portion of the interlayer insulating film 112 and the metal wiring 102 is formed. It is etched to form the contact hole CH. A contact plug 118 is formed in the contact hole CH to contact the metal wiring 102, and the contact plug 118 is formed on the surface of the contact hole CH. The conductive layer 116 is formed to fill the contact hole CH on the barrier layer 114.

As described above, according to the present invention, as the contact plug 118 is formed in the contact hole CH formed by etching the upper portion of the interlayer insulating layer 112 and the metal wiring 102 thereunder, the contact plug 118 may be formed. The lower end is disposed within the upper end of the metallization 102, so that the contact plug 118 can be supported more firmly. Therefore, the present invention prevents the fall of the contact plug 118, thereby obtaining improved characteristics and reliability of the semiconductor device.

2A to 2F are plan views for each process for describing a method of manufacturing a semiconductor device according to an exemplary embodiment of the present invention, and FIGS. 3A to 3F are process steps corresponding to lines I-II of FIGS. 2A to 2F, respectively. Cross-sectional views.

2A and 3A, a metal wiring 102 made of a copper film is formed on the semiconductor substrate 100 on which a predetermined lower structure is formed. Then, it is preferable to planarize the surface of the metal wiring 102 made of the copper film.

2B and 3B, a mask pattern 104 is formed on the metal wire 102 to expose the contact plug formation region. The mask pattern 104 includes, for example, a photosensitive film. Subsequently, silicon is penetrated into the upper end portion of the metallization 102 portion of the exposed contact plug forming region. Infiltration of the silicon is performed by any one of ion implantation, heat treatment, and sputtering.

2C and 3C, the portion of the metal wiring 102 in which the silicon has penetrated is converted into the insulating layer 106. Specifically, the resultant product of the semiconductor substrate 100 in which the silicon is penetrated is nitrogen-treated to convert the copper film of the portion of the metal wiring 102 in which the silicon is penetrated to a silicon nitride film, or the semiconductor substrate 100 in which silicon is penetrated. Oxygenation is carried out to convert the copper film in the portion of the metal wiring 102 into which the silicon has penetrated into a silicon oxide film. At this time, the oxygen treatment or nitrogen treatment is performed by any one of chemical vapor deposition (CVD), physical vapor deposition (PVD), heat treatment and purge processes.

2D and 3D, the mask pattern is removed, and then an interlayer insulating film 112 is formed on the insulating film 106 and the metal wiring 102. The interlayer insulating film 112 includes, for example, a stacked structure of the nitride film 108 and the oxide film 110.

2E and 3E, the contact hole CH is formed by etching the portion of the interlayer insulating layer 112 corresponding to the contact plug forming region and the upper end portion of the metal wiring 102, that is, the insulating layer 106. do. In the exemplary embodiment of the present invention, since the upper end portion of the metal wiring 102 corresponding to the contact plug predetermined region is converted into the insulating film 106, the interlayer insulating film 112 during the etching process for forming the contact hole CH. ) And the upper end of the metal wire 102 converted into the insulating film 106 can be etched together.

2F and 3F, the barrier layer 114 is formed on the interlayer insulating layer 112 including the surface of the contact hole CH, and then the contact hole CH is formed on the barrier layer 114. A conductive film 116 is formed to fill the gap. Next, the conductive plug 116 and the barrier film 114 are removed until the top surface of the interlayer insulating film 112 is exposed, and the contact plug contacts the metal wiring 102 in the contact hole CH. Form 118.

Meanwhile, instead of removing the conductive layer 116 and the barrier layer 114 until the upper surface of the interlayer insulating layer 112 is exposed, the contact plug may be etched by etching one or two thicknesses above the interlayer insulating layer 112. 118) and top metallization (not shown) may be formed together.

Subsequently, although not shown, a series of subsequent known processes are sequentially performed to complete the manufacture of the semiconductor device according to the embodiment of the present invention.

In an embodiment of the present invention, the copper film portion of the upper portion of the metal wiring of the contact plug forming region is converted into an insulating film such as a silicon nitride film or a silicon oxide film, thereby converting the metal converted into the insulating film during the etching process of the interlayer insulating film for forming the contact hole. The upper end of the wiring can be etched together.

Thus, in an embodiment of the present invention, the lower end of the contact plug formed in the contact hole may be disposed in the upper end of the metal wiring, and through this, the present invention may support the contact plug more firmly. Accordingly, the present invention can prevent the contact plug from falling down, and as a result, it is possible to effectively improve the characteristics and reliability of the semiconductor device.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

1 is a cross-sectional view illustrating a semiconductor device in accordance with an embodiment of the present invention.

2A through 2F are process plan views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

3A to 3F are cross-sectional views of processes corresponding to lines II-II of FIGS. 2A to 2F, respectively.

Explanation of symbols on the main parts of the drawings

100 semiconductor substrate 102 metal wiring

104 mask pattern 106 insulating film

108: nitride film 110: oxide film

112: interlayer insulating film CH: contact hole

114: barrier film 116: conductive film

118: contact plug

Claims (11)

A conductive pattern formed on the semiconductor substrate; An interlayer insulating film formed on the conductive pattern; A contact hole formed in an upper end of the interlayer insulating layer and the conductive pattern; And A contact plug formed in the contact hole to contact the conductive pattern; Semiconductor device comprising a. The method of claim 1, The conductive pattern comprises a metal wiring. The method of claim 2, The metal wiring is a semiconductor device, characterized in that consisting of a copper film. Forming a conductive pattern on the semiconductor substrate; Forming an interlayer insulating film on the conductive pattern; Etching a top end portion of the interlayer insulating layer and the conductive pattern to form a contact hole; And Forming a contact plug contacting the conductive pattern in the contact hole; Method of manufacturing a semiconductor device comprising a. The method of claim 4, wherein The conductive pattern is a method of manufacturing a semiconductor device characterized in that it comprises a metal wiring. The method of claim 5, The metal wiring is a manufacturing method of a semiconductor device, characterized in that formed by a copper film. The method of claim 4, wherein After the forming of the conductive pattern and before forming the interlayer insulating film, Forming a mask pattern exposing a contact plug formation region on the conductive pattern; Converting an upper end portion of a conductive pattern portion of the exposed contact plug forming region into an insulating film; And Removing the mask pattern; Method of manufacturing a semiconductor device further comprising. The method of claim 7, wherein Converting the insulating film to the upper end of the conductive pattern portion, Penetrating silicon into an upper end of a conductive pattern portion of the exposed contact plug forming region; And Nitrogen treatment so that the conductive pattern portion penetrated by the silicon is converted into a silicon nitride film; Method of manufacturing a semiconductor device comprising a. The method of claim 7, wherein Converting the insulating film to the upper end of the conductive pattern portion, Penetrating silicon into an upper end of a conductive pattern portion of the exposed contact plug forming region; And Conducting oxygen treatment so that the conductive pattern portion penetrated by the silicon is converted into a silicon oxide film; Method of manufacturing a semiconductor device comprising a. The method according to any one of claims 8 to 9, The step of infiltrating the silicon, the method of manufacturing a semiconductor device, characterized in that performed by any one of the ion implantation, heat treatment and sputtering process. The method according to any one of claims 8 to 9, The oxygen treatment or nitrogen treatment may be performed by any one of chemical vapor deposition (CVD), physical vapor deposition (PVD), heat treatment, and purge processes.
KR1020090070181A 2009-07-30 2009-07-30 Semiconductor device and method of manufacturing the same KR20110012455A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020090070181A KR20110012455A (en) 2009-07-30 2009-07-30 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020090070181A KR20110012455A (en) 2009-07-30 2009-07-30 Semiconductor device and method of manufacturing the same

Publications (1)

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KR20110012455A true KR20110012455A (en) 2011-02-09

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