KR20010089209A - 플립 칩형 반도체 장치 및 플립 칩형 반도체 장치 제조 방법 - Google Patents
플립 칩형 반도체 장치 및 플립 칩형 반도체 장치 제조 방법 Download PDFInfo
- Publication number
- KR20010089209A KR20010089209A KR1020010011929A KR20010011929A KR20010089209A KR 20010089209 A KR20010089209 A KR 20010089209A KR 1020010011929 A KR1020010011929 A KR 1020010011929A KR 20010011929 A KR20010011929 A KR 20010011929A KR 20010089209 A KR20010089209 A KR 20010089209A
- Authority
- KR
- South Korea
- Prior art keywords
- substrate
- multilayer wiring
- layer
- thin film
- semiconductor device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 127
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 77
- 238000000034 method Methods 0.000 title claims abstract description 70
- 239000000758 substrate Substances 0.000 claims abstract description 142
- 229910052751 metal Inorganic materials 0.000 claims abstract description 74
- 239000002184 metal Substances 0.000 claims abstract description 74
- 239000000853 adhesive Substances 0.000 claims abstract description 42
- 230000001070 adhesive effect Effects 0.000 claims abstract description 42
- 229910000679 solder Inorganic materials 0.000 claims abstract description 37
- 238000005530 etching Methods 0.000 claims abstract description 16
- 239000010409 thin film Substances 0.000 claims description 68
- 239000011347 resin Substances 0.000 claims description 59
- 229920005989 resin Polymers 0.000 claims description 59
- 239000004020 conductor Substances 0.000 claims description 13
- 239000003351 stiffener Substances 0.000 claims description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 230000008878 coupling Effects 0.000 claims description 6
- 238000010168 coupling process Methods 0.000 claims description 6
- 238000005859 coupling reaction Methods 0.000 claims description 6
- 230000017525 heat dissipation Effects 0.000 claims description 6
- 238000012546 transfer Methods 0.000 claims description 5
- 239000002313 adhesive film Substances 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 238000005452 bending Methods 0.000 abstract 1
- 238000000206 photolithography Methods 0.000 abstract 1
- 239000011295 pitch Substances 0.000 abstract 1
- 230000002035 prolonged effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 147
- 239000010949 copper Substances 0.000 description 19
- 239000000463 material Substances 0.000 description 19
- 239000010408 film Substances 0.000 description 17
- 229920002120 photoresistant polymer Polymers 0.000 description 16
- 238000012545 processing Methods 0.000 description 11
- 238000011161 development Methods 0.000 description 9
- 230000018109 developmental process Effects 0.000 description 9
- 239000007769 metal material Substances 0.000 description 8
- 229910052802 copper Inorganic materials 0.000 description 7
- 238000001312 dry etching Methods 0.000 description 7
- 238000001039 wet etching Methods 0.000 description 7
- UFWIBTONFRDIAS-UHFFFAOYSA-N Naphthalene Chemical compound C1=CC=CC2=CC=CC=C21 UFWIBTONFRDIAS-UHFFFAOYSA-N 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 6
- 230000004907 flux Effects 0.000 description 6
- 239000011368 organic material Substances 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- 238000007789 sealing Methods 0.000 description 5
- 239000012790 adhesive layer Substances 0.000 description 4
- 229910010293 ceramic material Inorganic materials 0.000 description 4
- 229910052745 lead Inorganic materials 0.000 description 4
- 238000001465 metallisation Methods 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 238000004381 surface treatment Methods 0.000 description 4
- 229910052718 tin Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 239000004643 cyanate ester Substances 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000005011 phenolic resin Substances 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 239000009719 polyimide resin Substances 0.000 description 3
- 229920002050 silicone resin Polymers 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 229960002089 ferrous chloride Drugs 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- NMCUIPGRVMDVDB-UHFFFAOYSA-L iron dichloride Chemical compound Cl[Fe]Cl NMCUIPGRVMDVDB-UHFFFAOYSA-L 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229920005672 polyolefin resin Polymers 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910000599 Cr alloy Inorganic materials 0.000 description 1
- 229910001182 Mo alloy Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910020836 Sn-Ag Inorganic materials 0.000 description 1
- 229910020988 Sn—Ag Inorganic materials 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000013043 chemical agent Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229960003280 cupric chloride Drugs 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 239000002241 glass-ceramic Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 210000004185 liver Anatomy 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052863 mullite Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01077—Iridium [Ir]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0152—Temporary metallic carrier, e.g. for transferring material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1581—Treating the backside of the PCB, e.g. for heating during soldering or providing a liquid coating on the backside
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims (13)
- 다층 배선 구조를 가진 다층 배선층;절연 기판 또는 전도성 재료로 매립된 관통 홀을 가진 다층 배선 기판 중의 하나로 구성되는 기판;상기 다층 배선층과 상기 기판 간에 삽입 배치되어 상기 다층 배선층을 상기 기판에 접합시키는 접착제 막; 및상기 다층 배선층 상에 장착된 반도체 칩을 구비하는 플립 칩형 반도체 장치.
- 제1항에 있어서,상기 전도성 재료는 전도성 접착제이고, 상기 장치는 상기 기판 표면 상의 상기 전도성 접착제에 결합된 단자 볼들을 더 구비하는 플립 칩형 반도체 장치.
- 제1항 또는 제2항에 있어서,상기 다층 배선층의 최상층 상에 형성된 외부 전극 패드; 및상기 반도체 칩상에 제공되고 상기 외부 전극 패드에 접속된 범프 전극을 구비하는 플립 칩형 반도체 장치.
- 제1항 또는 제2항에 있어서,상기 반도체 칩의 측부를 매립하기 위한 절연 수지층; 및상기 반도체 칩에 결합된 방열용 열 확산기를 구비하는 플립 칩형 반도체 장치.
- 제1항 또는 제2항에 있어서,상기 반도체 칩에 결합된 방열용 열 확산기; 및상기 반도체 칩의 양면상에 배치되고 상기 열 확산기와 상기 다층 배선층 간에 삽입 배치된 스티프너(stiffener)를 구비하는 플립 칩형 반도체 장치.
- 평탄한 금속판으로 구성된 제1 기판상에 다층 배선 구조를 형성하는 단계;상기 제1 기판을 식각에 의해 제거하여 다층 배선층으로 구성되는 제2 기판을 형성하는 단계;상기 다층 배선층으로 구성되는 상기 제2 기판에 제3 기판을 결합하여 다층 배선 기판을 구성하는 단계; 및상기 제2 기판 상에 반도체 칩을 장착하는 단계를 포함하는 플립 칩형 반도체 장치 제조 방법.
- 제6항에 있어서,상기 제3 기판은 절연 기판과 다층 기판 중의 하나이고 홀들이 제공되는 플립 칩형 반도체 장치 제조 방법.
- 제6항 또는 제7항에 있어서,상기 제2 기판은,상기 제1 기판 상에 외부 전극 패드를 형성하는 단계;상기 외부 전극 패드의 전체 표면 상에 절연 박막층을 형성하고 상기 외부 전극 패드 상의 상기 절연 박막을 에칭하여 개구를 형성하는 단계;전체 표면 상에 금속 박막층을 형성하고 상기 금속 박막층을 패터닝하여 상기 개구 내에 상기 외부 전극 패드에 접속된 금속 박막 배선부를 형성하는 단계;상기 절연 박막층의 형성 및 상기 금속 박막 배선부의 형성을 반복하는 단계; 및전체 표면 상에 절연 수지 박막층을 형성하고, 상기 절연 수지 박막층 아래에 있는 상기 금속 박막 배선부 상에 개구를 형성하며, 상기 개구 내에 패드 전극을 형성하는 단계에 의해서 제조되는 플립 칩형 반도체 장치 제조 방법.
- 제8항에 있어서,상기 제3 기판의 홀 내로 전도성 접착제를 매립하는 단계를 포함하는 플립 칩형 반도체 장치 제조 방법.
- 제9항에 있어서,상기 전도성 접착제 상에 땜납 볼을 결합하는 단계를 포함하는 플립 칩형 반도체 장치 제조 방법.
- 제10항에 있어서,상기 반도체 장치는 범프 전극을 가지고,상기 반도체 칩 장착 단계에서, 상기 범프 전극은 상기 제2 기판의 상기 외부 전극 패드에 결합되는 플립 칩형 반도체 장치 제조 방법.
- 제6항 또는 제7항에 있어서,열 전달 접착제를 통해 상기 반도체 칩의 후면에 방열기를 결합하는 단계를 포함하는 플립 칩형 반도체 장치 제조 방법.
- 제12항에 있어서,상기 반도체 칩이 삽입되는 위치들에서 상기 제 2 기판상에 스티프너들을 결합하는 단계;상기 반도체 칩과 상기 스티프너 상에 상기 방열기를 장착하는 단계를 포함하는 플립 칩형 반도체 장치 제조 방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000065792A JP3677429B2 (ja) | 2000-03-09 | 2000-03-09 | フリップチップ型半導体装置の製造方法 |
JP2000-065792 | 2000-03-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20010089209A true KR20010089209A (ko) | 2001-09-29 |
KR100395862B1 KR100395862B1 (ko) | 2003-08-27 |
Family
ID=18585260
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2001-0011929A KR100395862B1 (ko) | 2000-03-09 | 2001-03-08 | 플립 칩형 반도체 장치 및 플립 칩형 반도체 장치 제조 방법 |
Country Status (4)
Country | Link |
---|---|
US (2) | US6406942B2 (ko) |
JP (1) | JP3677429B2 (ko) |
KR (1) | KR100395862B1 (ko) |
TW (1) | TW558929B (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100715410B1 (ko) * | 2003-06-30 | 2007-05-07 | 산요덴키가부시키가이샤 | 혼성 집적 회로 |
KR100878169B1 (ko) * | 2005-06-10 | 2009-01-12 | 샤프 가부시키가이샤 | 반도체 장치, 적층형 반도체 장치, 및 반도체 장치의 제조방법 |
Families Citing this family (131)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3973340B2 (ja) * | 1999-10-05 | 2007-09-12 | Necエレクトロニクス株式会社 | 半導体装置、配線基板、及び、それらの製造方法 |
JP2002050716A (ja) * | 2000-08-02 | 2002-02-15 | Dainippon Printing Co Ltd | 半導体装置及びその作製方法 |
US7498196B2 (en) | 2001-03-30 | 2009-03-03 | Megica Corporation | Structure and manufacturing method of chip scale package |
US6528892B2 (en) * | 2001-06-05 | 2003-03-04 | International Business Machines Corporation | Land grid array stiffener use with flexible chip carriers |
US6930256B1 (en) | 2002-05-01 | 2005-08-16 | Amkor Technology, Inc. | Integrated circuit substrate having laser-embedded conductive patterns and method therefor |
US7334326B1 (en) | 2001-06-19 | 2008-02-26 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having embedded passive components |
US6633421B2 (en) | 2001-06-29 | 2003-10-14 | Xanoptrix, Inc. | Integrated arrays of modulators and lasers on electronics |
US6903278B2 (en) * | 2001-06-29 | 2005-06-07 | Intel Corporation | Arrangements to provide mechanical stiffening elements to a thin-core or coreless substrate |
US6753199B2 (en) * | 2001-06-29 | 2004-06-22 | Xanoptix, Inc. | Topside active optical device apparatus and method |
US6731665B2 (en) | 2001-06-29 | 2004-05-04 | Xanoptix Inc. | Laser arrays for high power fiber amplifier pumps |
US6724794B2 (en) | 2001-06-29 | 2004-04-20 | Xanoptix, Inc. | Opto-electronic device integration |
US7831151B2 (en) | 2001-06-29 | 2010-11-09 | John Trezza | Redundant optical device array |
US6620642B2 (en) * | 2001-06-29 | 2003-09-16 | Xanoptix, Inc. | Opto-electronic device integration |
US6812560B2 (en) * | 2001-07-21 | 2004-11-02 | International Business Machines Corporation | Press-fit chip package |
US6639322B1 (en) * | 2001-09-17 | 2003-10-28 | Applied Micro Circuits Corporation | Flip-chip transition interface structure |
JP5092191B2 (ja) * | 2001-09-26 | 2012-12-05 | イビデン株式会社 | Icチップ実装用基板 |
TW503496B (en) * | 2001-12-31 | 2002-09-21 | Megic Corp | Chip packaging structure and manufacturing process of the same |
TW584950B (en) | 2001-12-31 | 2004-04-21 | Megic Corp | Chip packaging structure and process thereof |
TW544882B (en) | 2001-12-31 | 2003-08-01 | Megic Corp | Chip package structure and process thereof |
US6673698B1 (en) | 2002-01-19 | 2004-01-06 | Megic Corporation | Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers |
JP3908157B2 (ja) * | 2002-01-24 | 2007-04-25 | Necエレクトロニクス株式会社 | フリップチップ型半導体装置の製造方法 |
JP3773896B2 (ja) | 2002-02-15 | 2006-05-10 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP2003258189A (ja) * | 2002-03-01 | 2003-09-12 | Toshiba Corp | 半導体装置及びその製造方法 |
JP3616605B2 (ja) * | 2002-04-03 | 2005-02-02 | 沖電気工業株式会社 | 半導体装置 |
US9691635B1 (en) | 2002-05-01 | 2017-06-27 | Amkor Technology, Inc. | Buildup dielectric layer having metallization pattern semiconductor package fabrication method |
US7633765B1 (en) | 2004-03-23 | 2009-12-15 | Amkor Technology, Inc. | Semiconductor package including a top-surface metal layer for implementing circuit features |
US6930257B1 (en) | 2002-05-01 | 2005-08-16 | Amkor Technology, Inc. | Integrated circuit substrate having laminated laser-embedded circuit layers |
US20080043447A1 (en) * | 2002-05-01 | 2008-02-21 | Amkor Technology, Inc. | Semiconductor package having laser-embedded terminals |
US7548430B1 (en) | 2002-05-01 | 2009-06-16 | Amkor Technology, Inc. | Buildup dielectric and metallization process and semiconductor package |
US7670962B2 (en) | 2002-05-01 | 2010-03-02 | Amkor Technology, Inc. | Substrate having stiffener fabrication method |
US7399661B2 (en) * | 2002-05-01 | 2008-07-15 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having embedded back-side access conductors and vias |
JP2003324183A (ja) * | 2002-05-07 | 2003-11-14 | Mitsubishi Electric Corp | 半導体装置 |
US7474538B2 (en) | 2002-05-27 | 2009-01-06 | Nec Corporation | Semiconductor device mounting board, method of manufacturing the same, method of inspecting the same, and semiconductor package |
JP3591524B2 (ja) * | 2002-05-27 | 2004-11-24 | 日本電気株式会社 | 半導体装置搭載基板とその製造方法およびその基板検査法、並びに半導体パッケージ |
DE10234951B4 (de) * | 2002-07-31 | 2009-01-02 | Qimonda Ag | Verfahren zur Herstellung von Halbleiterschaltungsmodulen |
US6951778B2 (en) * | 2002-10-31 | 2005-10-04 | Hewlett-Packard Development Company, L.P. | Edge-sealed substrates and methods for effecting the same |
US7505862B2 (en) * | 2003-03-07 | 2009-03-17 | Salmon Technologies, Llc | Apparatus and method for testing electronic systems |
US7408258B2 (en) * | 2003-08-20 | 2008-08-05 | Salmon Technologies, Llc | Interconnection circuit and electronic module utilizing same |
US7091124B2 (en) | 2003-11-13 | 2006-08-15 | Micron Technology, Inc. | Methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices |
US8084866B2 (en) | 2003-12-10 | 2011-12-27 | Micron Technology, Inc. | Microelectronic devices and methods for filling vias in microelectronic devices |
US20050184376A1 (en) * | 2004-02-19 | 2005-08-25 | Salmon Peter C. | System in package |
US10811277B2 (en) | 2004-03-23 | 2020-10-20 | Amkor Technology, Inc. | Encapsulated semiconductor package |
US11081370B2 (en) | 2004-03-23 | 2021-08-03 | Amkor Technology Singapore Holding Pte. Ltd. | Methods of manufacturing an encapsulated semiconductor device |
US7145238B1 (en) | 2004-05-05 | 2006-12-05 | Amkor Technology, Inc. | Semiconductor package and substrate having multi-level vias |
US20050247894A1 (en) | 2004-05-05 | 2005-11-10 | Watkins Charles M | Systems and methods for forming apertures in microfeature workpieces |
US20050255722A1 (en) * | 2004-05-07 | 2005-11-17 | Salmon Peter C | Micro blade assembly |
TWI272683B (en) | 2004-05-24 | 2007-02-01 | Sanyo Electric Co | Semiconductor device and manufacturing method thereof |
US7220132B2 (en) * | 2004-06-28 | 2007-05-22 | Intel Corporation | Tilted land grid array package and socket, systems, and methods |
US7335979B2 (en) * | 2004-06-28 | 2008-02-26 | Intel Corporation | Device and method for tilted land grid array interconnects on a coreless substrate package |
US7232754B2 (en) | 2004-06-29 | 2007-06-19 | Micron Technology, Inc. | Microelectronic devices and methods for forming interconnects in microelectronic devices |
SG120200A1 (en) | 2004-08-27 | 2006-03-28 | Micron Technology Inc | Slanted vias for electrical circuits on circuit boards and other substrates |
US7300857B2 (en) | 2004-09-02 | 2007-11-27 | Micron Technology, Inc. | Through-wafer interconnects for photoimager and memory wafers |
US7420282B2 (en) * | 2004-10-18 | 2008-09-02 | Sharp Kabushiki Kaisha | Connection structure for connecting semiconductor element and wiring board, and semiconductor device |
US7427809B2 (en) * | 2004-12-16 | 2008-09-23 | Salmon Technologies, Llc | Repairable three-dimensional semiconductor subsystem |
US7271482B2 (en) | 2004-12-30 | 2007-09-18 | Micron Technology, Inc. | Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods |
US20070007983A1 (en) * | 2005-01-06 | 2007-01-11 | Salmon Peter C | Semiconductor wafer tester |
US8049293B2 (en) | 2005-03-07 | 2011-11-01 | Sony Corporation | Solid-state image pickup device, electronic apparatus using such solid-state image pickup device and method of manufacturing solid-state image pickup device |
US8826531B1 (en) | 2005-04-05 | 2014-09-09 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having laminated laser-embedded circuit layers |
JP4790297B2 (ja) * | 2005-04-06 | 2011-10-12 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP4534062B2 (ja) * | 2005-04-19 | 2010-09-01 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4146864B2 (ja) * | 2005-05-31 | 2008-09-10 | 新光電気工業株式会社 | 配線基板及びその製造方法、並びに半導体装置及び半導体装置の製造方法 |
US7795134B2 (en) | 2005-06-28 | 2010-09-14 | Micron Technology, Inc. | Conductive interconnect structures and formation methods using supercritical fluids |
US20070023889A1 (en) * | 2005-08-01 | 2007-02-01 | Salmon Peter C | Copper substrate with feedthroughs and interconnection circuits |
US20070023923A1 (en) * | 2005-08-01 | 2007-02-01 | Salmon Peter C | Flip chip interface including a mixed array of heat bumps and signal bumps |
US20070023904A1 (en) * | 2005-08-01 | 2007-02-01 | Salmon Peter C | Electro-optic interconnection apparatus and method |
US7586747B2 (en) * | 2005-08-01 | 2009-09-08 | Salmon Technologies, Llc. | Scalable subsystem architecture having integrated cooling channels |
US7622377B2 (en) * | 2005-09-01 | 2009-11-24 | Micron Technology, Inc. | Microfeature workpiece substrates having through-substrate vias, and associated methods of formation |
US7262134B2 (en) | 2005-09-01 | 2007-08-28 | Micron Technology, Inc. | Microfeature workpieces and methods for forming interconnects in microfeature workpieces |
US7863187B2 (en) | 2005-09-01 | 2011-01-04 | Micron Technology, Inc. | Microfeature workpieces and methods for forming interconnects in microfeature workpieces |
JP2007123524A (ja) * | 2005-10-27 | 2007-05-17 | Shinko Electric Ind Co Ltd | 電子部品内蔵基板 |
SG135066A1 (en) | 2006-02-20 | 2007-09-28 | Micron Technology Inc | Semiconductor device assemblies including face-to-face semiconductor dice, systems including such assemblies, and methods for fabricating such assemblies |
US7353591B2 (en) * | 2006-04-18 | 2008-04-08 | Kinsus Interconnect Technology Corp. | Method of manufacturing coreless substrate |
US7749899B2 (en) | 2006-06-01 | 2010-07-06 | Micron Technology, Inc. | Microelectronic workpieces and methods and systems for forming interconnects in microelectronic workpieces |
JP4155999B2 (ja) | 2006-06-02 | 2008-09-24 | 株式会社ソニー・コンピュータエンタテインメント | 半導体装置および半導体装置の製造方法 |
US7629249B2 (en) | 2006-08-28 | 2009-12-08 | Micron Technology, Inc. | Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods |
US7902643B2 (en) | 2006-08-31 | 2011-03-08 | Micron Technology, Inc. | Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods |
JP2008091639A (ja) * | 2006-10-02 | 2008-04-17 | Nec Electronics Corp | 電子装置およびその製造方法 |
US7589398B1 (en) | 2006-10-04 | 2009-09-15 | Amkor Technology, Inc. | Embedded metal features structure |
US7550857B1 (en) | 2006-11-16 | 2009-06-23 | Amkor Technology, Inc. | Stacked redistribution layer (RDL) die assembly package |
US7573138B2 (en) * | 2006-11-30 | 2009-08-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Stress decoupling structures for flip-chip assembly |
US7750250B1 (en) | 2006-12-22 | 2010-07-06 | Amkor Technology, Inc. | Blind via capture pad structure |
US7752752B1 (en) | 2007-01-09 | 2010-07-13 | Amkor Technology, Inc. | Method of fabricating an embedded circuit pattern |
US8323771B1 (en) | 2007-08-15 | 2012-12-04 | Amkor Technology, Inc. | Straight conductor blind via capture pad structure and fabrication method |
SG150410A1 (en) | 2007-08-31 | 2009-03-30 | Micron Technology Inc | Partitioned through-layer via and associated systems and methods |
US7884015B2 (en) | 2007-12-06 | 2011-02-08 | Micron Technology, Inc. | Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods |
TW200930173A (en) * | 2007-12-31 | 2009-07-01 | Phoenix Prec Technology Corp | Package substrate having embedded semiconductor element and fabrication method thereof |
JP5585447B2 (ja) * | 2008-07-31 | 2014-09-10 | 日本電気株式会社 | 半導体装置及びその製造方法 |
US8872329B1 (en) | 2009-01-09 | 2014-10-28 | Amkor Technology, Inc. | Extended landing pad substrate package structure and method |
US7960827B1 (en) | 2009-04-09 | 2011-06-14 | Amkor Technology, Inc. | Thermal via heat spreader package and method |
JP5147779B2 (ja) | 2009-04-16 | 2013-02-20 | 新光電気工業株式会社 | 配線基板の製造方法及び半導体パッケージの製造方法 |
US8623753B1 (en) | 2009-05-28 | 2014-01-07 | Amkor Technology, Inc. | Stackable protruding via package and method |
US8222538B1 (en) | 2009-06-12 | 2012-07-17 | Amkor Technology, Inc. | Stackable via package and method |
US8471154B1 (en) | 2009-08-06 | 2013-06-25 | Amkor Technology, Inc. | Stackable variable height via package and method |
US8796561B1 (en) | 2009-10-05 | 2014-08-05 | Amkor Technology, Inc. | Fan out build up substrate stackable package and method |
US8937381B1 (en) | 2009-12-03 | 2015-01-20 | Amkor Technology, Inc. | Thin stackable package and method |
US9691734B1 (en) | 2009-12-07 | 2017-06-27 | Amkor Technology, Inc. | Method of forming a plurality of electronic component packages |
US8742561B2 (en) * | 2009-12-29 | 2014-06-03 | Intel Corporation | Recessed and embedded die coreless package |
US8536462B1 (en) | 2010-01-22 | 2013-09-17 | Amkor Technology, Inc. | Flex circuit package and method |
US8300423B1 (en) | 2010-05-25 | 2012-10-30 | Amkor Technology, Inc. | Stackable treated via package and method |
US8294276B1 (en) | 2010-05-27 | 2012-10-23 | Amkor Technology, Inc. | Semiconductor device and fabricating method thereof |
US8338229B1 (en) | 2010-07-30 | 2012-12-25 | Amkor Technology, Inc. | Stackable plasma cleaned via package and method |
US8717775B1 (en) | 2010-08-02 | 2014-05-06 | Amkor Technology, Inc. | Fingerprint sensor package and method |
US20120098129A1 (en) | 2010-10-22 | 2012-04-26 | Harris Corporation | Method of making a multi-chip module having a reduced thickness and related devices |
US8337657B1 (en) | 2010-10-27 | 2012-12-25 | Amkor Technology, Inc. | Mechanical tape separation package and method |
US8482134B1 (en) | 2010-11-01 | 2013-07-09 | Amkor Technology, Inc. | Stackable package and method |
US9748154B1 (en) | 2010-11-04 | 2017-08-29 | Amkor Technology, Inc. | Wafer level fan out semiconductor device and manufacturing method thereof |
US8525318B1 (en) | 2010-11-10 | 2013-09-03 | Amkor Technology, Inc. | Semiconductor device and fabricating method thereof |
US8698303B2 (en) | 2010-11-23 | 2014-04-15 | Ibiden Co., Ltd. | Substrate for mounting semiconductor, semiconductor device and method for manufacturing semiconductor device |
US8557629B1 (en) | 2010-12-03 | 2013-10-15 | Amkor Technology, Inc. | Semiconductor device having overlapped via apertures |
US8508037B2 (en) * | 2010-12-07 | 2013-08-13 | Intel Corporation | Bumpless build-up layer and laminated core hybrid structures and methods of assembling same |
US8535961B1 (en) | 2010-12-09 | 2013-09-17 | Amkor Technology, Inc. | Light emitting diode (LED) package and method |
US9721872B1 (en) | 2011-02-18 | 2017-08-01 | Amkor Technology, Inc. | Methods and structures for increasing the allowable die size in TMV packages |
US9013011B1 (en) | 2011-03-11 | 2015-04-21 | Amkor Technology, Inc. | Stacked and staggered die MEMS package and method |
US9324677B2 (en) | 2011-04-04 | 2016-04-26 | Rohm Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
KR101140113B1 (ko) | 2011-04-26 | 2012-04-30 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 |
US8653674B1 (en) | 2011-09-15 | 2014-02-18 | Amkor Technology, Inc. | Electronic component package fabrication method and structure |
US8633598B1 (en) | 2011-09-20 | 2014-01-21 | Amkor Technology, Inc. | Underfill contacting stacking balls package fabrication method and structure |
US9029962B1 (en) | 2011-10-12 | 2015-05-12 | Amkor Technology, Inc. | Molded cavity substrate MEMS package fabrication method and structure |
TWI442852B (zh) * | 2012-07-02 | 2014-06-21 | Subtron Technology Co Ltd | 基板結構的製作方法 |
US9799592B2 (en) | 2013-11-19 | 2017-10-24 | Amkor Technology, Inc. | Semicondutor device with through-silicon via-less deep wells |
KR101366461B1 (ko) | 2012-11-20 | 2014-02-26 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
KR101488590B1 (ko) | 2013-03-29 | 2015-01-30 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
TWI508157B (zh) * | 2013-07-24 | 2015-11-11 | 矽品精密工業股份有限公司 | 半導體結構及其製法 |
KR101607981B1 (ko) | 2013-11-04 | 2016-03-31 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지 |
US9953908B2 (en) * | 2015-10-30 | 2018-04-24 | International Business Machines Corporation | Method for forming solder bumps using sacrificial layer |
US9960328B2 (en) | 2016-09-06 | 2018-05-01 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
US10679919B2 (en) * | 2018-06-25 | 2020-06-09 | Qualcomm Incorporated | High thermal release interposer |
US10622292B2 (en) * | 2018-07-06 | 2020-04-14 | Qualcomm Incorporated | High density interconnects in an embedded trace substrate (ETS) comprising a core layer |
JP7140969B2 (ja) * | 2018-10-22 | 2022-09-22 | 富士通株式会社 | アンテナ一体型増幅器及び通信機 |
US11502029B2 (en) * | 2019-07-19 | 2022-11-15 | Stmicroelectronics Pte Ltd | Thin semiconductor chip using a dummy sidewall layer |
US20210217707A1 (en) * | 2020-01-10 | 2021-07-15 | Mediatek Inc. | Semiconductor package having re-distribution layer structure on substrate component |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW256013B (en) * | 1994-03-18 | 1995-09-01 | Hitachi Seisakusyo Kk | Installation board |
JP2803603B2 (ja) * | 1995-09-18 | 1998-09-24 | 日本電気株式会社 | マルチチップパッケージ構造 |
JPH09283925A (ja) * | 1996-04-16 | 1997-10-31 | Toppan Printing Co Ltd | 半導体装置及びその製造方法 |
US6036809A (en) * | 1999-02-16 | 2000-03-14 | International Business Machines Corporation | Process for releasing a thin-film structure from a substrate |
JP3495300B2 (ja) * | 1999-12-10 | 2004-02-09 | Necエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
-
2000
- 2000-03-09 JP JP2000065792A patent/JP3677429B2/ja not_active Expired - Lifetime
-
2001
- 2001-03-08 KR KR10-2001-0011929A patent/KR100395862B1/ko active IP Right Grant
- 2001-03-08 TW TW090105656A patent/TW558929B/zh not_active IP Right Cessation
- 2001-03-09 US US09/801,901 patent/US6406942B2/en not_active Expired - Lifetime
-
2002
- 2002-04-25 US US10/131,486 patent/US20020121689A1/en not_active Abandoned
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100715410B1 (ko) * | 2003-06-30 | 2007-05-07 | 산요덴키가부시키가이샤 | 혼성 집적 회로 |
KR100878169B1 (ko) * | 2005-06-10 | 2009-01-12 | 샤프 가부시키가이샤 | 반도체 장치, 적층형 반도체 장치, 및 반도체 장치의 제조방법 |
KR100907853B1 (ko) * | 2005-06-10 | 2009-07-14 | 샤프 가부시키가이샤 | 반도체 장치, 적층형 반도체 장치, 및 반도체 장치의 제조 방법 |
US7723839B2 (en) | 2005-06-10 | 2010-05-25 | Sharp Kabushiki Kaisha | Semiconductor device, stacked semiconductor device, and manufacturing method for semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
US6406942B2 (en) | 2002-06-18 |
JP2001257288A (ja) | 2001-09-21 |
KR100395862B1 (ko) | 2003-08-27 |
JP3677429B2 (ja) | 2005-08-03 |
US20010020739A1 (en) | 2001-09-13 |
TW558929B (en) | 2003-10-21 |
US20020121689A1 (en) | 2002-09-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100395862B1 (ko) | 플립 칩형 반도체 장치 및 플립 칩형 반도체 장치 제조 방법 | |
JP4343044B2 (ja) | インターポーザ及びその製造方法並びに半導体装置 | |
US7923367B2 (en) | Multilayer wiring substrate mounted with electronic component and method for manufacturing the same | |
KR100551173B1 (ko) | 플립칩형 반도체장치 및 그 제조방법 | |
JP3813402B2 (ja) | 半導体装置の製造方法 | |
US7777328B2 (en) | Substrate and multilayer circuit board | |
KR100510154B1 (ko) | 반도체 장치 및 그 제조방법 | |
US7591067B2 (en) | Thermally enhanced coreless thin substrate with embedded chip and method for manufacturing the same | |
US6930257B1 (en) | Integrated circuit substrate having laminated laser-embedded circuit layers | |
KR100432715B1 (ko) | 방열부재를 갖는 인쇄회로기판 및 그 제조방법 | |
KR101044127B1 (ko) | 방열기판 및 그 제조방법 | |
US20100044845A1 (en) | Circuit substrate, an electronic device arrangement and a manufacturing process for the circuit substrate | |
EP1387403A2 (en) | Semiconductor packaging | |
JP2004537849A (ja) | リードレスマルチダイキャリアの構造およびその作製のための方法 | |
US8826531B1 (en) | Method for making an integrated circuit substrate having laminated laser-embedded circuit layers | |
US6221694B1 (en) | Method of making a circuitized substrate with an aperture | |
TWI759120B (zh) | 中介基板及其製法 | |
US6562656B1 (en) | Cavity down flip chip BGA | |
US6207354B1 (en) | Method of making an organic chip carrier package | |
JPH1056101A (ja) | スルーホールおよびバイアの相互接続をもたないボール・グリッド・アレイ・パッケージ | |
US6913814B2 (en) | Lamination process and structure of high layout density substrate | |
KR100693168B1 (ko) | 인쇄회로기판 및 그 제조방법 | |
JPH10242335A (ja) | 半導体装置 | |
JP2004193186A (ja) | 配線基板及びその製造方法並びに半導体装置 | |
JP3834305B2 (ja) | 多層配線基板の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
N231 | Notification of change of applicant | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20120724 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20130719 Year of fee payment: 11 |
|
FPAY | Annual fee payment |
Payment date: 20140721 Year of fee payment: 12 |
|
FPAY | Annual fee payment |
Payment date: 20150716 Year of fee payment: 13 |
|
FPAY | Annual fee payment |
Payment date: 20160721 Year of fee payment: 14 |
|
FPAY | Annual fee payment |
Payment date: 20170720 Year of fee payment: 15 |
|
FPAY | Annual fee payment |
Payment date: 20180802 Year of fee payment: 16 |